Import FFT routines from webrtc-signal rev r1078 as is
But we removed fft_neon.S and fft_armv7.S, with corresponding updates
to arm_fft.gyp. Those files have dependencies on webrtc, which we
don't want.
Review URL: https://webrtc-codereview.appspot.com/1083009
git-svn-id: http://webrtc.googlecode.com/svn/deps/third_party/openmax@3458 4adac7df-926f-26a2-2b94-8c16560cd09d
diff --git a/dl/armCOMM.c b/dl/armCOMM.c
new file mode 100644
index 0000000..1118744
--- /dev/null
+++ b/dl/armCOMM.c
@@ -0,0 +1,949 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ *
+ * This file was originally licensed as follows. It has been
+ * relicensed with permission from the copyright holders.
+ */
+
+/**
+ *
+ * File Name: armCOMM.c
+ * OpenMAX DL: v1.0.2
+ * Revision: 10586
+ * Date: Wednesday, March 5, 2008
+ *
+ * (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+ *
+ *
+ *
+ * Defines Common APIs used across OpenMAX API's
+ */
+
+#include "omxtypes.h"
+#include "armCOMM.h"
+
+/***********************************************************************/
+ /* Miscellaneous Arithmetic operations */
+
+/**
+ * Function: armRoundFloatToS16
+ *
+ * Description:
+ * Converts a double precision value into a short int after rounding
+ *
+ * Parameters:
+ * [in] Value Float value to be converted
+ *
+ * Return Value:
+ * [out] converted value in OMX_S16 format
+ *
+ */
+
+OMX_S16 armRoundFloatToS16 (OMX_F64 Value)
+{
+ if (Value > 0)
+ {
+ return (OMX_S16)(Value + .5);
+ }
+ else
+ {
+ return (OMX_S16)(Value - .5);
+ }
+}
+
+/**
+ * Function: armRoundFloatToS32
+ *
+ * Description:
+ * Converts a double precision value into a int after rounding
+ *
+ * Parameters:
+ * [in] Value Float value to be converted
+ *
+ * Return Value:
+ * [out] converted value in OMX_S32 format
+ *
+ */
+
+OMX_S32 armRoundFloatToS32 (OMX_F64 Value)
+{
+ if (Value > 0)
+ {
+ return (OMX_S32)(Value + .5);
+ }
+ else
+ {
+ return (OMX_S32)(Value - .5);
+ }
+}
+/**
+ * Function: armSatRoundFloatToS16
+ *
+ * Description:
+ * Converts a double precision value into a short int after rounding and saturation
+ *
+ * Parameters:
+ * [in] Value Float value to be converted
+ *
+ * Return Value:
+ * [out] converted value in OMX_S16 format
+ *
+ */
+
+OMX_S16 armSatRoundFloatToS16 (OMX_F64 Value)
+{
+ if (Value > 0)
+ {
+ Value += 0.5;
+
+ if(Value > (OMX_S16)OMX_MAX_S16 )
+ {
+ return (OMX_S16)OMX_MAX_S16;
+ }
+ else
+ {
+ return (OMX_S16)Value;
+ }
+ }
+ else
+ {
+ Value -= 0.5;
+
+ if(Value < (OMX_S16)OMX_MIN_S16 )
+ {
+ return (OMX_S16)OMX_MIN_S16;
+ }
+ else
+ {
+ return (OMX_S16)Value;
+ }
+ }
+}
+
+/**
+ * Function: armSatRoundFloatToS32
+ *
+ * Description:
+ * Converts a double precision value into a int after rounding and saturation
+ *
+ * Parameters:
+ * [in] Value Float value to be converted
+ *
+ * Return Value:
+ * [out] converted value in OMX_S32 format
+ *
+ */
+
+OMX_S32 armSatRoundFloatToS32 (OMX_F64 Value)
+{
+ if (Value > 0)
+ {
+ Value += 0.5;
+
+ if(Value > (OMX_S32)OMX_MAX_S32 )
+ {
+ return (OMX_S32)OMX_MAX_S32;
+ }
+ else
+ {
+ return (OMX_S32)Value;
+ }
+ }
+ else
+ {
+ Value -= 0.5;
+
+ if(Value < (OMX_S32)OMX_MIN_S32 )
+ {
+ return (OMX_S32)OMX_MIN_S32;
+ }
+ else
+ {
+ return (OMX_S32)Value;
+ }
+ }
+}
+
+/**
+ * Function: armSatRoundFloatToU16
+ *
+ * Description:
+ * Converts a double precision value into a unsigned short int after rounding and saturation
+ *
+ * Parameters:
+ * [in] Value Float value to be converted
+ *
+ * Return Value:
+ * [out] converted value in OMX_U16 format
+ *
+ */
+
+OMX_U16 armSatRoundFloatToU16 (OMX_F64 Value)
+{
+ Value += 0.5;
+
+ if(Value > (OMX_U16)OMX_MAX_U16 )
+ {
+ return (OMX_U16)OMX_MAX_U16;
+ }
+ else
+ {
+ return (OMX_U16)Value;
+ }
+}
+
+/**
+ * Function: armSatRoundFloatToU32
+ *
+ * Description:
+ * Converts a double precision value into a unsigned int after rounding and saturation
+ *
+ * Parameters:
+ * [in] Value Float value to be converted
+ *
+ * Return Value:
+ * [out] converted value in OMX_U32 format
+ *
+ */
+
+OMX_U32 armSatRoundFloatToU32 (OMX_F64 Value)
+{
+ Value += 0.5;
+
+ if(Value > (OMX_U32)OMX_MAX_U32 )
+ {
+ return (OMX_U32)OMX_MAX_U32;
+ }
+ else
+ {
+ return (OMX_U32)Value;
+ }
+}
+
+/**
+ * Function: armRoundFloatToS64
+ *
+ * Description:
+ * Converts a double precision value into a 64 bit int after rounding
+ *
+ * Parameters:
+ * [in] Value Float value to be converted
+ *
+ * Return Value:
+ * [out] converted value in OMX_S64 format
+ *
+ */
+
+OMX_S64 armRoundFloatToS64 (OMX_F64 Value)
+{
+ if (Value > 0)
+ {
+ return (OMX_S64)(Value + .5);
+ }
+ else
+ {
+ return (OMX_S64)(Value - .5);
+ }
+}
+
+/**
+ * Function: armSignCheck
+ *
+ * Description:
+ * Checks the sign of a variable:
+ * returns 1 if it is Positive
+ * returns 0 if it is 0
+ * returns -1 if it is Negative
+ *
+ * Remarks:
+ *
+ * Parameters:
+ * [in] var Variable to be checked
+ *
+ * Return Value:
+ * OMX_INT -- returns 1 if it is Positive
+ * returns 0 if it is 0
+ * returns -1 if it is Negative
+ */
+
+OMX_INT armSignCheck (
+ OMX_S16 var
+)
+
+{
+ OMX_INT Sign;
+
+ if (var < 0)
+ {
+ Sign = -1;
+ }
+ else if ( var > 0)
+ {
+ Sign = 1;
+ }
+ else
+ {
+ Sign = 0;
+ }
+
+ return Sign;
+}
+
+/**
+ * Function: armClip
+ *
+ * Description: Clips the input between MAX and MIN value
+ *
+ *
+ * Remarks:
+ *
+ * Parameters:
+ * [in] Min lower bound
+ * [in] Max upper bound
+ * [in] src variable to the clipped
+ *
+ * Return Value:
+ * OMX_S32 -- returns clipped value
+ */
+
+OMX_S32 armClip (
+ OMX_INT min,
+ OMX_INT max,
+ OMX_S32 src
+)
+
+{
+ if (src > max)
+ {
+ src = max;
+ }
+ else if (src < min)
+ {
+ src = min;
+ }
+
+ return src;
+}
+
+/**
+ * Function: armClip_F32
+ *
+ * Description: Clips the input between MAX and MIN value
+ *
+ *
+ * Remarks:
+ *
+ * Parameters:
+ * [in] Min lower bound
+ * [in] Max upper bound
+ * [in] src variable to the clipped
+ *
+ * Return Value:
+ * OMX_F32 -- returns clipped value
+ */
+
+OMX_F32 armClip_F32 (
+ OMX_F32 min,
+ OMX_F32 max,
+ OMX_F32 src
+)
+
+{
+ if (src > max)
+ {
+ src = max;
+ }
+ else if (src < min)
+ {
+ src = min;
+ }
+
+ return src;
+}
+
+/**
+ * Function: armShiftSat_F32
+ *
+ * Description: Divides a float value by 2^shift and
+ * saturates it for unsigned value range for satBits.
+ * Second parameter is like "shifting" the corresponding
+ * integer value. Takes care of rounding while clipping the final
+ * value.
+ *
+ * Parameters:
+ * [in] v Number to be operated upon
+ * [in] shift Divides the input "v" by "2^shift"
+ * [in] satBits Final range is [0, 2^satBits)
+ *
+ * Return Value:
+ * OMX_S32 -- returns "shifted" saturated value
+ */
+
+OMX_U32 armShiftSat_F32(OMX_F32 v, OMX_INT shift, OMX_INT satBits)
+{
+ OMX_U32 allOnes = (OMX_U32)(-1);
+ OMX_U32 maxV = allOnes >> (32-satBits);
+ OMX_F32 vShifted, vRounded, shiftDiv = (OMX_F32)(1 << shift);
+ OMX_U32 vInt;
+ OMX_U32 vIntSat;
+
+ if(v <= 0)
+ return 0;
+
+ vShifted = v / shiftDiv;
+ vRounded = (OMX_F32)(vShifted + 0.5);
+ vInt = (OMX_U32)vRounded;
+ vIntSat = vInt;
+ if(vIntSat > maxV)
+ vIntSat = maxV;
+ return vIntSat;
+}
+
+/**
+ * Functions: armSwapElem
+ *
+ * Description:
+ * These function swaps two elements at the specified pointer locations.
+ * The size of each element could be anything as specified by <elemSize>
+ *
+ * Return Value:
+ * OMXResult -- Error status from the function
+ */
+OMXResult armSwapElem(
+ OMX_U8 *pBuf1,
+ OMX_U8 *pBuf2,
+ OMX_INT elemSize
+ )
+{
+ OMX_INT i;
+ OMX_U8 temp;
+ armRetArgErrIf(!pBuf1 || !pBuf2, OMX_Sts_BadArgErr);
+
+ for(i = 0; i < elemSize; i++)
+ {
+ temp = *(pBuf1 + i);
+ *(pBuf1 + i) = *(pBuf2 + i);
+ *(pBuf2 + i) = temp;
+ }
+ return OMX_Sts_NoErr;
+}
+
+/**
+ * Function: armMedianOf3
+ *
+ * Description: Finds the median of three numbers
+ *
+ * Remarks:
+ *
+ * Parameters:
+ * [in] fEntry First entry
+ * [in] sEntry second entry
+ * [in] tEntry Third entry
+ *
+ * Return Value:
+ * OMX_S32 -- returns the median value
+ */
+
+OMX_S32 armMedianOf3 (
+ OMX_S32 fEntry,
+ OMX_S32 sEntry,
+ OMX_S32 tEntry
+)
+{
+ OMX_S32 a, b, c;
+
+ a = armMin (fEntry, sEntry);
+ b = armMax (fEntry, sEntry);
+ c = armMin (b, tEntry);
+ return (armMax (a, c));
+}
+
+/**
+ * Function: armLogSize
+ *
+ * Description: Finds the size of a positive value and returns the same
+ *
+ * Remarks:
+ *
+ * Parameters:
+ * [in] value Positive value
+ *
+ * Return Value:
+ * OMX_U8 -- Returns the minimum number of bits required to represent the positive value.
+ This is the smallest k>=0 such that that value is less than (1<<k).
+ */
+
+OMX_U8 armLogSize (
+ OMX_U16 value
+)
+{
+ OMX_U8 i;
+ for ( i = 0; value > 0; value = value >> 1)
+ {
+ i++;
+ }
+ return i;
+}
+
+/***********************************************************************/
+ /* Saturating Arithmetic operations */
+
+/**
+ * Function :armSatAdd_S32()
+ *
+ * Description :
+ * Returns the result of saturated addition of the two inputs Value1, Value2
+ *
+ * Parametrs:
+ * [in] Value1 First Operand
+ * [in] Value2 Second Operand
+ *
+ * Return:
+ * [out] Result of operation
+ *
+ *
+ **/
+
+OMX_S32 armSatAdd_S32(OMX_S32 Value1,OMX_S32 Value2)
+{
+ OMX_S32 Result;
+
+ Result = Value1 + Value2;
+
+ if( (Value1^Value2) >= 0)
+ {
+ /*Same sign*/
+ if( (Result^Value1) >= 0)
+ {
+ /*Result has not saturated*/
+ return Result;
+ }
+ else
+ {
+ if(Value1 >= 0)
+ {
+ /*Result has saturated in positive side*/
+ return OMX_MAX_S32;
+ }
+ else
+ {
+ /*Result has saturated in negative side*/
+ return OMX_MIN_S32;
+ }
+
+ }
+
+ }
+ else
+ {
+ return Result;
+ }
+
+}
+
+/**
+ * Function :armSatAdd_S64()
+ *
+ * Description :
+ * Returns the result of saturated addition of the two inputs Value1, Value2
+ *
+ * Parametrs:
+ * [in] Value1 First Operand
+ * [in] Value2 Second Operand
+ *
+ * Return:
+ * [out] Result of operation
+ *
+ *
+ **/
+
+OMX_S64 armSatAdd_S64(OMX_S64 Value1,OMX_S64 Value2)
+{
+ OMX_S64 Result;
+
+ Result = Value1 + Value2;
+
+ if( (Value1^Value2) >= 0)
+ {
+ /*Same sign*/
+ if( (Result^Value1) >= 0)
+ {
+ /*Result has not saturated*/
+ return Result;
+ }
+ else
+ {
+ if(Value1 >= 0)
+ {
+ /*Result has saturated in positive side*/
+ Result = OMX_MAX_S64;
+ return Result;
+ }
+ else
+ {
+ /*Result has saturated in negative side*/
+ return OMX_MIN_S64;
+ }
+
+ }
+
+ }
+ else
+ {
+ return Result;
+ }
+
+}
+
+/** Function :armSatSub_S32()
+ *
+ * Description :
+ * Returns the result of saturated substraction of the two inputs Value1, Value2
+ *
+ * Parametrs:
+ * [in] Value1 First Operand
+ * [in] Value2 Second Operand
+ *
+ * Return:
+ * [out] Result of operation
+ *
+ **/
+
+OMX_S32 armSatSub_S32(OMX_S32 Value1,OMX_S32 Value2)
+{
+ OMX_S32 Result;
+
+ Result = Value1 - Value2;
+
+ if( (Value1^Value2) < 0)
+ {
+ /*Opposite sign*/
+ if( (Result^Value1) >= 0)
+ {
+ /*Result has not saturated*/
+ return Result;
+ }
+ else
+ {
+ if(Value1 >= 0)
+ {
+ /*Result has saturated in positive side*/
+ return OMX_MAX_S32;
+ }
+ else
+ {
+ /*Result has saturated in negative side*/
+ return OMX_MIN_S32;
+ }
+
+ }
+
+ }
+ else
+ {
+ return Result;
+ }
+
+}
+
+/**
+ * Function :armSatMac_S32()
+ *
+ * Description :
+ * Returns the result of Multiplication of Value1 and Value2 and subesquent saturated
+ * accumulation with Mac
+ *
+ * Parametrs:
+ * [in] Value1 First Operand
+ * [in] Value2 Second Operand
+ * [in] Mac Accumulator
+ *
+ * Return:
+ * [out] Result of operation
+ **/
+
+OMX_S32 armSatMac_S32(OMX_S32 Mac,OMX_S16 Value1,OMX_S16 Value2)
+{
+ OMX_S32 Result;
+
+ Result = (OMX_S32)(Value1*Value2);
+ Result = armSatAdd_S32( Mac , Result );
+
+ return Result;
+}
+
+/**
+ * Function :armSatMac_S16S32_S32
+ *
+ * Description :
+ * Returns the result of saturated MAC operation of the three inputs delayElem, filTap , mac
+ *
+ * mac = mac + Saturate_in_32Bits(delayElem * filTap)
+ *
+ * Parametrs:
+ * [in] delayElem First 32 bit Operand
+ * [in] filTap Second 16 bit Operand
+ * [in] mac Result of MAC operation
+ *
+ * Return:
+ * [out] mac Result of operation
+ *
+ **/
+
+OMX_S32 armSatMac_S16S32_S32(OMX_S32 mac, OMX_S32 delayElem, OMX_S16 filTap )
+{
+
+ OMX_S32 result;
+
+ result = armSatMulS16S32_S32(filTap,delayElem);
+
+ if ( result > OMX_MAX_S16 )
+ {
+ result = OMX_MAX_S32;
+ }
+ else if( result < OMX_MIN_S16 )
+ {
+ result = OMX_MIN_S32;
+ }
+ else
+ {
+ result = delayElem * filTap;
+ }
+
+ mac = armSatAdd_S32(mac,result);
+
+ return mac;
+}
+
+
+/**
+ * Function :armSatRoundRightShift_S32_S16
+ *
+ * Description :
+ * Returns the result of rounded right shift operation of input by the scalefactor
+ *
+ * output = Saturate_in_16Bits( ( Right/LeftShift( (Round(input) , shift ) )
+ *
+ * Parametrs:
+ * [in] input The input to be operated on
+ * [in] shift The shift number
+ *
+ * Return:
+ * [out] Result of operation
+ *
+ **/
+
+
+OMX_S16 armSatRoundRightShift_S32_S16(OMX_S32 input, OMX_INT shift)
+{
+ input = armSatRoundLeftShift_S32(input,-shift);
+
+ if ( input > OMX_MAX_S16 )
+ {
+ return (OMX_S16)OMX_MAX_S16;
+ }
+ else if (input < OMX_MIN_S16)
+ {
+ return (OMX_S16)OMX_MIN_S16;
+ }
+ else
+ {
+ return (OMX_S16)input;
+ }
+
+}
+
+/**
+ * Function :armSatRoundLeftShift_S32()
+ *
+ * Description :
+ * Returns the result of saturating left-shift operation on input
+ * Or rounded Right shift if the input Shift is negative.
+ *
+ * Parametrs:
+ * [in] Value Operand
+ * [in] Shift Operand for shift operation
+ *
+ * Return:
+ * [out] Result of operation
+ *
+ **/
+
+OMX_S32 armSatRoundLeftShift_S32(OMX_S32 Value, OMX_INT Shift)
+{
+ OMX_INT i;
+
+ if (Shift < 0)
+ {
+ Shift = -Shift;
+ Value = armSatAdd_S32(Value, (1 << (Shift - 1)));
+ Value = Value >> Shift;
+ }
+ else
+ {
+ for (i = 0; i < Shift; i++)
+ {
+ Value = armSatAdd_S32(Value, Value);
+ }
+ }
+ return Value;
+}
+
+/**
+ * Function :armSatRoundLeftShift_S64()
+ *
+ * Description :
+ * Returns the result of saturating left-shift operation on input
+ * Or rounded Right shift if the input Shift is negative.
+ *
+ * Parametrs:
+ * [in] Value Operand
+ * [in] shift Operand for shift operation
+ *
+ * Return:
+ * [out] Result of operation
+ *
+ **/
+
+OMX_S64 armSatRoundLeftShift_S64(OMX_S64 Value, OMX_INT Shift)
+{
+ OMX_INT i;
+
+ if (Shift < 0)
+ {
+ Shift = -Shift;
+ Value = armSatAdd_S64(Value, ((OMX_S64)1 << (Shift - 1)));
+ Value = Value >> Shift;
+ }
+ else
+ {
+ for (i = 0; i < Shift; i++)
+ {
+ Value = armSatAdd_S64(Value, Value);
+ }
+ }
+ return Value;
+}
+
+/**
+ * Function :armSatMulS16S32_S32()
+ *
+ * Description :
+ * Returns the result of a S16 data type multiplied with an S32 data type
+ * in a S32 container
+ *
+ * Parametrs:
+ * [in] input1 Operand 1
+ * [in] input2 Operand 2
+ *
+ * Return:
+ * [out] Result of operation
+ *
+ **/
+
+
+OMX_S32 armSatMulS16S32_S32(OMX_S16 input1,OMX_S32 input2)
+{
+ OMX_S16 hi2,lo1;
+ OMX_U16 lo2;
+
+ OMX_S32 temp1,temp2;
+ OMX_S32 result;
+
+ lo1 = input1;
+
+ hi2 = ( input2 >> 16 );
+ lo2 = ( (OMX_U32)( input2 << 16 ) >> 16 );
+
+ temp1 = hi2 * lo1;
+ temp2 = ( lo2* lo1 ) >> 16;
+
+ result = armSatAdd_S32(temp1,temp2);
+
+ return result;
+}
+
+/**
+ * Function :armSatMulS32S32_S32()
+ *
+ * Description :
+ * Returns the result of a S32 data type multiplied with an S32 data type
+ * in a S32 container
+ *
+ * Parametrs:
+ * [in] input1 Operand 1
+ * [in] input2 Operand 2
+ *
+ * Return:
+ * [out] Result of operation
+ *
+ **/
+
+OMX_S32 armSatMulS32S32_S32(OMX_S32 input1,OMX_S32 input2)
+{
+ OMX_S16 hi1,hi2;
+ OMX_U16 lo1,lo2;
+
+ OMX_S32 temp1,temp2,temp3;
+ OMX_S32 result;
+
+ hi1 = ( input1 >> 16 );
+ lo1 = ( (OMX_U32)( input1 << 16 ) >> 16 );
+
+ hi2 = ( input2 >> 16 );
+ lo2 = ( (OMX_U32)( input2 << 16 ) >> 16 );
+
+ temp1 = hi1 * hi2;
+ temp2 = ( hi1* lo2 ) >> 16;
+ temp3 = ( hi2* lo1 ) >> 16;
+
+ result = armSatAdd_S32(temp1,temp2);
+ result = armSatAdd_S32(result,temp3);
+
+ return result;
+}
+
+/**
+ * Function :armIntDivAwayFromZero()
+ *
+ * Description : Integer division with rounding to the nearest integer.
+ * Half-integer values are rounded away from zero
+ * unless otherwise specified. For example 3//2 is rounded
+ * to 2, and -3//2 is rounded to -2.
+ *
+ * Parametrs:
+ * [in] Num Operand 1
+ * [in] Deno Operand 2
+ *
+ * Return:
+ * [out] Result of operation input1//input2
+ *
+ **/
+
+OMX_S32 armIntDivAwayFromZero (OMX_S32 Num, OMX_S32 Deno)
+{
+ OMX_F64 result;
+
+ result = ((OMX_F64)Num)/((OMX_F64)Deno);
+
+ if (result >= 0)
+ {
+ result += 0.5;
+ }
+ else
+ {
+ result -= 0.5;
+ }
+
+ return (OMX_S32)(result);
+}
+
+
+/*End of File*/
+
diff --git a/dl/armCOMM.h b/dl/armCOMM.h
new file mode 100644
index 0000000..de46c65
--- /dev/null
+++ b/dl/armCOMM.h
@@ -0,0 +1,778 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ *
+ * This file was originally licensed as follows. It has been
+ * relicensed with permission from the copyright holders.
+ */
+
+/**
+ *
+ * File Name: armCOMM.h
+ * OpenMAX DL: v1.0.2
+ * Last Modified Revision: 15331
+ * Last Modified Date: Fri, 24 Oct 2008
+ *
+ * (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+ *
+ *
+ *
+ * File: armCOMM.h
+ * Brief: Declares Common APIs/Data Types used across OpenMAX API's
+ *
+ */
+
+
+#ifndef _armCOMM_H_
+#define _armCOMM_H_
+
+#include "omxtypes.h"
+
+/* Used by both IP and IC domains for 8x8 JPEG blocks. */
+typedef OMX_S16 ARM_BLOCK8x8[64];
+
+
+#include "armOMX.h"
+
+#define armPI (OMX_F64)(3.1415926535897932384626433832795)
+
+/***********************************************************************/
+
+/* Compiler extensions */
+#ifdef ARM_DEBUG
+/* debug version */
+#include <stdlib.h>
+#include <assert.h>
+#include <stdio.h>
+#define armError(str) {printf((str)); printf("\n"); exit(-1);}
+#define armWarn(str) {printf((str)); printf("\n");}
+#define armIgnore(a) ((void)a)
+#define armAssert(a) assert(a)
+#else
+/* release version */
+#define armError(str) ((void) (str))
+#define armWarn(str) ((void) (str))
+#define armIgnore(a) ((void) (a))
+#define armAssert(a) ((void) (a))
+#endif /* ARM_DEBUG */
+
+/* Arithmetic operations */
+
+#define armMin(a,b) ( (a) > (b) ? (b):(a) )
+#define armMax(a,b) ( (a) > (b) ? (a):(b) )
+#define armAbs(a) ( (a) < 0 ? -(a):(a) )
+
+/* Alignment operation */
+
+#define armAlignToBytes(Ptr,N) (Ptr + ( ((N-(int)Ptr)&(N-1)) / sizeof(*Ptr) ))
+#define armAlignTo2Bytes(Ptr) armAlignToBytes(Ptr,2)
+#define armAlignTo4Bytes(Ptr) armAlignToBytes(Ptr,4)
+#define armAlignTo8Bytes(Ptr) armAlignToBytes(Ptr,8)
+#define armAlignTo16Bytes(Ptr) armAlignToBytes(Ptr,16)
+
+/* Error and Alignment check */
+
+#define armRetArgErrIf(condition, code) if(condition) { return (code); }
+#define armRetDataErrIf(condition, code) if(condition) { return (code); }
+
+#define armIsByteAligned(Ptr,N) ((((int)(Ptr)) % N)==0)
+#define armNotByteAligned(Ptr,N) ((((int)(Ptr)) % N)!=0)
+
+#define armIs2ByteAligned(Ptr) armIsByteAligned(Ptr,2)
+#define armIs4ByteAligned(Ptr) armIsByteAligned(Ptr,4)
+#define armIs8ByteAligned(Ptr) armIsByteAligned(Ptr,8)
+#define armIs16ByteAligned(Ptr) armIsByteAligned(Ptr,16)
+
+#define armNot2ByteAligned(Ptr) armNotByteAligned(Ptr,2)
+#define armNot4ByteAligned(Ptr) armNotByteAligned(Ptr,4)
+#define armNot8ByteAligned(Ptr) armNotByteAligned(Ptr,8)
+#define armNot16ByteAligned(Ptr) armNotByteAligned(Ptr,16)
+#define armNot32ByteAligned(Ptr) armNotByteAligned(Ptr,32)
+
+/**
+ * Function: armRoundFloatToS16_ref/armRoundFloatToS32_ref/armRoundFloatToS64
+ *
+ * Description:
+ * Converts a double precision value into a short int/int after rounding
+ *
+ * Parameters:
+ * [in] Value Float value to be converted
+ *
+ * Return Value:
+ * [out] converted value in OMX_S16/OMX_S32 format
+ *
+ */
+
+OMX_S16 armRoundFloatToS16 (OMX_F64 Value);
+OMX_S32 armRoundFloatToS32 (OMX_F64 Value);
+OMX_S64 armRoundFloatToS64 (OMX_F64 Value);
+
+/**
+ * Function: armSatRoundFloatToS16_ref/armSatRoundFloatToS32
+ *
+ * Description:
+ * Converts a double precision value into a short int/int after rounding and saturation
+ *
+ * Parameters:
+ * [in] Value Float value to be converted
+ *
+ * Return Value:
+ * [out] converted value in OMX_S16/OMX_S32 format
+ *
+ */
+
+OMX_S16 armSatRoundFloatToS16 (OMX_F64 Value);
+OMX_S32 armSatRoundFloatToS32 (OMX_F64 Value);
+
+/**
+ * Function: armSatRoundFloatToU16_ref/armSatRoundFloatToU32
+ *
+ * Description:
+ * Converts a double precision value into a unsigned short int/int after rounding and saturation
+ *
+ * Parameters:
+ * [in] Value Float value to be converted
+ *
+ * Return Value:
+ * [out] converted value in OMX_U16/OMX_U32 format
+ *
+ */
+
+OMX_U16 armSatRoundFloatToU16 (OMX_F64 Value);
+OMX_U32 armSatRoundFloatToU32 (OMX_F64 Value);
+
+/**
+ * Function: armSignCheck
+ *
+ * Description:
+ * Checks the sign of a variable:
+ * returns 1 if it is Positive
+ * returns 0 if it is 0
+ * returns -1 if it is Negative
+ *
+ * Remarks:
+ *
+ * Parameters:
+ * [in] var Variable to be checked
+ *
+ * Return Value:
+ * OMX_INT -- returns 1 if it is Positive
+ * returns 0 if it is 0
+ * returns -1 if it is Negative
+ */
+
+OMX_INT armSignCheck (OMX_S16 var);
+
+/**
+ * Function: armClip
+ *
+ * Description: Clips the input between MAX and MIN value
+ *
+ *
+ * Remarks:
+ *
+ * Parameters:
+ * [in] Min lower bound
+ * [in] Max upper bound
+ * [in] src variable to the clipped
+ *
+ * Return Value:
+ * OMX_S32 -- returns clipped value
+ */
+
+OMX_S32 armClip (
+ OMX_INT min,
+ OMX_INT max,
+ OMX_S32 src
+ );
+
+/**
+ * Function: armClip_F32
+ *
+ * Description: Clips the input between MAX and MIN value
+ *
+ *
+ * Remarks:
+ *
+ * Parameters:
+ * [in] Min lower bound
+ * [in] Max upper bound
+ * [in] src variable to the clipped
+ *
+ * Return Value:
+ * OMX_F32 -- returns clipped value
+ */
+
+OMX_F32 armClip_F32 (
+ OMX_F32 min,
+ OMX_F32 max,
+ OMX_F32 src
+ );
+
+/**
+ * Function: armShiftSat_F32
+ *
+ * Description: Divides a float value by 2^shift and
+ * saturates it for unsigned value range for satBits.
+ * Second parameter is like "shifting" the corresponding
+ * integer value. Takes care of rounding while clipping the final
+ * value.
+ *
+ * Parameters:
+ * [in] v Number to be operated upon
+ * [in] shift Divides the input "v" by "2^shift"
+ * [in] satBits Final range is [0, 2^satBits)
+ *
+ * Return Value:
+ * OMX_S32 -- returns "shifted" saturated value
+ */
+
+OMX_U32 armShiftSat_F32(
+ OMX_F32 v,
+ OMX_INT shift,
+ OMX_INT satBits
+ );
+
+/**
+ * Functions: armSwapElem
+ *
+ * Description:
+ * This function swaps two elements at the specified pointer locations.
+ * The size of each element could be anything as specified by <elemSize>
+ *
+ * Return Value:
+ * OMXResult -- Error status from the function
+ */
+OMXResult armSwapElem(OMX_U8 *pBuf1, OMX_U8 *pBuf2, OMX_INT elemSize);
+
+
+/**
+ * Function: armMedianOf3
+ *
+ * Description: Finds the median of three numbers
+ *
+ * Remarks:
+ *
+ * Parameters:
+ * [in] fEntry First entry
+ * [in] sEntry second entry
+ * [in] tEntry Third entry
+ *
+ * Return Value:
+ * OMX_S32 -- returns the median value
+ */
+
+OMX_S32 armMedianOf3 (
+ OMX_S32 fEntry,
+ OMX_S32 sEntry,
+ OMX_S32 tEntry
+ );
+
+/**
+ * Function: armLogSize
+ *
+ * Description: Finds the size of a positive value and returns the same
+ *
+ * Remarks:
+ *
+ * Parameters:
+ * [in] value Positive value
+ *
+ * Return Value:
+ * OMX_U8 -- returns the size of the positive value
+ */
+
+OMX_U8 armLogSize (
+ OMX_U16 value
+ );
+
+/***********************************************************************/
+ /* Saturating Arithmetic operations */
+
+/**
+ * Function :armSatAdd_S32()
+ *
+ * Description :
+ * Returns the result of saturated addition of the two inputs Value1, Value2
+ *
+ * Parametrs:
+ * [in] Value1 First Operand
+ * [in] Value2 Second Operand
+ *
+ * Return:
+ * [out] Result of operation
+ *
+ *
+ **/
+
+OMX_S32 armSatAdd_S32(
+ OMX_S32 Value1,
+ OMX_S32 Value2
+ );
+
+/**
+ * Function :armSatAdd_S64()
+ *
+ * Description :
+ * Returns the result of saturated addition of the two inputs Value1, Value2
+ *
+ * Parametrs:
+ * [in] Value1 First Operand
+ * [in] Value2 Second Operand
+ *
+ * Return:
+ * [out] Result of operation
+ *
+ *
+ **/
+
+OMX_S64 armSatAdd_S64(
+ OMX_S64 Value1,
+ OMX_S64 Value2
+ );
+
+/** Function :armSatSub_S32()
+ *
+ * Description :
+ * Returns the result of saturated substraction of the two inputs Value1, Value2
+ *
+ * Parametrs:
+ * [in] Value1 First Operand
+ * [in] Value2 Second Operand
+ *
+ * Return:
+ * [out] Result of operation
+ *
+ **/
+
+OMX_S32 armSatSub_S32(
+ OMX_S32 Value1,
+ OMX_S32 Value2
+ );
+
+/**
+ * Function :armSatMac_S32()
+ *
+ * Description :
+ * Returns the result of Multiplication of Value1 and Value2 and subesquent saturated
+ * accumulation with Mac
+ *
+ * Parametrs:
+ * [in] Value1 First Operand
+ * [in] Value2 Second Operand
+ * [in] Mac Accumulator
+ *
+ * Return:
+ * [out] Result of operation
+ **/
+
+OMX_S32 armSatMac_S32(
+ OMX_S32 Mac,
+ OMX_S16 Value1,
+ OMX_S16 Value2
+ );
+
+/**
+ * Function :armSatMac_S16S32_S32
+ *
+ * Description :
+ * Returns the result of saturated MAC operation of the three inputs delayElem, filTap , mac
+ *
+ * mac = mac + Saturate_in_32Bits(delayElem * filTap)
+ *
+ * Parametrs:
+ * [in] delayElem First 32 bit Operand
+ * [in] filTap Second 16 bit Operand
+ * [in] mac Result of MAC operation
+ *
+ * Return:
+ * [out] mac Result of operation
+ *
+ **/
+
+OMX_S32 armSatMac_S16S32_S32(
+ OMX_S32 mac,
+ OMX_S32 delayElem,
+ OMX_S16 filTap );
+
+/**
+ * Function :armSatRoundRightShift_S32_S16
+ *
+ * Description :
+ * Returns the result of rounded right shift operation of input by the scalefactor
+ *
+ * output = Saturate_in_16Bits( ( RightShift( (Round(input) , scaleFactor ) )
+ *
+ * Parametrs:
+ * [in] input The input to be operated on
+ * [in] scaleFactor The shift number
+ *
+ * Return:
+ * [out] Result of operation
+ *
+ **/
+
+
+OMX_S16 armSatRoundRightShift_S32_S16(
+ OMX_S32 input,
+ OMX_INT scaleFactor);
+
+/**
+ * Function :armSatRoundLeftShift_S32()
+ *
+ * Description :
+ * Returns the result of saturating left-shift operation on input
+ * Or rounded Right shift if the input Shift is negative.
+ *
+ * Parametrs:
+ * [in] Value Operand
+ * [in] shift Operand for shift operation
+ *
+ * Return:
+ * [out] Result of operation
+ *
+ **/
+
+OMX_S32 armSatRoundLeftShift_S32(
+ OMX_S32 Value,
+ OMX_INT shift
+ );
+
+/**
+ * Function :armSatRoundLeftShift_S64()
+ *
+ * Description :
+ * Returns the result of saturating left-shift operation on input
+ * Or rounded Right shift if the input Shift is negative.
+ *
+ * Parametrs:
+ * [in] Value Operand
+ * [in] shift Operand for shift operation
+ *
+ * Return:
+ * [out] Result of operation
+ *
+ **/
+
+OMX_S64 armSatRoundLeftShift_S64(
+ OMX_S64 Value,
+ OMX_INT shift
+ );
+
+/**
+ * Function :armSatMulS16S32_S32()
+ *
+ * Description :
+ * Returns the result of a S16 data type multiplied with an S32 data type
+ * in a S32 container
+ *
+ * Parametrs:
+ * [in] input1 Operand 1
+ * [in] input2 Operand 2
+ *
+ * Return:
+ * [out] Result of operation
+ *
+ **/
+
+
+OMX_S32 armSatMulS16S32_S32(
+ OMX_S16 input1,
+ OMX_S32 input2);
+
+/**
+ * Function :armSatMulS32S32_S32()
+ *
+ * Description :
+ * Returns the result of a S32 data type multiplied with an S32 data type
+ * in a S32 container
+ *
+ * Parametrs:
+ * [in] input1 Operand 1
+ * [in] input2 Operand 2
+ *
+ * Return:
+ * [out] Result of operation
+ *
+ **/
+
+OMX_S32 armSatMulS32S32_S32(
+ OMX_S32 input1,
+ OMX_S32 input2);
+
+
+/**
+ * Function :armIntDivAwayFromZero()
+ *
+ * Description : Integer division with rounding to the nearest integer.
+ * Half-integer values are rounded away from zero
+ * unless otherwise specified. For example 3/2 is rounded
+ * to 2, and -3/2 is rounded to -2.
+ *
+ * Parametrs:
+ * [in] Num Operand 1
+ * [in] Deno Operand 2
+ *
+ * Return:
+ * [out] Result of operation input1/input2
+ *
+ **/
+
+OMX_S32 armIntDivAwayFromZero (OMX_S32 Num, OMX_S32 Deno);
+
+
+/***********************************************************************/
+/*
+ * Debugging macros
+ *
+ */
+
+
+/*
+ * Definition of output stream - change to stderr if necessary
+ */
+#define DEBUG_STREAM stdout
+
+/*
+ * Debug printf macros, one for each argument count.
+ * Add more if needed.
+ */
+#ifdef DEBUG_ON
+#include <stdio.h>
+
+#define DEBUG_PRINTF_0(a) fprintf(DEBUG_STREAM, a)
+#define DEBUG_PRINTF_1(a, b) fprintf(DEBUG_STREAM, a, b)
+#define DEBUG_PRINTF_2(a, b, c) fprintf(DEBUG_STREAM, a, b, c)
+#define DEBUG_PRINTF_3(a, b, c, d) fprintf(DEBUG_STREAM, a, b, c, d)
+#define DEBUG_PRINTF_4(a, b, c, d, e) fprintf(DEBUG_STREAM, a, b, c, d, e)
+#define DEBUG_PRINTF_5(a, b, c, d, e, f) fprintf(DEBUG_STREAM, a, b, c, d, e, f)
+#define DEBUG_PRINTF_6(a, b, c, d, e, f, g) fprintf(DEBUG_STREAM, a, b, c, d, e, f, g)
+#define DEBUG_PRINTF_7(a, b, c, d, e, f, g, h) fprintf(DEBUG_STREAM, a, b, c, d, e, f, g, h)
+#define DEBUG_PRINTF_8(a, b, c, d, e, f, g, h, i) fprintf(DEBUG_STREAM, a, b, c, d, e, f, g, h, i)
+#define DEBUG_PRINTF_9(a, b, c, d, e, f, g, h, i, j) fprintf(DEBUG_STREAM, a, b, c, d, e, f, g, h, i, j)
+#define DEBUG_PRINTF_10(a, b, c, d, e, f, g, h, i, j, k) fprintf(DEBUG_STREAM, a, b, c, d, e, f, g, h, i, j, k)
+#define DEBUG_PRINTF_11(a, b, c, d, e, f, g, h, i, j, k, l) fprintf(DEBUG_STREAM, a, b, c, d, e, f, g, h, i, j, k, l)
+#define DEBUG_PRINTF_12(a, b, c, d, e, f, g, h, i, j, k, l, m) fprintf(DEBUG_STREAM, a, b, c, d, e, f, g, h, i, j, k, l, m)
+#define DEBUG_PRINTF_13(a, b, c, d, e, f, g, h, i, j, k, l, m, n) fprintf(DEBUG_STREAM, a, b, c, d, e, f, g, h, i, j, k, l, m, n)
+#define DEBUG_PRINTF_14(a, b, c, d, e, f, g, h, i, j, k, l, m, n, o) fprintf(DEBUG_STREAM, a, b, c, d, e, f, g, h, i, j, k, l, m, n, o)
+#else /* DEBUG_ON */
+#define DEBUG_PRINTF_0(a)
+#define DEBUG_PRINTF_1(a, b)
+#define DEBUG_PRINTF_2(a, b, c)
+#define DEBUG_PRINTF_3(a, b, c, d)
+#define DEBUG_PRINTF_4(a, b, c, d, e)
+#define DEBUG_PRINTF_5(a, b, c, d, e, f)
+#define DEBUG_PRINTF_6(a, b, c, d, e, f, g)
+#define DEBUG_PRINTF_7(a, b, c, d, e, f, g, h)
+#define DEBUG_PRINTF_8(a, b, c, d, e, f, g, h, i)
+#define DEBUG_PRINTF_9(a, b, c, d, e, f, g, h, i, j)
+#define DEBUG_PRINTF_10(a, b, c, d, e, f, g, h, i, j, k)
+#define DEBUG_PRINTF_11(a, b, c, d, e, f, g, h, i, j, k, l)
+#define DEBUG_PRINTF_12(a, b, c, d, e, f, g, h, i, j, k, l, m)
+#define DEBUG_PRINTF_13(a, b, c, d, e, f, g, h, i, j, k, l, m, n)
+#define DEBUG_PRINTF_14(a, b, c, d, e, f, g, h, i, j, k, l, m, n, o)
+#endif /* DEBUG_ON */
+
+
+/*
+ * Domain and sub domain definitions
+ *
+ * In order to turn on debug for an entire domain or sub-domain
+ * at compile time, one of the DEBUG_DOMAIN_* below may be defined,
+ * which will activate debug in all of the defines it contains.
+ */
+
+#ifdef DEBUG_DOMAIN_AC
+#define DEBUG_OMXACAAC_DECODECHANPAIRELT_MPEG4
+#define DEBUG_OMXACAAC_DECODECHANPAIRELT
+#define DEBUG_OMXACAAC_DECODEDATSTRELT
+#define DEBUG_OMXACAAC_DECODEFILLELT
+#define DEBUG_OMXACAAC_DECODEISSTEREO_S32
+#define DEBUG_OMXACAAC_DECODEMSPNS_S32
+#define DEBUG_OMXACAAC_DECODEMSSTEREO_S32_I
+#define DEBUG_OMXACAAC_DECODEPRGCFGELT
+#define DEBUG_OMXACAAC_DECODETNS_S32_I
+#define DEBUG_OMXACAAC_DEINTERLEAVESPECTRUM_S32
+#define DEBUG_OMXACAAC_ENCODETNS_S32_I
+#define DEBUG_OMXACAAC_LONGTERMPREDICT_S32
+#define DEBUG_OMXACAAC_LONGTERMRECONSTRUCT_S32
+#define DEBUG_OMXACAAC_MDCTFWD_S32
+#define DEBUG_OMXACAAC_MDCTINV_S32_S16
+#define DEBUG_OMXACAAC_NOISELESSDECODE
+#define DEBUG_OMXACAAC_QUANTINV_S32_I
+#define DEBUG_OMXACAAC_UNPACKADIFHEADER
+#define DEBUG_OMXACAAC_UNPACKADTSFRAMEHEADER
+#define DEBUG_OMXACMP3_HUFFMANDECODESFBMBP_S32
+#define DEBUG_OMXACMP3_HUFFMANDECODESFB_S32
+#define DEBUG_OMXACMP3_HUFFMANDECODE_S32
+#define DEBUG_OMXACMP3_MDCTINV_S32
+#define DEBUG_OMXACMP3_REQUANTIZESFB_S32_I
+#define DEBUG_OMXACMP3_REQUANTIZE_S32_I
+#define DEBUG_OMXACMP3_SYNTHPQMF_S32_S16
+#define DEBUG_OMXACMP3_UNPACKFRAMEHEADER
+#define DEBUG_OMXACMP3_UNPACKSCALEFACTORS_S8
+#define DEBUG_OMXACMP3_UNPACKSIDEINFO
+#endif /* DEBUG_DOMAIN_AC */
+
+
+#ifdef DEBUG_DOMAIN_VC
+#define DEBUG_OMXVCM4P10_AVERAGE_16X
+#define DEBUG_OMXVCM4P10_AVERAGE_4X
+#define DEBUG_OMXVCM4P10_AVERAGE_8X
+#define DEBUG_OMXVCM4P10_DEBLOCKCHROMA_U8_C1IR
+#define DEBUG_OMXVCM4P10_DEBLOCKLUMA_U8_C1IR
+#define DEBUG_OMXVCM4P10_DECODECHROMADCCOEFFSTOPAIRCAVLC_U8
+#define DEBUG_OMXVCM4P10_DECODECOEFFSTOPAIRCAVLC_U8
+#define DEBUG_OMXVCM4P10_DEQUANTTRANSFORMACFROMPAIR_U8_S16_C1_DLX
+#define DEBUG_OMXVCM4P10_EXPANDFRAME
+#define DEBUG_OMXVCM4P10_FILTERDEBLOCKINGCHROMA_HOREDGE_U8_C1IR
+#define DEBUG_OMXVCM4P10_FILTERDEBLOCKINGCHROMA_VEREDGE_U8_C1IR
+#define DEBUG_OMXVCM4P10_FILTERDEBLOCKINGLUMA_HOREDGE_U8_C1IR
+#define DEBUG_OMXVCM4P10_FILTERDEBLOCKINGLUMA_VEREDGE_U8_C1IR
+#define DEBUG_OMXVCM4P10_PREDICTINTRACHROMA8X8_U8_C1R
+#define DEBUG_OMXVCM4P10_PREDICTINTRA_16X16_U8_C1R
+#define DEBUG_OMXVCM4P10_PREDICTINTRA_4X4_U8_C1R
+#define DEBUG_OMXVCM4P10_SADQUAR_16X
+#define DEBUG_OMXVCM4P10_SADQUAR_4X
+#define DEBUG_OMXVCM4P10_SADQUAR_8X
+#define DEBUG_OMXVCM4P10_SAD_16X
+#define DEBUG_OMXVCM4P10_SAD_4X
+#define DEBUG_OMXVCM4P10_SAD_8X
+#define DEBUG_OMXVCM4P10_SATD_4X4
+#define DEBUG_OMXVCM4P10_TRANSFORMDEQUANTCHROMADCFROMPAIR_U8_S16_C1
+#define DEBUG_OMXVCM4P10_TRANSFORMDEQUANTLUMADCFROMPAIR_U8_S16_C1
+#define DEBUG_OMXVCM4P10_TRANSFORMQUANT_CHROMADC
+#define DEBUG_OMXVCM4P10_TRANSFORMQUANT_LUMADC
+#define DEBUG_OMXVCM4P2_BLOCKMATCH_HALF_16X16
+#define DEBUG_OMXVCM4P2_BLOCKMATCH_HALF_8X8
+#define DEBUG_OMXVCM4P2_BLOCKMATCH_INTEGER_16X16
+#define DEBUG_OMXVCM4P2_BLOCKMATCH_INTEGER_8X8
+#define DEBUG_OMXVCM4P2_COMPUTETEXTUREERRORBLOCK_SAD_U8_S16
+#define DEBUG_OMXVCM4P2_COMPUTETEXTUREERRORBLOCK_U8_S16
+#define DEBUG_OMXVCM4P2_DCT8X8BLKDLX
+#define DEBUG_OMXVCM4P2_DECODEBLOCKCOEF_INTER_S16
+#define DEBUG_OMXVCM4P2_DECODEPADMV_PVOP
+#define DEBUG_OMXVCM4P2_DECODEVLCZIGZAG_INTER_S16
+#define DEBUG_OMXVCM4P2_DECODEVLCZIGZAG_INTRAACVLC_S16
+#define DEBUG_OMXVCM4P2_DECODEVLCZIGZAG_INTRADCVLC_S16
+#define DEBUG_OMXVCM4P2_ENCODEMV_U8_S16
+#define DEBUG_OMXVCM4P2_ENCODEVLCZIGZAG_INTER_S16
+#define DEBUG_OMXVCM4P2_ENCODEVLCZIGZAG_INTRAACVLC_S16
+#define DEBUG_OMXVCM4P2_ENCODEVLCZIGZAG_INTRADCVLC_S16
+#define DEBUG_OMXVCM4P2_FINDMVPRED
+#define DEBUG_OMXVCM4P2_IDCT8X8BLKDLX
+#define DEBUG_OMXVCM4P2_LIMITMVTORECT
+#define DEBUG_OMXVCM4P2_MOTIONESTIMATIONMB
+#define DEBUG_OMXVCM4P2_PADMBGRAY_U8
+#define DEBUG_OMXVCM4P2_PADMBHORIZONTAL_U8
+#define DEBUG_OMXVCM4P2_PADMBVERTICAL_U8
+#define DEBUG_OMXVCM4P2_PADMV
+#define DEBUG_OMXVCM4P2_QUANTINTER_S16_I
+#define DEBUG_OMXVCM4P2_QUANTINTRA_S16_I
+#define DEBUG_OMXVCM4P2_QUANTINVINTER_S16_I
+#define DEBUG_OMXVCM4P2_QUANTINVINTRA_S16_I
+#define DEBUG_OMXVCM4P2_TRANSRECBLOCKCEOF_INTER
+#define DEBUG_OMXVCM4P2_TRANSRECBLOCKCEOF_INTRA
+#endif /* DEBUG_DOMAIN_VC */
+
+
+#ifdef DEBUG_DOMAIN_IC
+/* To be filled in */
+#endif /* DEBUG_DOMAIN_IC */
+
+
+#ifdef DEBUG_DOMAIN_SP
+#define DEBUG_OMXACSP_DOTPROD_S16
+#define DEBUG_OMXACSP_BLOCKEXP_S16
+#define DEBUG_OMXACSP_BLOCKEXP_S32
+#define DEBUG_OMXACSP_COPY_S16
+#define DEBUG_OMXACSP_DOTPROD_S16
+#define DEBUG_OMXACSP_DOTPROD_S16_SFS
+#define DEBUG_OMXACSP_FFTFWD_CTOC_SC16_SFS
+#define DEBUG_OMXACSP_FFTFWD_CTOC_SC32_SFS
+#define DEBUG_OMXACSP_FFTFWD_RTOCCS_S16S32_SFS
+#define DEBUG_OMXACSP_FFTFWD_RTOCCS_S32_SFS
+#define DEBUG_OMXACSP_FFTGETBUFSIZE_C_SC16
+#define DEBUG_OMXACSP_FFTGETBUFSIZE_C_SC32
+#define DEBUG_OMXACSP_FFTGETBUFSIZE_R_S16_S32
+#define DEBUG_OMXACSP_FFTGETBUFSIZE_R_S32
+#define DEBUG_OMXACSP_FFTINIT_C_SC16
+#define DEBUG_OMXACSP_FFTINIT_C_SC32
+#define DEBUG_OMXACSP_FFTINIT_R_S16_S32
+#define DEBUG_OMXACSP_FFTINIT_R_S32
+#define DEBUG_OMXACSP_FFTINV_CCSTOR_S32S16_SFS
+#define DEBUG_OMXACSP_FFTINV_CCSTOR_S32_SFS
+#define DEBUG_OMXACSP_FFTINV_CTOC_SC16_SFS
+#define DEBUG_OMXACSP_FFTINV_CTOC_SC32_SFS
+#define DEBUG_OMXACSP_FILTERMEDIAN_S32_I
+#define DEBUG_OMXACSP_FILTERMEDIAN_S32
+#define DEBUG_OMXACSP_FIRONE_DIRECT_S16_ISFS
+#define DEBUG_OMXACSP_FIRONE_DIRECT_S16_I
+#define DEBUG_OMXACSP_FIRONE_DIRECT_S16
+#define DEBUG_OMXACSP_FIRONE_DIRECT_S16_SFS
+#define DEBUG_OMXACSP_FIR_DIRECT_S16_ISFS
+#define DEBUG_OMXACSP_FIR_DIRECT_S16_I
+#define DEBUG_OMXACSP_FIR_DIRECT_S16
+#define DEBUG_OMXACSP_FIR_DIRECT_S16_SFS
+#define DEBUG_OMXACSP_IIRONE_BIQUADDIRECT_S16_I
+#define DEBUG_OMXACSP_IIRONE_BIQUADDIRECT_S16
+#define DEBUG_OMXACSP_IIRONE_DIRECT_S16_I
+#define DEBUG_OMXACSP_IIRONE_DIRECT_S16
+#define DEBUG_OMXACSP_IIR_BIQUADDIRECT_S16_I
+#define DEBUG_OMXACSP_IIR_BIQUADDIRECT_S16
+#define DEBUG_OMXACSP_IIR_DIRECT_S16_I
+#define DEBUG_OMXACSP_IIR_DIRECT_S16
+#endif /* DEBUG_DOMAIN_SP */
+
+
+#ifdef DEBUG_DOMAIN_IP
+#define DEBUG_OMXIPBM_ADDC_U8_C1R_SFS
+#define DEBUG_OMXIPBM_COPY_U8_C1R
+#define DEBUG_OMXIPBM_COPY_U8_C3R
+#define DEBUG_OMXIPBM_MIRROR_U8_C1R
+#define DEBUG_OMXIPBM_MULC_U8_C1R_SFS
+#define DEBUG_OMXIPCS_COLORTWISTQ14_U8_C3R
+#define DEBUG_OMXIPCS_RGB565TOYCBCR420LS_MCU_U16_S16_C3P3R
+#define DEBUG_OMXIPCS_RGB565TOYCBCR422LS_MCU_U16_S16_C3P3R
+#define DEBUG_OMXIPCS_RGB565TOYCBCR444LS_MCU_U16_S16_C3P3R
+#define DEBUG_OMXIPCS_RGBTOYCBCR420LS_MCU_U8_S16_C3P3R
+#define DEBUG_OMXIPCS_RGBTOYCBCR422LS_MCU_U8_S16_C3P3R
+#define DEBUG_OMXIPCS_RGBTOYCBCR444LS_MCU_U8_S16_C3P3R
+#define DEBUG_OMXIPCS_YCBCR420RSZROT_U8_P3R
+#define DEBUG_OMXIPCS_YCBCR420TORGB565LS_MCU_S16_U16_P3C3R
+#define DEBUG_OMXIPCS_YCBCR420TORGB565_U8_U16_P3C3R
+#define DEBUG_OMXIPCS_YCBCR420TORGBLS_MCU_S16_U8_P3C3R
+#define DEBUG_OMXIPCS_YCBCR422RSZCSCROTRGB_U8_C2R
+#define DEBUG_OMXIPCS_YCBCR422RSZROT_U8_P3R
+#define DEBUG_OMXIPCS_YCBCR422TORGB565LS_MCU_S16_U16_P3C3R
+#define DEBUG_OMXIPCS_YCBCR422TORGB565_U8_U16_C2C3R
+#define DEBUG_OMXIPCS_YCBCR422TORGBLS_MCU_S16_U8_P3C3R
+#define DEBUG_OMXIPCS_YCBCR422TORGB_U8_C2C3R
+#define DEBUG_OMXIPCS_YCBCR422TOYCBCR420ROTATE_U8_C2P3R
+#define DEBUG_OMXIPCS_YCBCR422TOYCBCR420ROTATE_U8_P3R
+#define DEBUG_OMXIPCS_YCBCR444TORGB565LS_MCU_S16_U16_P3C3R
+#define DEBUG_OMXIPCS_YCBCR444TORGBLS_MCU_S16_U8_P3C3R
+#define DEBUG_OMXIPCS_YCBCRTORGB565_U8_U16_C3R
+#define DEBUG_OMXIPCS_YCBCRTORGB565_U8_U16_P3C3R
+#define DEBUG_OMXIPCS_YCBCRTORGB_U8_C3R
+#define DEBUG_OMXIPPP_GETCENTRALMOMENT_S64
+#define DEBUG_OMXIPPP_GETSPATIALMOMENT_S64
+#define DEBUG_OMXIPPP_MOMENTGETSTATESIZE_S64
+#define DEBUG_OMXIPPP_MOMENTINIT_S64
+#define DEBUG_OMXIPPP_MOMENTS64S_U8_C1R
+#define DEBUG_OMXIPPP_MOMENTS64S_U8_C3R
+#endif /* DEBUG_DOMAIN_IP */
+
+
+#endif /* _armCOMM_H_ */
+
+/*End of File*/
+
+
+
+
diff --git a/dl/armCOMM_s.h b/dl/armCOMM_s.h
new file mode 100644
index 0000000..3020894
--- /dev/null
+++ b/dl/armCOMM_s.h
@@ -0,0 +1,429 @@
+@// -*- Mode: asm; -*-
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@// This file was originally licensed as follows. It has been
+@// relicensed with permission from the copyright holders.
+@//
+
+@//
+@// File Name: armCOMM_s.h
+@// OpenMAX DL: v1.0.2
+@// Last Modified Revision: 13871
+@// Last Modified Date: Fri, 09 May 2008
+@//
+@// (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+@//
+@//
+@//
+@// ARM optimized OpenMAX common header file
+@//
+
+ .set _RBytes, 0 @ Number of register bytes on stack
+ .set _SBytes, 0 @ Number of scratch bytes on stack
+ .set _Workspace, 0 @ Stack offset of scratch workspace
+
+ .set _RRegList, 0 @ R saved register list (last register number)
+ .set _DRegList, 0 @ D saved register list (last register number)
+
+ @// Work out a list of R saved registers, and how much stack space is needed.
+ @// gas doesn't support setting a variable to a string, so we set _RRegList to
+ @// the register number.
+ .macro _M_GETRREGLIST rreg
+ .ifeqs "\rreg", ""
+ @ Nothing needs to be saved
+ .exitm
+ .endif
+ @ If rreg is lr or r4, save lr and r4
+ .ifeqs "\rreg", "lr"
+ .set _RRegList, 4
+ .set _RBytes, _RBytes + 8
+ .exitm
+ .endif
+
+ .ifeqs "\rreg", "r4"
+ .set _RRegList, 4
+ .set _RBytes, _RBytes + 8
+ .exitm
+ .endif
+
+ @ If rreg = r5 or r6, save up to register r6
+ .ifeqs "\rreg", "r5"
+ .set _RRegList, 6
+ .set _RBytes, _RBytes + 16
+ .exitm
+ .endif
+ .ifeqs "\rreg", "r6"
+ .set _RRegList, 6
+ .set _RBytes, _RBytes + 16
+ .exitm
+ .endif
+
+ @ If rreg = r7 or r8, save up to register r8
+ .ifeqs "\rreg", "r7"
+ .set _RRegList, 8
+ .set _RBytes, _RBytes + 24
+ .exitm
+ .endif
+ .ifeqs "\rreg", "r8"
+ .set _RRegList, 8
+ .set _RBytes, _RBytes + 24
+ .exitm
+ .endif
+
+ @ If rreg = r9 or r10, save up to register r10
+ .ifeqs "\rreg", "r9"
+ .set _RRegList, 10
+ .set _RBytes, _RBytes + 32
+ .exitm
+ .endif
+ .ifeqs "\rreg", "r10"
+ .set _RRegList, 10
+ .set _RBytes, _RBytes + 32
+ .exitm
+ .endif
+
+ @ If rreg = r11 or r12, save up to register r12
+ .ifeqs "\rreg", "r11"
+ .set _RRegList, 12
+ .set _RBytes, _RBytes + 40
+ .exitm
+ .endif
+ .ifeqs "\rreg", "r12"
+ .set _RRegList, 12
+ .set _RBytes, _RBytes + 40
+ .exitm
+ .endif
+
+ .warning "Unrecognized saved r register limit: \rreg"
+ .endm
+
+ @ Work out list of D saved registers, like for R registers.
+ .macro _M_GETDREGLIST dreg
+ .ifeqs "\dreg", ""
+ .set _DRegList, 0
+ .exitm
+ .endif
+
+ .ifeqs "\dreg", "d8"
+ .set _DRegList, 8
+ .set _RBytes, _RBytes + 8
+ .exitm
+ .endif
+
+ .ifeqs "\dreg", "d9"
+ .set _DRegList, 9
+ .set _RBytes, _RBytes + 16
+ .exitm
+ .endif
+
+ .ifeqs "\dreg", "d10"
+ .set _DRegList, 10
+ .set _RBytes, _RBytes + 24
+ .exitm
+ .endif
+
+ .ifeqs "\dreg", "d11"
+ .set _DRegList, 11
+ .set _RBytes, _RBytes + 32
+ .exitm
+ .endif
+
+ .ifeqs "\dreg", "d12"
+ .set _DRegList, 12
+ .set _RBytes, _RBytes + 40
+ .exitm
+ .endif
+
+ .ifeqs "\dreg", "d13"
+ .set _DRegList, 13
+ .set _RBytes, _RBytes + 48
+ .exitm
+ .endif
+
+ .ifeqs "\dreg", "d14"
+ .set _DRegList, 14
+ .set _RBytes, _RBytes + 56
+ .exitm
+ .endif
+
+ .ifeqs "\dreg", "d15"
+ .set _DRegList, 15
+ .set _RBytes, _RBytes + 64
+ .exitm
+ .endif
+
+ .warning "Unrecognized saved d register limit: \rreg"
+ .endm
+
+@//////////////////////////////////////////////////////////
+@// Function header and footer macros
+@//////////////////////////////////////////////////////////
+
+ @ Function Header Macro
+ @ Generates the function prologue
+ @ Note that functions should all be "stack-moves-once"
+ @ The FNSTART and FNEND macros should be the only places
+ @ where the stack moves.
+ @
+ @ name = function name
+ @ rreg = "" don't stack any registers
+ @ "lr" stack "lr" only
+ @ "rN" stack registers "r4-rN,lr"
+ @ dreg = "" don't stack any D registers
+ @ "dN" stack registers "d8-dN"
+ @
+ @ Note: ARM Archicture procedure call standard AAPCS
+ @ states that r4-r11, sp, d8-d15 must be preserved by
+ @ a compliant function.
+ .macro M_START name, rreg, dreg
+ .set _RBytes, 0
+ .set _Workspace, 0
+
+ @ Define the function and make it external.
+ .global \name
+ .func \name
+ .section .text.\name,"ax",%progbits
+ .align 2
+\name :
+.fnstart
+ @ Save specified R registers
+ _M_GETRREGLIST \rreg
+ _M_PUSH_RREG
+
+ @ Save specified D registers
+ _M_GETDREGLIST \dreg
+ _M_PUSH_DREG
+
+ @ Ensure size claimed on stack is 8-byte aligned
+ .if (_SBytes & 7) != 0
+ .set _SBytes, _SBytes + (8 - (_SBytes & 7))
+ .endif
+ .if _SBytes != 0
+ sub sp, sp, #_SBytes
+ .endif
+ .endm
+
+ @ Function Footer Macro
+ @ Generates the function epilogue
+ .macro M_END
+ @ Restore the stack pointer to its original value on function entry
+ .if _SBytes != 0
+ add sp, sp, #_SBytes
+ .endif
+ @ Restore any saved R or D registers.
+ _M_RET
+ .fnend
+ .endfunc
+ @ Reset the global stack tracking variables back to their
+ @ initial values.
+ .set _SBytes, 0
+ .endm
+
+ @// Based on the value of _DRegList, push the specified set of registers
+ @// to the stack. Is there a better way?
+ .macro _M_PUSH_DREG
+ .if _DRegList == 8
+ vpush {d8}
+ .exitm
+ .endif
+
+ .if _DRegList == 9
+ vpush {d8-d9}
+ .exitm
+ .endif
+
+ .if _DRegList == 10
+ vpush {d8-d10}
+ .exitm
+ .endif
+
+ .if _DRegList == 11
+ vpush {d8-d11}
+ .exitm
+ .endif
+
+ .if _DRegList == 12
+ vpush {d8-d12}
+ .exitm
+ .endif
+
+ .if _DRegList == 13
+ vpush {d8-d13}
+ .exitm
+ .endif
+
+ .if _DRegList == 14
+ vpush {d8-d14}
+ .exitm
+ .endif
+
+ .if _DRegList == 15
+ vpush {d8-d15}
+ .exitm
+ .endif
+ .endm
+
+ @// Based on the value of _RRegList, push the specified set of registers
+ @// to the stack. Is there a better way?
+ .macro _M_PUSH_RREG
+ .if _RRegList == 4
+ stmfd sp!, {r4, lr}
+ .exitm
+ .endif
+
+ .if _RRegList == 6
+ stmfd sp!, {r4-r6, lr}
+ .exitm
+ .endif
+
+ .if _RRegList == 8
+ stmfd sp!, {r4-r8, lr}
+ .exitm
+ .endif
+
+ .if _RRegList == 10
+ stmfd sp!, {r4-r10, lr}
+ .exitm
+ .endif
+
+ .if _RRegList == 12
+ stmfd sp!, {r4-r12, lr}
+ .exitm
+ .endif
+ .endm
+
+ @// The opposite of _M_PUSH_DREG
+ .macro _M_POP_DREG
+ .if _DRegList == 8
+ vpop {d8}
+ .exitm
+ .endif
+
+ .if _DRegList == 9
+ vpop {d8-d9}
+ .exitm
+ .endif
+
+ .if _DRegList == 10
+ vpop {d8-d10}
+ .exitm
+ .endif
+
+ .if _DRegList == 11
+ vpop {d8-d11}
+ .exitm
+ .endif
+
+ .if _DRegList == 12
+ vpop {d8-d12}
+ .exitm
+ .endif
+
+ .if _DRegList == 13
+ vpop {d8-d13}
+ .exitm
+ .endif
+
+ .if _DRegList == 14
+ vpop {d8-d14}
+ .exitm
+ .endif
+
+ .if _DRegList == 15
+ vpop {d8-d15}
+ .exitm
+ .endif
+ .endm
+
+ @// The opposite of _M_PUSH_RREG
+ .macro _M_POP_RREG cc
+ .if _RRegList == 0
+ bx\cc lr
+ .exitm
+ .endif
+ .if _RRegList == 4
+ ldm\cc\()fd sp!, {r4, pc}
+ .exitm
+ .endif
+
+ .if _RRegList == 6
+ ldm\cc\()fd sp!, {r4-r6, pc}
+ .exitm
+ .endif
+
+ .if _RRegList == 8
+ ldm\cc\()fd sp!, {r4-r8, pc}
+ .exitm
+ .endif
+
+ .if _RRegList == 10
+ ldm\cc\()fd sp!, {r4-r10, pc}
+ .exitm
+ .endif
+
+ .if _RRegList == 12
+ ldm\cc\()fd sp!, {r4-r12, pc}
+ .exitm
+ .endif
+ .endm
+
+ @ Produce function return instructions
+ .macro _M_RET cc
+ _M_POP_DREG \cc
+ _M_POP_RREG \cc
+ .endm
+
+ @// Allocate 4-byte aligned area of name
+ @// |name| and size |size| bytes.
+ .macro M_ALLOC4 name, size
+ .if (_SBytes & 3) != 0
+ .set _SBytes, _SBytes + (4 - (_SBytes & 3))
+ .endif
+ .set \name\()_F, _SBytes
+ .set _SBytes, _SBytes + \size
+
+ .endm
+
+ @ Load word from stack
+ .macro M_LDR r, a0, a1, a2, a3
+ _M_DATA "ldr", 4, \r, \a0, \a1, \a2, \a3
+ .endm
+
+ @ Store word to stack
+ .macro M_STR r, a0, a1, a2, a3
+ _M_DATA "str", 4, \r, \a0, \a1, \a2, \a3
+ .endm
+
+ @ Macro to perform a data access operation
+ @ Such as LDR or STR
+ @ The addressing mode is modified such that
+ @ 1. If no address is given then the name is taken
+ @ as a stack offset
+ @ 2. If the addressing mode is not available for the
+ @ state being assembled for (eg Thumb) then a suitable
+ @ addressing mode is substituted.
+ @
+ @ On Entry:
+ @ $i = Instruction to perform (eg "LDRB")
+ @ $a = Required byte alignment
+ @ $r = Register(s) to transfer (eg "r1")
+ @ $a0,$a1,$a2. Addressing mode and condition. One of:
+ @ label {,cc}
+ @ [base] {,,,cc}
+ @ [base, offset]{!} {,,cc}
+ @ [base, offset, shift]{!} {,cc}
+ @ [base], offset {,,cc}
+ @ [base], offset, shift {,cc}
+ @
+ @ WARNING: Most of the above are not supported, except the first case.
+ .macro _M_DATA i, a, r, a0, a1, a2, a3
+ .set _Offset, _Workspace + \a0\()_F
+ \i\a1 \r, [sp, #_Offset]
+ .endm
diff --git a/dl/armOMX.h b/dl/armOMX.h
new file mode 100644
index 0000000..0ad21c4
--- /dev/null
+++ b/dl/armOMX.h
@@ -0,0 +1,289 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ *
+ * This file was originally licensed as follows. It has been
+ * relicensed with permission from the copyright holders.
+ */
+
+/*
+ *
+ * File Name: armOMX_ReleaseVersion.h
+ * OpenMAX DL: v1.0.2
+ * Last Modified Revision: 15322
+ * Last Modified Date: Wed, 15 Oct 2008
+ *
+ * (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+ *
+ *
+ *
+ * This file allows a version of the OMX DL libraries to be built where some or
+ * all of the function names can be given a user specified suffix.
+ *
+ * You might want to use it where:
+ *
+ * - you want to rename a function "out of the way" so that you could replace
+ * a function with a different version (the original version would still be
+ * in the library just with a different name - so you could debug the new
+ * version by comparing it to the output of the old)
+ *
+ * - you want to rename all the functions to versions with a suffix so that
+ * you can include two versions of the library and choose between functions
+ * at runtime.
+ *
+ * e.g. omxIPBM_Copy_U8_C1R could be renamed omxIPBM_Copy_U8_C1R_CortexA8
+ *
+ */
+
+
+#ifndef _armOMX_H_
+#define _armOMX_H_
+
+#define ARMOMX_ENABLE_RENAMING 0
+#if ARMOMX_ENABLE_RENAMING
+
+/* We need to define these two macros in order to expand and concatenate the names */
+#define OMXCAT2BAR(A, B) omx ## A ## B
+#define OMXCATBAR(A, B) OMXCAT2BAR(A, B)
+
+/* Define the suffix to add to all functions - the default is no suffix */
+#define BARE_SUFFIX
+
+
+
+/* Define what happens to the bare suffix-less functions, down to the sub-domain accuracy */
+#define OMXACAAC_SUFFIX BARE_SUFFIX
+#define OMXACMP3_SUFFIX BARE_SUFFIX
+#define OMXICJP_SUFFIX BARE_SUFFIX
+#define OMXIPBM_SUFFIX BARE_SUFFIX
+#define OMXIPCS_SUFFIX BARE_SUFFIX
+#define OMXIPPP_SUFFIX BARE_SUFFIX
+#define OMXSP_SUFFIX BARE_SUFFIX
+#define OMXVCCOMM_SUFFIX BARE_SUFFIX
+#define OMXVCM4P10_SUFFIX BARE_SUFFIX
+#define OMXVCM4P2_SUFFIX BARE_SUFFIX
+
+
+
+
+/* Define what the each bare, un-suffixed OpenMAX API function names is to be renamed */
+#define omxACAAC_DecodeChanPairElt OMXCATBAR(ACAAC_DecodeChanPairElt, OMXACAAC_SUFFIX)
+#define omxACAAC_DecodeDatStrElt OMXCATBAR(ACAAC_DecodeDatStrElt, OMXACAAC_SUFFIX)
+#define omxACAAC_DecodeFillElt OMXCATBAR(ACAAC_DecodeFillElt, OMXACAAC_SUFFIX)
+#define omxACAAC_DecodeIsStereo_S32 OMXCATBAR(ACAAC_DecodeIsStereo_S32, OMXACAAC_SUFFIX)
+#define omxACAAC_DecodeMsPNS_S32_I OMXCATBAR(ACAAC_DecodeMsPNS_S32_I, OMXACAAC_SUFFIX)
+#define omxACAAC_DecodeMsStereo_S32_I OMXCATBAR(ACAAC_DecodeMsStereo_S32_I, OMXACAAC_SUFFIX)
+#define omxACAAC_DecodePrgCfgElt OMXCATBAR(ACAAC_DecodePrgCfgElt, OMXACAAC_SUFFIX)
+#define omxACAAC_DecodeTNS_S32_I OMXCATBAR(ACAAC_DecodeTNS_S32_I, OMXACAAC_SUFFIX)
+#define omxACAAC_DeinterleaveSpectrum_S32 OMXCATBAR(ACAAC_DeinterleaveSpectrum_S32, OMXACAAC_SUFFIX)
+#define omxACAAC_EncodeTNS_S32_I OMXCATBAR(ACAAC_EncodeTNS_S32_I, OMXACAAC_SUFFIX)
+#define omxACAAC_LongTermPredict_S32 OMXCATBAR(ACAAC_LongTermPredict_S32, OMXACAAC_SUFFIX)
+#define omxACAAC_LongTermReconstruct_S32_I OMXCATBAR(ACAAC_LongTermReconstruct_S32_I, OMXACAAC_SUFFIX)
+#define omxACAAC_MDCTFwd_S32 OMXCATBAR(ACAAC_MDCTFwd_S32, OMXACAAC_SUFFIX)
+#define omxACAAC_MDCTInv_S32_S16 OMXCATBAR(ACAAC_MDCTInv_S32_S16, OMXACAAC_SUFFIX)
+#define omxACAAC_NoiselessDecode OMXCATBAR(ACAAC_NoiselessDecode, OMXACAAC_SUFFIX)
+#define omxACAAC_QuantInv_S32_I OMXCATBAR(ACAAC_QuantInv_S32_I, OMXACAAC_SUFFIX)
+#define omxACAAC_UnpackADIFHeader OMXCATBAR(ACAAC_UnpackADIFHeader, OMXACAAC_SUFFIX)
+#define omxACAAC_UnpackADTSFrameHeader OMXCATBAR(ACAAC_UnpackADTSFrameHeader, OMXACAAC_SUFFIX)
+
+
+#define omxACMP3_HuffmanDecode_S32 OMXCATBAR(ACMP3_HuffmanDecode_S32, OMXACMP3_SUFFIX)
+#define omxACMP3_HuffmanDecodeSfb_S32 OMXCATBAR(ACMP3_HuffmanDecodeSfb_S32, OMXACMP3_SUFFIX)
+#define omxACMP3_HuffmanDecodeSfbMbp_S32 OMXCATBAR(ACMP3_HuffmanDecodeSfbMbp_S32, OMXACMP3_SUFFIX)
+#define omxACMP3_MDCTInv_S32 OMXCATBAR(ACMP3_MDCTInv_S32, OMXACMP3_SUFFIX)
+#define omxACMP3_ReQuantize_S32_I OMXCATBAR(ACMP3_ReQuantize_S32_I, OMXACMP3_SUFFIX)
+#define omxACMP3_ReQuantizeSfb_S32_I OMXCATBAR(ACMP3_ReQuantizeSfb_S32_I, OMXACMP3_SUFFIX)
+#define omxACMP3_SynthPQMF_S32_S16 OMXCATBAR(ACMP3_SynthPQMF_S32_S16, OMXACMP3_SUFFIX)
+#define omxACMP3_UnpackFrameHeader OMXCATBAR(ACMP3_UnpackFrameHeader, OMXACMP3_SUFFIX)
+#define omxACMP3_UnpackScaleFactors_S8 OMXCATBAR(ACMP3_UnpackScaleFactors_S8, OMXACMP3_SUFFIX)
+#define omxACMP3_UnpackSideInfo OMXCATBAR(ACMP3_UnpackSideInfo, OMXACMP3_SUFFIX)
+
+#define omxICJP_CopyExpand_U8_C3 OMXCATBAR(ICJP_CopyExpand_U8_C3, OMXICJP_SUFFIX)
+#define omxICJP_DCTFwd_S16 OMXCATBAR(ICJP_DCTFwd_S16, OMXICJP_SUFFIX)
+#define omxICJP_DCTFwd_S16_I OMXCATBAR(ICJP_DCTFwd_S16_I, OMXICJP_SUFFIX)
+#define omxICJP_DCTInv_S16 OMXCATBAR(ICJP_DCTInv_S16, OMXICJP_SUFFIX)
+#define omxICJP_DCTInv_S16_I OMXCATBAR(ICJP_DCTInv_S16_I, OMXICJP_SUFFIX)
+#define omxICJP_DCTQuantFwd_Multiple_S16 OMXCATBAR(ICJP_DCTQuantFwd_Multiple_S16, OMXICJP_SUFFIX)
+#define omxICJP_DCTQuantFwd_S16 OMXCATBAR(ICJP_DCTQuantFwd_S16, OMXICJP_SUFFIX)
+#define omxICJP_DCTQuantFwd_S16_I OMXCATBAR(ICJP_DCTQuantFwd_S16_I, OMXICJP_SUFFIX)
+#define omxICJP_DCTQuantFwdTableInit OMXCATBAR(ICJP_DCTQuantFwdTableInit, OMXICJP_SUFFIX)
+#define omxICJP_DCTQuantInv_Multiple_S16 OMXCATBAR(ICJP_DCTQuantInv_Multiple_S16, OMXICJP_SUFFIX)
+#define omxICJP_DCTQuantInv_S16 OMXCATBAR(ICJP_DCTQuantInv_S16, OMXICJP_SUFFIX)
+#define omxICJP_DCTQuantInv_S16_I OMXCATBAR(ICJP_DCTQuantInv_S16_I, OMXICJP_SUFFIX)
+#define omxICJP_DCTQuantInvTableInit OMXCATBAR(ICJP_DCTQuantInvTableInit, OMXICJP_SUFFIX)
+#define omxICJP_DecodeHuffman8x8_Direct_S16_C1 OMXCATBAR(ICJP_DecodeHuffman8x8_Direct_S16_C1, OMXICJP_SUFFIX)
+#define omxICJP_DecodeHuffmanSpecGetBufSize_U8 OMXCATBAR(ICJP_DecodeHuffmanSpecGetBufSize_U8, OMXICJP_SUFFIX)
+#define omxICJP_DecodeHuffmanSpecInit_U8 OMXCATBAR(ICJP_DecodeHuffmanSpecInit_U8, OMXICJP_SUFFIX)
+#define omxICJP_EncodeHuffman8x8_Direct_S16_U1_C1 OMXCATBAR(ICJP_EncodeHuffman8x8_Direct_S16_U1_C1, OMXICJP_SUFFIX)
+#define omxICJP_EncodeHuffmanSpecGetBufSize_U8 OMXCATBAR(ICJP_EncodeHuffmanSpecGetBufSize_U8, OMXICJP_SUFFIX)
+#define omxICJP_EncodeHuffmanSpecInit_U8 OMXCATBAR(ICJP_EncodeHuffmanSpecInit_U8, OMXICJP_SUFFIX)
+
+#define omxIPBM_AddC_U8_C1R_Sfs OMXCATBAR(IPBM_AddC_U8_C1R_Sfs, OMXIPBM_SUFFIX)
+#define omxIPBM_Copy_U8_C1R OMXCATBAR(IPBM_Copy_U8_C1R, OMXIPBM_SUFFIX)
+#define omxIPBM_Copy_U8_C3R OMXCATBAR(IPBM_Copy_U8_C3R, OMXIPBM_SUFFIX)
+#define omxIPBM_Mirror_U8_C1R OMXCATBAR(IPBM_Mirror_U8_C1R, OMXIPBM_SUFFIX)
+#define omxIPBM_MulC_U8_C1R_Sfs OMXCATBAR(IPBM_MulC_U8_C1R_Sfs, OMXIPBM_SUFFIX)
+
+#define omxIPCS_ColorTwistQ14_U8_C3R OMXCATBAR(IPCS_ColorTwistQ14_U8_C3R, OMXIPCS_SUFFIX)
+#define omxIPCS_BGR565ToYCbCr420LS_MCU_U16_S16_C3P3R OMXCATBAR(IPCS_BGR565ToYCbCr420LS_MCU_U16_S16_C3P3R, OMXIPCS_SUFFIX)
+#define omxIPCS_BGR565ToYCbCr422LS_MCU_U16_S16_C3P3R OMXCATBAR(IPCS_BGR565ToYCbCr422LS_MCU_U16_S16_C3P3R, OMXIPCS_SUFFIX)
+#define omxIPCS_BGR565ToYCbCr444LS_MCU_U16_S16_C3P3R OMXCATBAR(IPCS_BGR565ToYCbCr444LS_MCU_U16_S16_C3P3R, OMXIPCS_SUFFIX)
+#define omxIPCS_BGR888ToYCbCr420LS_MCU_U8_S16_C3P3R OMXCATBAR(IPCS_BGR888ToYCbCr420LS_MCU_U8_S16_C3P3R, OMXIPCS_SUFFIX)
+#define omxIPCS_BGR888ToYCbCr422LS_MCU_U8_S16_C3P3R OMXCATBAR(IPCS_BGR888ToYCbCr422LS_MCU_U8_S16_C3P3R, OMXIPCS_SUFFIX)
+#define omxIPCS_BGR888ToYCbCr444LS_MCU_U8_S16_C3P3R OMXCATBAR(IPCS_BGR888ToYCbCr444LS_MCU_U8_S16_C3P3R, OMXIPCS_SUFFIX)
+#define omxIPCS_YCbCr420RszCscRotBGR_U8_P3C3R OMXCATBAR(IPCS_YCbCr420RszCscRotBGR_U8_P3C3R, OMXIPCS_SUFFIX)
+#define omxIPCS_YCbCr420RszRot_U8_P3R OMXCATBAR(IPCS_YCbCr420RszRot_U8_P3R, OMXIPCS_SUFFIX)
+#define omxIPCS_YCbCr420ToBGR565_U8_U16_P3C3R OMXCATBAR(IPCS_YCbCr420ToBGR565_U8_U16_P3C3R, OMXIPCS_SUFFIX)
+#define omxIPCS_YCbCr420ToBGR565LS_MCU_S16_U16_P3C3R OMXCATBAR(IPCS_YCbCr420ToBGR565LS_MCU_S16_U16_P3C3R, OMXIPCS_SUFFIX)
+#define omxIPCS_YCbCr420ToBGR888LS_MCU_S16_U8_P3C3R OMXCATBAR(IPCS_YCbCr420ToBGR888LS_MCU_S16_U8_P3C3R, OMXIPCS_SUFFIX)
+#define omxIPCS_YCbCr422RszCscRotBGR_U8_P3C3R OMXCATBAR(IPCS_YCbCr422RszCscRotBGR_U8_P3C3R, OMXIPCS_SUFFIX)
+#define omxIPCS_CbYCrY422RszCscRotBGR_U8_U16_C2R OMXCATBAR(IPCS_CbYCrY422RszCscRotBGR_U8_U16_C2R, OMXIPCS_SUFFIX)
+#define omxIPCS_YCbCr422RszRot_U8_P3R OMXCATBAR(IPCS_YCbCr422RszRot_U8_P3R, OMXIPCS_SUFFIX)
+#define omxIPCS_YCbYCr422ToBGR565_U8_U16_C2C3R OMXCATBAR(IPCS_YCbYCr422ToBGR565_U8_U16_C2C3R, OMXIPCS_SUFFIX)
+#define omxIPCS_YCbCr422ToBGR565LS_MCU_S16_U16_P3C3R OMXCATBAR(IPCS_YCbCr422ToBGR565LS_MCU_S16_U16_P3C3R, OMXIPCS_SUFFIX)
+#define omxIPCS_YCbYCr422ToBGR888_U8_C2C3R OMXCATBAR(IPCS_YCbYCr422ToBGR888_U8_C2C3R, OMXIPCS_SUFFIX)
+#define omxIPCS_YCbCr422ToBGR888LS_MCU_S16_U8_P3C3R OMXCATBAR(IPCS_YCbCr422ToBGR888LS_MCU_S16_U8_P3C3R, OMXIPCS_SUFFIX)
+#define omxIPCS_YCbCr422ToBGR888LS_MCU_S16_U8_P3C3R OMXCATBAR(IPCS_YCbCr422ToBGR888LS_MCU_S16_U8_P3C3R, OMXIPCS_SUFFIX)
+#define omxIPCS_CbYCrY422ToYCbCr420Rotate_U8_C2P3R OMXCATBAR(IPCS_CbYCrY422ToYCbCr420Rotate_U8_C2P3R, OMXIPCS_SUFFIX)
+#define omxIPCS_YCbCr422ToYCbCr420Rotate_U8_P3R OMXCATBAR(IPCS_YCbCr422ToYCbCr420Rotate_U8_P3R, OMXIPCS_SUFFIX)
+#define omxIPCS_YCbCr444ToBGR565_U8_U16_C3R OMXCATBAR(IPCS_YCbCr444ToBGR565_U8_U16_C3R, OMXIPCS_SUFFIX)
+#define omxIPCS_YCbCr444ToBGR565_U8_U16_P3C3R OMXCATBAR(IPCS_YCbCr444ToBGR565_U8_U16_P3C3R, OMXIPCS_SUFFIX)
+#define omxIPCS_YCbCr444ToBGR565LS_MCU_S16_U16_P3C3R OMXCATBAR(IPCS_YCbCr444ToBGR565LS_MCU_S16_U16_P3C3R, OMXIPCS_SUFFIX)
+#define omxIPCS_YCbCr444ToBGR888_U8_C3R OMXCATBAR(IPCS_YCbCr444ToBGR888_U8_C3R, OMXIPCS_SUFFIX)
+
+#define omxIPPP_Deblock_HorEdge_U8_I OMXCATBAR(IPPP_Deblock_HorEdge_U8_I, OMXIPPP_SUFFIX)
+#define omxIPPP_Deblock_VerEdge_U8_I OMXCATBAR(IPPP_Deblock_VerEdge_U8_I, OMXIPPP_SUFFIX)
+#define omxIPPP_FilterFIR_U8_C1R OMXCATBAR(IPPP_FilterFIR_U8_C1R, OMXIPPP_SUFFIX)
+#define omxIPPP_FilterMedian_U8_C1R OMXCATBAR(IPPP_FilterMedian_U8_C1R, OMXIPPP_SUFFIX)
+#define omxIPPP_GetCentralMoment_S64 OMXCATBAR(IPPP_GetCentralMoment_S64, OMXIPPP_SUFFIX)
+#define omxIPPP_GetSpatialMoment_S64 OMXCATBAR(IPPP_GetSpatialMoment_S64, OMXIPPP_SUFFIX)
+#define omxIPPP_MomentGetStateSize OMXCATBAR(IPPP_MomentGetStateSize, OMXIPPP_SUFFIX)
+#define omxIPPP_MomentInit OMXCATBAR(IPPP_MomentInit, OMXIPPP_SUFFIX)
+#define omxIPPP_Moments_U8_C1R OMXCATBAR(IPPP_Moments_U8_C1R, OMXIPPP_SUFFIX)
+#define omxIPPP_Moments_U8_C3R OMXCATBAR(IPPP_Moments_U8_C3R, OMXIPPP_SUFFIX)
+
+#define omxSP_BlockExp_S16 OMXCATBAR(SP_BlockExp_S16, OMXSP_SUFFIX)
+#define omxSP_BlockExp_S32 OMXCATBAR(SP_BlockExp_S32, OMXSP_SUFFIX)
+#define omxSP_Copy_S16 OMXCATBAR(SP_Copy_S16, OMXSP_SUFFIX)
+#define omxSP_DotProd_S16 OMXCATBAR(SP_DotProd_S16, OMXSP_SUFFIX)
+#define omxSP_DotProd_S16_Sfs OMXCATBAR(SP_DotProd_S16_Sfs, OMXSP_SUFFIX)
+#define omxSP_FFTFwd_CToC_SC16_Sfs OMXCATBAR(SP_FFTFwd_CToC_SC16_Sfs, OMXSP_SUFFIX)
+#define omxSP_FFTFwd_CToC_SC32_Sfs OMXCATBAR(SP_FFTFwd_CToC_SC32_Sfs, OMXSP_SUFFIX)
+#define omxSP_FFTFwd_RToCCS_S16S32_Sfs OMXCATBAR(SP_FFTFwd_RToCCS_S16S32_Sfs, OMXSP_SUFFIX)
+#define omxSP_FFTFwd_RToCCS_S32_Sfs OMXCATBAR(SP_FFTFwd_RToCCS_S32_Sfs, OMXSP_SUFFIX)
+#define omxSP_FFTGetBufSize_C_SC16 OMXCATBAR(SP_FFTGetBufSize_C_SC16, OMXSP_SUFFIX)
+#define omxSP_FFTGetBufSize_C_SC32 OMXCATBAR(SP_FFTGetBufSize_C_SC32, OMXSP_SUFFIX)
+#define omxSP_FFTGetBufSize_R_S16S32 OMXCATBAR(SP_FFTGetBufSize_R_S16S32, OMXSP_SUFFIX)
+#define omxSP_FFTGetBufSize_R_S32 OMXCATBAR(SP_FFTGetBufSize_R_S32, OMXSP_SUFFIX)
+#define omxSP_FFTInit_C_SC16 OMXCATBAR(SP_FFTInit_C_SC16, OMXSP_SUFFIX)
+#define omxSP_FFTInit_C_SC32 OMXCATBAR(SP_FFTInit_C_SC32, OMXSP_SUFFIX)
+#define omxSP_FFTInit_R_S16S32 OMXCATBAR(SP_FFTInit_R_S16S32, OMXSP_SUFFIX)
+#define omxSP_FFTInit_R_S32 OMXCATBAR(SP_FFTInit_R_S32, OMXSP_SUFFIX)
+#define omxSP_FFTInv_CCSToR_S32_Sfs OMXCATBAR(SP_FFTInv_CCSToR_S32_Sfs, OMXSP_SUFFIX)
+#define omxSP_FFTInv_CCSToR_S32S16_Sfs OMXCATBAR(SP_FFTInv_CCSToR_S32S16_Sfs, OMXSP_SUFFIX)
+#define omxSP_FFTInv_CToC_SC16_Sfs OMXCATBAR(SP_FFTInv_CToC_SC16_Sfs, OMXSP_SUFFIX)
+#define omxSP_FFTInv_CToC_SC32_Sfs OMXCATBAR(SP_FFTInv_CToC_SC32_Sfs, OMXSP_SUFFIX)
+#define omxSP_FilterMedian_S32 OMXCATBAR(SP_FilterMedian_S32, OMXSP_SUFFIX)
+#define omxSP_FilterMedian_S32_I OMXCATBAR(SP_FilterMedian_S32_I, OMXSP_SUFFIX)
+#define omxSP_FIR_Direct_S16 OMXCATBAR(SP_FIR_Direct_S16, OMXSP_SUFFIX)
+#define omxSP_FIR_Direct_S16_I OMXCATBAR(SP_FIR_Direct_S16_I, OMXSP_SUFFIX)
+#define omxSP_FIR_Direct_S16_ISfs OMXCATBAR(SP_FIR_Direct_S16_ISfs, OMXSP_SUFFIX)
+#define omxSP_FIR_Direct_S16_Sfs OMXCATBAR(SP_FIR_Direct_S16_Sfs, OMXSP_SUFFIX)
+#define omxSP_FIROne_Direct_S16 OMXCATBAR(SP_FIROne_Direct_S16, OMXSP_SUFFIX)
+#define omxSP_FIROne_Direct_S16_I OMXCATBAR(SP_FIROne_Direct_S16_I, OMXSP_SUFFIX)
+#define omxSP_FIROne_Direct_S16_ISfs OMXCATBAR(SP_FIROne_Direct_S16_ISfs, OMXSP_SUFFIX)
+#define omxSP_FIROne_Direct_S16_Sfs OMXCATBAR(SP_FIROne_Direct_S16_Sfs, OMXSP_SUFFIX)
+#define omxSP_IIR_BiQuadDirect_S16 OMXCATBAR(SP_IIR_BiQuadDirect_S16, OMXSP_SUFFIX)
+#define omxSP_IIR_BiQuadDirect_S16_I OMXCATBAR(SP_IIR_BiQuadDirect_S16_I, OMXSP_SUFFIX)
+#define omxSP_IIR_Direct_S16 OMXCATBAR(SP_IIR_Direct_S16, OMXSP_SUFFIX)
+#define omxSP_IIR_Direct_S16_I OMXCATBAR(SP_IIR_Direct_S16_I, OMXSP_SUFFIX)
+#define omxSP_IIROne_BiQuadDirect_S16 OMXCATBAR(SP_IIROne_BiQuadDirect_S16, OMXSP_SUFFIX)
+#define omxSP_IIROne_BiQuadDirect_S16_I OMXCATBAR(SP_IIROne_BiQuadDirect_S16_I, OMXSP_SUFFIX)
+#define omxSP_IIROne_Direct_S16 OMXCATBAR(SP_IIROne_Direct_S16, OMXSP_SUFFIX)
+#define omxSP_IIROne_Direct_S16_I OMXCATBAR(SP_IIROne_Direct_S16_I, OMXSP_SUFFIX)
+
+#define omxVCCOMM_Average_16x OMXCATBAR(VCCOMM_Average_16x, OMXVCCOMM_SUFFIX)
+#define omxVCCOMM_Average_8x OMXCATBAR(VCCOMM_Average_8x, OMXVCCOMM_SUFFIX)
+#define omxVCCOMM_ComputeTextureErrorBlock OMXCATBAR(VCCOMM_ComputeTextureErrorBlock, OMXVCCOMM_SUFFIX)
+#define omxVCCOMM_ComputeTextureErrorBlock_SAD OMXCATBAR(VCCOMM_ComputeTextureErrorBlock_SAD, OMXVCCOMM_SUFFIX)
+#define omxVCCOMM_Copy16x16 OMXCATBAR(VCCOMM_Copy16x16, OMXVCCOMM_SUFFIX)
+#define omxVCCOMM_Copy8x8 OMXCATBAR(VCCOMM_Copy8x8, OMXVCCOMM_SUFFIX)
+#define omxVCCOMM_ExpandFrame_I OMXCATBAR(VCCOMM_ExpandFrame_I, OMXVCCOMM_SUFFIX)
+#define omxVCCOMM_LimitMVToRect OMXCATBAR(VCCOMM_LimitMVToRect, OMXVCCOMM_SUFFIX)
+#define omxVCCOMM_SAD_16x OMXCATBAR(VCCOMM_SAD_16x, OMXVCCOMM_SUFFIX)
+#define omxVCCOMM_SAD_8x OMXCATBAR(VCCOMM_SAD_8x, OMXVCCOMM_SUFFIX)
+
+#define omxVCM4P10_Average_4x OMXCATBAR(VCM4P10_Average_4x, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_BlockMatch_Half OMXCATBAR(VCM4P10_BlockMatch_Half, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_BlockMatch_Integer OMXCATBAR(VCM4P10_BlockMatch_Integer, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_BlockMatch_Quarter OMXCATBAR(VCM4P10_BlockMatch_Quarter, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_DeblockChroma_I OMXCATBAR(VCM4P10_DeblockChroma_I, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_DeblockLuma_I OMXCATBAR(VCM4P10_DeblockLuma_I, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_DecodeChromaDcCoeffsToPairCAVLC OMXCATBAR(VCM4P10_DecodeChromaDcCoeffsToPairCAVLC, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_DecodeCoeffsToPairCAVLC OMXCATBAR(VCM4P10_DecodeCoeffsToPairCAVLC, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_DequantTransformResidualFromPairAndAdd OMXCATBAR(VCM4P10_DequantTransformResidualFromPairAndAdd, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_FilterDeblockingChroma_HorEdge_I OMXCATBAR(VCM4P10_FilterDeblockingChroma_HorEdge_I, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_FilterDeblockingChroma_VerEdge_I OMXCATBAR(VCM4P10_FilterDeblockingChroma_VerEdge_I, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_FilterDeblockingLuma_HorEdge_I OMXCATBAR(VCM4P10_FilterDeblockingLuma_HorEdge_I, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_FilterDeblockingLuma_VerEdge_I OMXCATBAR(VCM4P10_FilterDeblockingLuma_VerEdge_I, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_GetVLCInfo OMXCATBAR(VCM4P10_GetVLCInfo, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_InterpolateChroma OMXCATBAR(VCM4P10_InterpolateChroma, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_InterpolateHalfHor_Luma OMXCATBAR(VCM4P10_InterpolateHalfHor_Luma, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_InterpolateHalfVer_Luma OMXCATBAR(VCM4P10_InterpolateHalfVer_Luma, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_InterpolateLuma OMXCATBAR(VCM4P10_InterpolateLuma, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_InvTransformDequant_ChromaDC OMXCATBAR(VCM4P10_InvTransformDequant_ChromaDC, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_InvTransformDequant_LumaDC OMXCATBAR(VCM4P10_InvTransformDequant_LumaDC, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_InvTransformResidualAndAdd OMXCATBAR(VCM4P10_InvTransformResidualAndAdd, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_MEGetBufSize OMXCATBAR(VCM4P10_MEGetBufSize, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_MEInit OMXCATBAR(VCM4P10_MEInit, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_MotionEstimationMB OMXCATBAR(VCM4P10_MotionEstimationMB, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_PredictIntra_16x16 OMXCATBAR(VCM4P10_PredictIntra_16x16, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_PredictIntra_4x4 OMXCATBAR(VCM4P10_PredictIntra_4x4, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_PredictIntraChroma_8x8 OMXCATBAR(VCM4P10_PredictIntraChroma_8x8, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_SAD_4x OMXCATBAR(VCM4P10_SAD_4x, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_SADQuar_16x OMXCATBAR(VCM4P10_SADQuar_16x, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_SADQuar_4x OMXCATBAR(VCM4P10_SADQuar_4x, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_SADQuar_8x OMXCATBAR(VCM4P10_SADQuar_8x, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_SATD_4x4 OMXCATBAR(VCM4P10_SATD_4x4, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_SubAndTransformQDQResidual OMXCATBAR(VCM4P10_SubAndTransformQDQResidual, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_TransformDequantChromaDCFromPair OMXCATBAR(VCM4P10_TransformDequantChromaDCFromPair, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_TransformDequantLumaDCFromPair OMXCATBAR(VCM4P10_TransformDequantLumaDCFromPair, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_TransformQuant_ChromaDC OMXCATBAR(VCM4P10_TransformQuant_ChromaDC, OMXVCM4P10_SUFFIX)
+#define omxVCM4P10_TransformQuant_LumaDC OMXCATBAR(VCM4P10_TransformQuant_LumaDC, OMXVCM4P10_SUFFIX)
+
+#define omxVCM4P2_BlockMatch_Half_16x16 OMXCATBAR(VCM4P2_BlockMatch_Half_16x16, OMXVCM4P2_SUFFIX)
+#define omxVCM4P2_BlockMatch_Half_8x8 OMXCATBAR(VCM4P2_BlockMatch_Half_8x8, OMXVCM4P2_SUFFIX)
+#define omxVCM4P2_BlockMatch_Integer_16x16 OMXCATBAR(VCM4P2_BlockMatch_Integer_16x16, OMXVCM4P2_SUFFIX)
+#define omxVCM4P2_BlockMatch_Integer_8x8 OMXCATBAR(VCM4P2_BlockMatch_Integer_8x8, OMXVCM4P2_SUFFIX)
+#define omxVCM4P2_DCT8x8blk OMXCATBAR(VCM4P2_DCT8x8blk, OMXVCM4P2_SUFFIX)
+#define omxVCM4P2_DecodeBlockCoef_Inter OMXCATBAR(VCM4P2_DecodeBlockCoef_Inter, OMXVCM4P2_SUFFIX)
+#define omxVCM4P2_DecodeBlockCoef_Intra OMXCATBAR(VCM4P2_DecodeBlockCoef_Intra, OMXVCM4P2_SUFFIX)
+#define omxVCM4P2_DecodePadMV_PVOP OMXCATBAR(VCM4P2_DecodePadMV_PVOP, OMXVCM4P2_SUFFIX)
+#define omxVCM4P2_DecodeVLCZigzag_Inter OMXCATBAR(VCM4P2_DecodeVLCZigzag_Inter, OMXVCM4P2_SUFFIX)
+#define omxVCM4P2_DecodeVLCZigzag_IntraACVLC OMXCATBAR(VCM4P2_DecodeVLCZigzag_IntraACVLC, OMXVCM4P2_SUFFIX)
+#define omxVCM4P2_DecodeVLCZigzag_IntraDCVLC OMXCATBAR(VCM4P2_DecodeVLCZigzag_IntraDCVLC, OMXVCM4P2_SUFFIX)
+#define omxVCM4P2_EncodeMV OMXCATBAR(VCM4P2_EncodeMV, OMXVCM4P2_SUFFIX)
+#define omxVCM4P2_EncodeVLCZigzag_Inter OMXCATBAR(VCM4P2_EncodeVLCZigzag_Inter, OMXVCM4P2_SUFFIX)
+#define omxVCM4P2_EncodeVLCZigzag_IntraACVLC OMXCATBAR(VCM4P2_EncodeVLCZigzag_IntraACVLC, OMXVCM4P2_SUFFIX)
+#define omxVCM4P2_EncodeVLCZigzag_IntraDCVLC OMXCATBAR(VCM4P2_EncodeVLCZigzag_IntraDCVLC, OMXVCM4P2_SUFFIX)
+#define omxVCM4P2_FindMVpred OMXCATBAR(VCM4P2_FindMVpred, OMXVCM4P2_SUFFIX)
+#define omxVCM4P2_IDCT8x8blk OMXCATBAR(VCM4P2_IDCT8x8blk, OMXVCM4P2_SUFFIX)
+#define omxVCM4P2_MCReconBlock OMXCATBAR(VCM4P2_MCReconBlock, OMXVCM4P2_SUFFIX)
+#define omxVCM4P2_MEGetBufSize OMXCATBAR(VCM4P2_MEGetBufSize, OMXVCM4P2_SUFFIX)
+#define omxVCM4P2_MEInit OMXCATBAR(VCM4P2_MEInit, OMXVCM4P2_SUFFIX)
+#define omxVCM4P2_MotionEstimationMB OMXCATBAR(VCM4P2_MotionEstimationMB, OMXVCM4P2_SUFFIX)
+#define omxVCM4P2_PredictReconCoefIntra OMXCATBAR(VCM4P2_PredictReconCoefIntra, OMXVCM4P2_SUFFIX)
+#define omxVCM4P2_QuantInter_I OMXCATBAR(VCM4P2_QuantInter_I, OMXVCM4P2_SUFFIX)
+#define omxVCM4P2_QuantIntra_I OMXCATBAR(VCM4P2_QuantIntra_I, OMXVCM4P2_SUFFIX)
+#define omxVCM4P2_QuantInvInter_I OMXCATBAR(VCM4P2_QuantInvInter_I, OMXVCM4P2_SUFFIX)
+#define omxVCM4P2_QuantInvIntra_I OMXCATBAR(VCM4P2_QuantInvIntra_I, OMXVCM4P2_SUFFIX)
+#define omxVCM4P2_TransRecBlockCoef_inter OMXCATBAR(VCM4P2_TransRecBlockCoef_inter, OMXVCM4P2_SUFFIX)
+#define omxVCM4P2_TransRecBlockCoef_intra OMXCATBAR(VCM4P2_TransRecBlockCoef_intra, OMXVCM4P2_SUFFIX)
+
+#endif /* endif ARMOMX_ENABLE_RENAMING */
+#endif /* _armOMX_h_ */
diff --git a/dl/armSP.h b/dl/armSP.h
new file mode 100644
index 0000000..27528ef
--- /dev/null
+++ b/dl/armSP.h
@@ -0,0 +1,92 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ *
+ * This file was originally licensed as follows. It has been
+ * relicensed with permission from the copyright holders.
+ */
+
+/**
+ *
+ * File Name: armSP.h
+ * OpenMAX DL: v1.0.2
+ * Last Modified Revision: 7014
+ * Last Modified Date: Wed, 01 Aug 2007
+ *
+ * (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+ *
+ *
+ *
+ * File: armSP.h
+ * Brief: Declares API's/Basic Data types used across the OpenMAX Signal Processing domain
+ *
+ */
+#ifndef _armSP_H_
+#define _armSP_H_
+
+#include "omxtypes.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** FFT Specific declarations */
+extern OMX_S32 armSP_FFT_S32TwiddleTable[1026];
+extern OMX_F32 armSP_FFT_F32TwiddleTable[];
+
+typedef struct ARMsFFTSpec_SC32_Tag
+{
+ OMX_U32 N;
+ OMX_U16 *pBitRev;
+ OMX_SC32 *pTwiddle;
+ OMX_SC32 *pBuf;
+}ARMsFFTSpec_SC32;
+
+
+typedef struct ARMsFFTSpec_SC16_Tag
+{
+ OMX_U32 N;
+ OMX_U16 *pBitRev;
+ OMX_SC16 *pTwiddle;
+ OMX_SC16 *pBuf;
+}ARMsFFTSpec_SC16;
+
+typedef struct ARMsFFTSpec_R_SC32_Tag
+{
+ OMX_U32 N;
+ OMX_U16 *pBitRev;
+ OMX_SC32 *pTwiddle;
+ OMX_S32 *pBuf;
+}ARMsFFTSpec_R_SC32;
+
+typedef struct ARMsFFTSpec_R_FC32_Tag
+{
+ OMX_U32 N;
+ OMX_U16* pBitRev;
+ OMX_FC32* pTwiddle;
+ OMX_F32* pBuf;
+} ARMsFFTSpec_R_FC32;
+
+typedef struct ARMsFFTSpec_FC32_Tag
+{
+ OMX_U32 N;
+ OMX_U16* pBitRev;
+ OMX_FC32* pTwiddle;
+ OMX_FC32* pBuf;
+} ARMsFFTSpec_FC32;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+/*End of File*/
+
+
+
diff --git a/dl/armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_unsafe_s.S b/dl/armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_unsafe_s.S
new file mode 100644
index 0000000..1cacafc
--- /dev/null
+++ b/dl/armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_unsafe_s.S
@@ -0,0 +1,294 @@
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@// This is a modification of
+@// armSP_FFTInv_CCSToR_S32_preTwiddleRadix2_unsafe_s.s to support float
+@// instead of SC32.
+@//
+
+@//
+@// Description:
+@// Compute the "preTwiddleRadix2" stage prior to the call to the complexFFT
+@// It does a Z(k) = Feven(k) + jW^(-k) FOdd(k); k=0,1,2,...N/2-1 computation
+@//
+@//
+
+
+@// Include standard headers
+
+#include "omxtypes_s.h"
+#include "armCOMM_s.h"
+
+
+@// Import symbols required from other files
+@// (For example tables)
+
+
+@// Set debugging level
+@//DEBUG_ON SETL {TRUE}
+
+
+
+@// Guarding implementation by the processor name
+
+
+
+ @// Guarding implementation by the processor name
+
+
+
+@//Input Registers
+
+#define pSrc r0
+#define pDst r1
+#define pFFTSpec r2
+#define scale r3
+
+
+@// Output registers
+#define result r0
+
+@//Local Scratch Registers
+
+#define argTwiddle r1
+#define argDst r2
+#define argScale r4
+#define tmpOrder r4
+#define pTwiddle r4
+#define pOut r5
+#define subFFTSize r7
+#define subFFTNum r6
+#define N r6
+#define order r14
+#define diff r9
+@// Total num of radix stages required to complete the FFT
+#define count r8
+#define x0r r4
+#define x0i r5
+#define diffMinusOne r2
+#define round r3
+
+#define pOut1 r2
+#define size r7
+#define step r8
+#define step1 r9
+#define twStep r10
+#define pTwiddleTmp r11
+#define argTwiddle1 r12
+#define zero r14
+
+@// Neon registers
+
+#define dX0 D0.F32
+#define dShift D1.F32
+#define dX1 D1.F32
+#define dY0 D2.F32
+#define dY1 D3.F32
+#define dX0r D0.F32
+#define dX0i D1.F32
+#define dX1r D2.F32
+#define dX1i D3.F32
+#define dW0r D4.F32
+#define dW0i D5.F32
+#define dW1r D6.F32
+#define dW1i D7.F32
+#define dT0 D8.F32
+#define dT1 D9.F32
+#define dT2 D10.F32
+#define dT3 D11.F32
+#define qT0 D12.F32
+#define qT1 D14.F32
+#define qT2 D16.F32
+#define qT3 D18.F32
+#define dY0r D4.F32
+#define dY0i D5.F32
+#define dY1r D6.F32
+#define dY1i D7.F32
+
+#define dY2 D4.F32
+#define dY3 D5.F32
+#define dW0 D6.F32
+#define dW1 D7.F32
+#define dW0Tmp D10.F32
+#define dW1Neg D11.F32
+
+#define half D13.F32
+
+@ Structure offsets for the FFTSpec
+ .set ARMsFFTSpec_N, 0
+ .set ARMsFFTSpec_pBitRev, 4
+ .set ARMsFFTSpec_pTwiddle, 8
+ .set ARMsFFTSpec_pBuf, 12
+
+ .MACRO FFTSTAGE scaled, inverse, name
+
+ @// Read the size from structure and take log
+ LDR N, [pFFTSpec, #ARMsFFTSpec_N]
+
+ @// Read other structure parameters
+ LDR pTwiddle, [pFFTSpec, #ARMsFFTSpec_pTwiddle]
+ LDR pOut, [pFFTSpec, #ARMsFFTSpec_pBuf]
+
+ VMOV half, 0.5
+
+
+ MOV size,N,ASR #1 @// preserve the contents of N
+ MOV step,N,LSL #2 @// step = N/2 * 8 bytes
+
+
+ @// Z(k) = 1/2 {[F(k) + F'(N/2-k)] +j*W^(-k) [F(k) - F'(N/2-k)]}
+ @// Note: W^(k) is stored as negated value and also need to
+ @// conjugate the values from the table
+
+ @// Z(0) : no need of twiddle multiply
+ @// Z(0) = 1/2 { [F(0) + F'(N/2)] +j [F(0) - F'(N/2)] }
+
+ VLD1 dX0,[pSrc],step
+ ADD pOut1,pOut,step @// pOut1 = pOut+ N/2*8 bytes
+
+ VLD1 dX1,[pSrc]!
+ @// twStep = 3N/8 * 8 bytes pointing to W^1
+ SUB twStep,step,size,LSL #1
+
+ MOV step1,size,LSL #2 @// step1 = N/4 * 8 = N/2*4 bytes
+ SUB step1,step1,#8 @// (N/4-1)*8 bytes
+
+ VADD dY0,dX0,dX1 @// [b+d | a+c]
+ VSUB dY1,dX0,dX1 @// [b-d | a-c]
+ VMUL dY0, dY0, half[0]
+ VMUL dY1, dY1, half[0]
+
+ @// dY0= [a-c | a+c] ;dY1= [b-d | b+d]
+ VZIP dY0,dY1
+
+ VSUB dX0,dY0,dY1
+ SUBS size,size,#2
+ VADD dX1,dY0,dY1
+
+ SUB pSrc,pSrc,step
+
+ VST1 dX0[0],[pOut1]!
+ ADD pTwiddleTmp,pTwiddle,#8 @// W^2
+ VST1 dX1[1],[pOut1]!
+ ADD argTwiddle1,pTwiddle,twStep @// W^1
+
+
+ BLT decrementScale\name
+ BEQ lastElement\name
+
+
+ @// Z(k) = 1/2[F(k) + F'(N/2-k)] +j*W^(-k) [F(k) - F'(N/2-k)]
+ @// Note: W^k is stored as negative values in the table and also
+ @// need to conjugate the values from the table.
+ @//
+ @// Process 4 elements at a time. E.g: Z(1),Z(2) and Z(N/2-2),Z(N/2-1)
+ @// since both of them require F(1),F(2) and F(N/2-2),F(N/2-1)
+
+
+ SUB step,step,#24
+evenOddButterflyLoop\name :
+
+
+ VLD1 dW0r,[argTwiddle1],step1
+ VLD1 dW1r,[argTwiddle1]!
+
+ VLD2 {dX0r,dX0i},[pSrc],step
+ SUB argTwiddle1,argTwiddle1,step1
+ VLD2 {dX1r,dX1i},[pSrc]!
+
+ SUB step1,step1,#8 @// (N/4-2)*8 bytes
+ VLD1 dW0i,[pTwiddleTmp],step1
+ VLD1 dW1i,[pTwiddleTmp]!
+ SUB pSrc,pSrc,step
+
+ SUB pTwiddleTmp,pTwiddleTmp,step1
+ VREV64 dX1r,dX1r
+ VREV64 dX1i,dX1i
+ SUBS size,size,#4
+
+
+ VSUB dT2,dX0r,dX1r @// a-c
+ VADD dT3,dX0i,dX1i @// b+d
+ VADD dT0,dX0r,dX1r @// a+c
+ VSUB dT1,dX0i,dX1i @// b-d
+ SUB step1,step1,#8
+
+ VMUL dT2, dT2, half[0]
+ VMUL dT3, dT3, half[0]
+
+ VMUL dT0, dT0, half[0]
+ VMUL dT1, dT1, half[0]
+
+ VZIP dW1r,dW1i
+ VZIP dW0r,dW0i
+
+
+ VMUL dX1r,dW1r,dT2
+ VMUL dX1i,dW1r,dT3
+ VMUL dX0r,dW0r,dT2
+ VMUL dX0i,dW0r,dT3
+
+ VMLS dX1r,dW1i,dT3
+ VMLA dX1i,dW1i,dT2
+
+ VMLA dX0r,dW0i,dT3
+ VMLS dX0i,dW0i,dT2
+
+
+ VADD dY1r,dT0,dX1i @// F(N/2 -1)
+ VSUB dY1i,dX1r,dT1
+
+ VREV64 dY1r,dY1r
+ VREV64 dY1i,dY1i
+
+
+ VADD dY0r,dT0,dX0i @// F(1)
+ VSUB dY0i,dT1,dX0r
+
+
+ VST2 {dY0r,dY0i},[pOut1],step
+ VST2 {dY1r,dY1i},[pOut1]!
+ SUB pOut1,pOut1,step
+ SUB step,step,#32 @// (N/2-4)*8 bytes
+
+
+ BGT evenOddButterflyLoop\name
+
+
+ @// set both the ptrs to the last element
+ SUB pSrc,pSrc,#8
+ SUB pOut1,pOut1,#8
+
+ @// Last element can be expanded as follows
+ @// 1/2[Z(k) + Z'(k)] - j w^-k [Z(k) - Z'(k)] (since W^k is stored as
+ @// -ve)
+ @// 1/2[(a+jb) + (a-jb)] - j w^-k [(a+jb) - (a-jb)]
+ @// 1/2[2a+j0] - j (c-jd) [0+j2b]
+ @// (a+bc, -bd)
+ @// Since (c,d) = (0,1) for the last element, result is just (a,-b)
+
+lastElement\name :
+ VLD1 dX0r,[pSrc]
+
+ VST1 dX0r[0],[pOut1]!
+ VNEG dX0r,dX0r
+ VST1 dX0r[1],[pOut1]
+
+
+
+decrementScale\name :
+
+ .endm
+
+ M_START armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_unsafe,r4
+
+ FFTSTAGE "FALSE","TRUE",Inv
+ M_END
+
+ .end
diff --git a/dl/armSP_FFTInv_CCSToR_S32_preTwiddleRadix2_unsafe_s.S b/dl/armSP_FFTInv_CCSToR_S32_preTwiddleRadix2_unsafe_s.S
new file mode 100644
index 0000000..bc1cad0
--- /dev/null
+++ b/dl/armSP_FFTInv_CCSToR_S32_preTwiddleRadix2_unsafe_s.S
@@ -0,0 +1,321 @@
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@// This file was originally licensed as follows. It has been
+@// relicensed with permission from the copyright holders.
+@//
+
+@//
+@// File Name: armSP_FFTInv_CCSToR_S32_preTwiddleRadix2_unsafe_s.s
+@// OpenMAX DL: v1.0.2
+@// Last Modified Revision: 7485
+@// Last Modified Date: Fri, 21 Sep 2007
+@//
+@// (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+@//
+@//
+@//
+@// Description:
+@// Compute the "preTwiddleRadix2" stage prior to the call to the complexFFT
+@// It does a Z(k) = Feven(k) + jW^(-k) FOdd(k); k=0,1,2,...N/2-1 computation
+@// It implements both "scaled"(by 1/2) and "unsclaed" versions of the above formula
+@//
+
+
+@// Include standard headers
+
+#include "omxtypes_s.h"
+#include "armCOMM_s.h"
+
+
+@// Import symbols required from other files
+@// (For example tables)
+
+
+@// Set debugging level
+@//DEBUG_ON SETL {TRUE}
+
+
+
+@// Guarding implementation by the processor name
+
+
+
+ @// Guarding implementation by the processor name
+
+
+
+@//Input Registers
+
+#define pSrc r0
+#define pDst r1
+#define pFFTSpec r2
+#define scale r3
+
+
+@// Output registers
+#define result r0
+
+@//Local Scratch Registers
+
+#define argTwiddle r1
+#define argDst r2
+#define argScale r4
+#define tmpOrder r4
+#define pTwiddle r4
+#define pOut r5
+#define subFFTSize r7
+#define subFFTNum r6
+#define N r6
+#define order r14
+#define diff r9
+#define count r8 @// Total num of radix stages required to comple the FFT
+#define x0r r4
+#define x0i r5
+#define diffMinusOne r2
+#define round r3
+
+#define pOut1 r2
+#define size r7
+#define step r8
+#define step1 r9
+#define twStep r10
+#define pTwiddleTmp r11
+#define argTwiddle1 r12
+#define zero r14
+
+@// Neon registers
+
+#define dX0 D0.S32
+#define dShift D1.S32
+#define dX1 D1.S32
+#define dY0 D2.S32
+#define dY1 D3.S32
+#define dX0r D0.S32
+#define dX0i D1.S32
+#define dX1r D2.S32
+#define dX1i D3.S32
+#define dW0r D4.S32
+#define dW0i D5.S32
+#define dW1r D6.S32
+#define dW1i D7.S32
+#define dT0 D8.S32
+#define dT1 D9.S32
+#define dT2 D10.S32
+#define dT3 D11.S32
+#define qT0 Q6.S64
+#define qT1 Q7.S64
+#define qT2 Q8.S64
+#define qT3 Q9.S64
+#define dY0r D4.S32
+#define dY0i D5.S32
+#define dY1r D6.S32
+#define dY1i D7.S32
+
+#define dY2 D4.S32
+#define dY3 D5.S32
+#define dW0 D6.S32
+#define dW1 D7.S32
+#define dW0Tmp D10.S32
+#define dW1Neg D11.S32
+
+
+@ Structure offsets for the FFTSpec
+ .set ARMsFFTSpec_N, 0
+ .set ARMsFFTSpec_pBitRev, 4
+ .set ARMsFFTSpec_pTwiddle, 8
+ .set ARMsFFTSpec_pBuf, 12
+
+
+ .MACRO FFTSTAGE scaled, inverse, name
+
+ @// Read the size from structure and take log
+ LDR N, [pFFTSpec, #ARMsFFTSpec_N]
+
+ @// Read other structure parameters
+ LDR pTwiddle, [pFFTSpec, #ARMsFFTSpec_pTwiddle]
+ LDR pOut, [pFFTSpec, #ARMsFFTSpec_pBuf]
+
+
+
+ MOV size,N,ASR #1 @// preserve the contents of N
+ MOV step,N,LSL #2 @// step = N/2 * 8 bytes
+
+
+ @// Z(k) = 1/2 {[F(k) + F'(N/2-k)] +j*W^(-k) [F(k) - F'(N/2-k)]}
+ @// Note: W^(k) is stored as negated value and also need to conjugate the values from the table
+
+ @// Z(0) : no need of twiddle multiply
+ @// Z(0) = 1/2 { [F(0) + F'(N/2)] +j [F(0) - F'(N/2)] }
+
+ VLD1 dX0,[pSrc],step
+ ADD pOut1,pOut,step @// pOut1 = pOut+ N/2*8 bytes
+
+ VLD1 dX1,[pSrc]!
+ SUB twStep,step,size,LSL #1 @// twStep = 3N/8 * 8 bytes pointing to W^1
+
+ MOV step1,size,LSL #2 @// step1 = N/4 * 8 = N/2*4 bytes
+ SUB step1,step1,#8 @// (N/4-1)*8 bytes
+
+ VHADD dY0,dX0,dX1 @// [b+d | a+c]
+ VHSUB dY1,dX0,dX1 @// [b-d | a-c]
+ VZIP dY0,dY1 @// dY0= [a-c | a+c] ;dY1= [b-d | b+d]
+
+ .ifeqs "\scaled", "TRUE"
+ VHSUB dX0,dY0,dY1
+ SUBS size,size,#2
+ VHADD dX1,dY0,dY1
+ .else
+ VSUB dX0,dY0,dY1
+ SUBS size,size,#2
+ VADD dX1,dY0,dY1
+ .endif
+
+ SUB pSrc,pSrc,step
+
+ VST1 dX0[0],[pOut1]!
+ ADD pTwiddleTmp,pTwiddle,#8 @// W^2
+ VST1 dX1[1],[pOut1]!
+ ADD argTwiddle1,pTwiddle,twStep @// W^1
+
+
+ BLT decrementScale\name
+ BEQ lastElement\name
+
+
+ @// Z(k) = 1/2[F(k) + F'(N/2-k)] +j*W^(-k) [F(k) - F'(N/2-k)]
+ @// Note: W^k is stored as negative values in the table and also need to conjugate the values from the table
+ @// Process 4 elements at a time. E.g: Z(1),Z(2) and Z(N/2-2),Z(N/2-1) since both of them
+ @// require F(1),F(2) and F(N/2-2),F(N/2-1)
+
+
+ SUB step,step,#24
+evenOddButterflyLoop\name :
+
+
+ VLD1 dW0r,[argTwiddle1],step1
+ VLD1 dW1r,[argTwiddle1]!
+
+ VLD2 {dX0r,dX0i},[pSrc],step
+ SUB argTwiddle1,argTwiddle1,step1
+ VLD2 {dX1r,dX1i},[pSrc]!
+
+ SUB step1,step1,#8 @// (N/4-2)*8 bytes
+ VLD1 dW0i,[pTwiddleTmp],step1
+ VLD1 dW1i,[pTwiddleTmp]!
+ SUB pSrc,pSrc,step
+
+ SUB pTwiddleTmp,pTwiddleTmp,step1
+ VREV64 dX1r,dX1r
+ VREV64 dX1i,dX1i
+ SUBS size,size,#4
+
+
+ VHSUB dT2,dX0r,dX1r @// a-c
+ VHADD dT3,dX0i,dX1i @// b+d
+ SUB step1,step1,#8
+ VHADD dT0,dX0r,dX1r @// a+c
+ VHSUB dT1,dX0i,dX1i @// b-d
+
+ VZIP dW1r,dW1i
+ VZIP dW0r,dW0i
+
+
+ VMULL qT0,dW1r,dT2
+ VMLSL qT0,dW1i,dT3
+ VMULL qT1,dW1r,dT3
+ VMLAL qT1,dW1i,dT2
+
+ VMULL qT2,dW0r,dT2
+ VMLAL qT2,dW0i,dT3
+ VMULL qT3,dW0r,dT3
+ VMLSL qT3,dW0i,dT2
+
+
+ VRSHRN dX1r,qT0,#31
+ VRSHRN dX1i,qT1,#31
+
+ .ifeqs "\scaled", "TRUE"
+ VHADD dY1r,dT0,dX1i @// F(N/2 -1)
+ VHSUB dY1i,dX1r,dT1
+ .else
+ VADD dY1r,dT0,dX1i @// F(N/2 -1)
+ VSUB dY1i,dX1r,dT1
+
+ .endif
+
+
+ VREV64 dY1r,dY1r
+ VREV64 dY1i,dY1i
+
+
+ VRSHRN dX0r,qT2,#31
+ VRSHRN dX0i,qT3,#31
+
+ .ifeqs "\scaled", "TRUE"
+ VHADD dY0r,dT0,dX0i @// F(1)
+ VHSUB dY0i,dT1,dX0r
+ .else
+ VADD dY0r,dT0,dX0i @// F(1)
+ VSUB dY0i,dT1,dX0r
+ .endif
+
+
+ VST2 {dY0r,dY0i},[pOut1],step
+ VST2 {dY1r,dY1i},[pOut1]!
+ SUB pOut1,pOut1,step
+ SUB step,step,#32 @// (N/2-4)*8 bytes
+
+
+ BGT evenOddButterflyLoop\name
+
+
+ SUB pSrc,pSrc,#8 @// set both the ptrs to the last element
+ SUB pOut1,pOut1,#8
+
+ @// Last element can be expanded as follows
+ @// 1/2[Z(k) + Z'(k)] - j w^-k [Z(k) - Z'(k)] (since W^k is stored as -ve)
+ @// 1/2[(a+jb) + (a-jb)] - j w^-k [(a+jb) - (a-jb)]
+ @// 1/2[2a+j0] - j (c-jd) [0+j2b]
+ @// (a+bc, -bd)
+ @// Since (c,d) = (0,1) for the last element, result is just (a,-b)
+
+lastElement\name :
+ VLD1 dX0r,[pSrc]
+
+ .ifeqs "\scaled", "TRUE"
+ VSHR dX0r,dX0r,#1
+ .endif
+
+ VST1 dX0r[0],[pOut1]!
+ VNEG dX0r,dX0r
+ VST1 dX0r[1],[pOut1]
+
+
+
+decrementScale\name :
+
+ .ifeqs "\scaled", "TRUE"
+ SUB scale,scale,#1
+ .endif
+
+ .endm
+
+ M_START armSP_FFTInv_CCSToR_S32_preTwiddleRadix2_unsafe,r4
+
+ FFTSTAGE "FALSE","TRUE",Inv
+ M_END
+
+ M_START armSP_FFTInv_CCSToR_S32_Sfs_preTwiddleRadix2_unsafe,r4
+
+ FFTSTAGE "TRUE","TRUE",InvSfs
+ M_END
+
+
+ .end
diff --git a/dl/armSP_FFT_CToC_FC32_Radix2_fs_unsafe_s.S b/dl/armSP_FFT_CToC_FC32_Radix2_fs_unsafe_s.S
new file mode 100644
index 0000000..c5aefd5
--- /dev/null
+++ b/dl/armSP_FFT_CToC_FC32_Radix2_fs_unsafe_s.S
@@ -0,0 +1,134 @@
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@// This is a modification of armSP_FFT_CToC_SC32_Radix2_fs_unsafe_s.S
+@// to support float instead of SC32.
+@//
+
+@//
+@// Description:
+@// Compute the first stage of a Radix 2 DIT in-order out-of-place FFT
+@// stage for a N point complex signal.
+@//
+@//
+
+
+@// Include standard headers
+
+#include "omxtypes_s.h"
+#include "armCOMM_s.h"
+
+
+@// Import symbols required from other files
+@// (For example tables)
+
+
+
+
+@// Set debugging level
+@//DEBUG_ON SETL {TRUE}
+
+
+
+@// Guarding implementation by the processor name
+
+
+
+@// Guarding implementation by the processor name
+
+
+@//Input Registers
+
+#define pSrc r0
+#define pDst r2
+#define pTwiddle r1
+#define pPingPongBuf r5
+#define subFFTNum r6
+#define subFFTSize r7
+
+
+@//Output Registers
+
+
+@//Local Scratch Registers
+
+#define pointStep r3
+#define outPointStep r3
+#define grpSize r4
+#define setCount r4
+#define step r8
+#define dstStep r8
+
+@// Neon Registers
+
+#define dX0 D0.F32
+#define dX1 D1.F32
+#define dY0 D2.F32
+#define dY1 D3.F32
+
+
+ .MACRO FFTSTAGE scaled, inverse, name
+
+ @// Define stack arguments
+
+
+ @// update subFFTSize and subFFTNum into RN6 and RN7 for the next stage
+
+
+ MOV subFFTSize,#2
+ LSR grpSize,subFFTNum,#1
+ MOV subFFTNum,grpSize
+
+
+ @// pT0+1 increments pT0 by 8 bytes
+ @// pT0+pointStep = increment of 8*pointStep bytes = 4*grpSize bytes
+ @// Note: outPointStep = pointStep for firststage
+ @// Note: setCount = grpSize/2 (reuse the updated grpSize for setCount)
+
+ MOV pointStep,grpSize,LSL #3
+ RSB step,pointStep,#8
+
+
+ @// Loop on the sets for grp zero
+
+grpZeroSetLoop\name :
+
+ VLD1 dX0,[pSrc],pointStep
+ VLD1 dX1,[pSrc],step @// step = -pointStep + 8
+ SUBS setCount,setCount,#1
+
+ VADD dY0,dX0,dX1
+ VSUB dY1,dX0,dX1
+
+ VST1 dY0,[pDst],outPointStep
+ @// dstStep = step = -pointStep + 8
+ VST1 dY1,[pDst],dstStep
+
+ BGT grpZeroSetLoop\name
+
+
+ @// reset pSrc to pDst for the next stage
+ SUB pSrc,pDst,pointStep @// pDst -= 2*grpSize
+ MOV pDst,pPingPongBuf
+
+ .endm
+
+
+
+ M_START armSP_FFTFwd_CToC_FC32_Radix2_fs_OutOfPlace_unsafe,r4
+ FFTSTAGE "FALSE","FALSE",fwd
+ M_END
+
+
+
+ M_START armSP_FFTInv_CToC_FC32_Radix2_fs_OutOfPlace_unsafe,r4
+ FFTSTAGE "FALSE","TRUE",inv
+ M_END
+
+ .end
diff --git a/dl/armSP_FFT_CToC_FC32_Radix2_ls_unsafe_s.S b/dl/armSP_FFT_CToC_FC32_Radix2_ls_unsafe_s.S
new file mode 100644
index 0000000..6000813
--- /dev/null
+++ b/dl/armSP_FFT_CToC_FC32_Radix2_ls_unsafe_s.S
@@ -0,0 +1,153 @@
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@// This is a modification of armSP_FFT_CToC_SC32_Radix2_ls_unsafe_s.S
+@// to support float instead of SC32.
+@//
+
+@//
+@// Description:
+@// Compute the last stage of a Radix 2 DIT in-order out-of-place FFT
+@// stage for a N point complex signal.
+@//
+@//
+
+
+@// Include standard headers
+
+#include "omxtypes_s.h"
+#include "armCOMM_s.h"
+
+
+@// Import symbols required from other files
+@// (For example tables)
+
+
+
+
+@// Set debugging level
+@//DEBUG_ON SETL {TRUE}
+
+
+@// Guarding implementation by the processor name
+
+
+@//Input Registers
+
+#define pSrc r0
+#define pDst r2
+#define pTwiddle r1
+#define subFFTNum r6
+#define subFFTSize r7
+
+
+@//Output Registers
+
+
+@//Local Scratch Registers
+
+
+#define outPointStep r3
+#define grpCount r4
+#define dstStep r5
+#define pTmp r4
+
+@// Neon Registers
+
+#define dWr d0.f32
+#define dWi d1.f32
+#define dXr0 d2.f32
+#define dXi0 d3.f32
+#define dXr1 d4.f32
+#define dXi1 d5.f32
+#define dYr0 d6.f32
+#define dYi0 d7.f32
+#define dYr1 d8.f32
+#define dYi1 d9.f32
+#define qT0 d10.f32
+#define qT1 d12.f32
+
+ .MACRO FFTSTAGE scaled, inverse, name
+
+
+ MOV outPointStep,subFFTSize,LSL #3
+ @// Update grpCount and grpSize rightaway
+
+ MOV subFFTNum,#1 @//after the last stage
+ LSL grpCount,subFFTSize,#1
+
+ @// update subFFTSize for the next stage
+ MOV subFFTSize,grpCount
+
+ RSB dstStep,outPointStep,#16
+
+
+ @// Loop on 2 grps at a time for the last stage
+
+radix2lsGrpLoop\name :
+ @ dWr = [pTwiddle[0].Re, pTwiddle[1].Re]
+ @ dWi = [pTwiddle[0].Im, pTwiddle[1].Im]
+ VLD2 {dWr,dWi},[pTwiddle :64]!
+
+ @ dXr0 = [pSrc[0].Re, pSrc[2].Re]
+ @ dXi0 = [pSrc[0].Im, pSrc[2].Im]
+ @ dXr1 = [pSrc[1].Re, pSrc[3].Re]
+ @ dXi1 = [pSrc[1].Im, pSrc[3].Im]
+ VLD4 {dXr0,dXi0,dXr1,dXi1},[pSrc :128]!
+ SUBS grpCount,grpCount,#4 @// grpCount is multiplied by 2
+
+ .ifeqs "\inverse", "TRUE"
+ VMUL qT0,dWr,dXr1
+ VMLA qT0,dWi,dXi1 @// real part
+ VMUL qT1,dWr,dXi1
+ VMLS qT1,dWi,dXr1 @// imag part
+
+ .else
+
+ VMUL qT0,dWr,dXr1
+ VMLS qT0,dWi,dXi1 @// real part
+ VMUL qT1,dWr,dXi1
+ VMLA qT1,dWi,dXr1 @// imag part
+
+ .endif
+
+ VSUB dYr0,dXr0,qT0
+ VSUB dYi0,dXi0,qT1
+ VADD dYr1,dXr0,qT0
+ VADD dYi1,dXi0,qT1
+
+ VST2 {dYr0,dYi0},[pDst],outPointStep
+ VST2 {dYr1,dYi1},[pDst],dstStep @// dstStep = step = -outPointStep + 16
+
+ BGT radix2lsGrpLoop\name
+
+
+ @// Reset and Swap pSrc and pDst for the next stage
+ MOV pTmp,pDst
+ SUB pDst,pSrc,outPointStep,LSL #1 @// pDst -= 4*size; pSrc -= 8*size bytes
+ SUB pSrc,pTmp,outPointStep
+
+ @// Reset pTwiddle for the next stage
+ SUB pTwiddle,pTwiddle,outPointStep @// pTwiddle -= 4*size bytes
+
+ .endm
+
+
+
+ M_START armSP_FFTFwd_CToC_FC32_Radix2_ls_OutOfPlace_unsafe,r4,""
+ FFTSTAGE "FALSE","FALSE",fwd
+ M_END
+
+
+
+ M_START armSP_FFTInv_CToC_FC32_Radix2_ls_OutOfPlace_unsafe,r4
+ FFTSTAGE "FALSE","TRUE",inv
+ M_END
+
+ .end
diff --git a/dl/armSP_FFT_CToC_FC32_Radix2_unsafe_s.S b/dl/armSP_FFT_CToC_FC32_Radix2_unsafe_s.S
new file mode 100644
index 0000000..7c888ee
--- /dev/null
+++ b/dl/armSP_FFT_CToC_FC32_Radix2_unsafe_s.S
@@ -0,0 +1,191 @@
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@// This is a modification of armSP_FFT_CToC_SC32_Radix2_unsafe_s.s
+@// to support float instead of SC32.
+@//
+
+@// Description:
+@// Compute a Radix 2 DIT in-order out-of-place FFT stage for an N point
+@// complex signal. This handles the general stage, not the first or last
+@// stage.
+@//
+@//
+
+
+@// Include standard headers
+
+#include "omxtypes_s.h"
+#include "armCOMM_s.h"
+
+
+@// Import symbols required from other files
+@// (For example tables)
+
+
+
+@// Set debugging level
+@//DEBUG_ON SETL {TRUE}
+
+
+
+@// Guarding implementation by the processor name
+
+
+
+
+@// Guarding implementation by the processor name
+
+
+@//Input Registers
+
+#define pSrc r0
+#define pDst r2
+#define pTwiddle r1
+#define subFFTNum r6
+#define subFFTSize r7
+
+
+@//Output Registers
+
+
+@//Local Scratch Registers
+
+#define outPointStep r3
+#define pointStep r4
+#define grpCount r5
+#define setCount r8
+@//const RN 9
+#define step r10
+#define dstStep r11
+#define pTable r9
+#define pTmp r9
+
+@// Neon Registers
+
+#define dW D0.F32
+#define dX0 D2.F32
+#define dX1 D3.F32
+#define dX2 D4.F32
+#define dX3 D5.F32
+#define dY0 D6.F32
+#define dY1 D7.F32
+#define dY2 D8.F32
+#define dY3 D9.F32
+#define qT0 D10.F32
+#define qT1 D11.F32
+
+
+ .MACRO FFTSTAGE scaled, inverse, name
+
+ @// Define stack arguments
+
+
+ @// Update grpCount and grpSize rightaway inorder to reuse pGrpCount
+ @// and pGrpSize regs
+
+ LSR subFFTNum,subFFTNum,#1 @//grpSize
+ LSL grpCount,subFFTSize,#1
+
+
+ @// pT0+1 increments pT0 by 8 bytes
+ @// pT0+pointStep = increment of 8*pointStep bytes = 4*grpSize bytes
+ MOV pointStep,subFFTNum,LSL #2
+
+ @// update subFFTSize for the next stage
+ MOV subFFTSize,grpCount
+
+ @// pOut0+1 increments pOut0 by 8 bytes
+ @// pOut0+outPointStep == increment of 8*outPointStep bytes =
+ @// 4*size bytes
+ SMULBB outPointStep,grpCount,pointStep
+ LSL pointStep,pointStep,#1
+
+
+ RSB step,pointStep,#16
+ RSB dstStep,outPointStep,#16
+
+ @// Loop on the groups
+
+radix2GrpLoop\name :
+ MOV setCount,pointStep,LSR #3
+ VLD1 dW,[pTwiddle],pointStep @//[wi | wr]
+
+
+ @// Loop on the sets
+
+
+radix2SetLoop\name :
+
+
+ @// point0: dX0-real part dX1-img part
+ VLD2 {dX0,dX1},[pSrc],pointStep
+ @// point1: dX2-real part dX3-img part
+ VLD2 {dX2,dX3},[pSrc],step
+
+ SUBS setCount,setCount,#2
+
+ .ifeqs "\inverse", "TRUE"
+ VMUL qT0,dX2,dW[0]
+ VMLA qT0,dX3,dW[1] @// real part
+ VMUL qT1,dX3,dW[0]
+ VMLS qT1,dX2,dW[1] @// imag part
+
+ .else
+
+ VMUL qT0,dX2,dW[0]
+ VMLS qT0,dX3,dW[1] @// real part
+ VMUL qT1,dX3,dW[0]
+ VMLA qT1,dX2,dW[1] @// imag part
+
+ .endif
+
+ VSUB dY0,dX0,qT0
+ VSUB dY1,dX1,qT1
+ VADD dY2,dX0,qT0
+ VADD dY3,dX1,qT1
+
+ VST2 {dY0,dY1},[pDst],outPointStep
+ @// dstStep = -outPointStep + 16
+ VST2 {dY2,dY3},[pDst],dstStep
+
+ BGT radix2SetLoop\name
+
+ SUBS grpCount,grpCount,#2
+ ADD pSrc,pSrc,pointStep
+ BGT radix2GrpLoop\name
+
+
+ @// Reset and Swap pSrc and pDst for the next stage
+ MOV pTmp,pDst
+ @// pDst -= 4*size; pSrc -= 8*size bytes
+ SUB pDst,pSrc,outPointStep,LSL #1
+ SUB pSrc,pTmp,outPointStep
+
+ @// Reset pTwiddle for the next stage
+ @// pTwiddle -= 4*size bytes
+ SUB pTwiddle,pTwiddle,outPointStep
+
+
+ .endm
+
+
+
+ M_START armSP_FFTFwd_CToC_FC32_Radix2_OutOfPlace_unsafe,r4
+ FFTSTAGE "FALSE","FALSE",FWD
+ M_END
+
+
+
+ M_START armSP_FFTInv_CToC_FC32_Radix2_OutOfPlace_unsafe,r4
+ FFTSTAGE "FALSE","TRUE",INV
+ M_END
+
+
+ .end
diff --git a/dl/armSP_FFT_CToC_FC32_Radix4_fs_unsafe_s.S b/dl/armSP_FFT_CToC_FC32_Radix4_fs_unsafe_s.S
new file mode 100644
index 0000000..b66a8ef
--- /dev/null
+++ b/dl/armSP_FFT_CToC_FC32_Radix4_fs_unsafe_s.S
@@ -0,0 +1,243 @@
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@//
+@// This is a modification of armSP_FFT_CToC_SC32_Radix4_fs_unsafe_s.s
+@// to support float instead of SC32.
+@//
+
+@//
+@// Description:
+@// Compute a first stage Radix 4 FFT stage for a N point complex signal
+@//
+@//
+
+
+@// Include standard headers
+
+#include "omxtypes_s.h"
+#include "armCOMM_s.h"
+
+@// Import symbols required from other files
+@// (For example tables)
+
+
+
+
+@// Set debugging level
+@//DEBUG_ON SETL {TRUE}
+
+
+
+@// Guarding implementation by the processor name
+
+
+
+@// Guarding implementation by the processor name
+
+
+@//Input Registers
+
+#define pSrc r0
+#define pDst r2
+#define pTwiddle r1
+#define pPingPongBuf r5
+#define subFFTNum r6
+#define subFFTSize r7
+
+
+@//Output Registers
+
+
+@//Local Scratch Registers
+
+#define grpSize r3
+@// Reuse grpSize as setCount
+#define setCount r3
+#define pointStep r4
+#define outPointStep r4
+#define setStep r8
+#define step1 r9
+#define step3 r10
+
+@// Neon Registers
+
+#define dXr0 D0.F32
+#define dXi0 D1.F32
+#define dXr1 D2.F32
+#define dXi1 D3.F32
+#define dXr2 D4.F32
+#define dXi2 D5.F32
+#define dXr3 D6.F32
+#define dXi3 D7.F32
+#define dYr0 D8.F32
+#define dYi0 D9.F32
+#define dYr1 D10.F32
+#define dYi1 D11.F32
+#define dYr2 D12.F32
+#define dYi2 D13.F32
+#define dYr3 D14.F32
+#define dYi3 D15.F32
+#define qX0 Q0.F32
+#define qX1 Q1.F32
+#define qX2 Q2.F32
+#define qX3 Q3.F32
+#define qY0 Q4.F32
+#define qY1 Q5.F32
+#define qY2 Q6.F32
+#define qY3 Q7.F32
+#define dZr0 D16.F32
+#define dZi0 D17.F32
+#define dZr1 D18.F32
+#define dZi1 D19.F32
+#define dZr2 D20.F32
+#define dZi2 D21.F32
+#define dZr3 D22.F32
+#define dZi3 D23.F32
+#define qZ0 Q8.F32
+#define qZ1 Q9.F32
+#define qZ2 Q10.F32
+#define qZ3 Q11.F32
+
+
+ .MACRO FFTSTAGE scaled, inverse, name
+
+ @// Define stack arguments
+
+ @// pT0+1 increments pT0 by 8 bytes
+ @// pT0+pointStep = increment of 8*pointStep bytes = 2*grpSize bytes
+ @// Note: outPointStep = pointStep for firststage
+
+ MOV pointStep,subFFTNum,LSL #1
+
+
+ @// Update pSubFFTSize and pSubFFTNum regs
+ VLD2 {dXr0,dXi0},[pSrc :128],pointStep @// data[0]
+ @// subFFTSize = 1 for the first stage
+ MOV subFFTSize,#4
+
+ @// Note: setCount = subFFTNum/4 (reuse the grpSize reg for setCount)
+ LSR grpSize,subFFTNum,#2
+ VLD2 {dXr1,dXi1},[pSrc :128],pointStep @// data[1]
+ MOV subFFTNum,grpSize
+
+
+ @// Calculate the step of input data for the next set
+ @//MOV setStep,pointStep,LSL #1
+ MOV setStep,grpSize,LSL #4
+ VLD2 {dXr2,dXi2},[pSrc :128],pointStep @// data[2]
+ @// setStep = 3*pointStep
+ ADD setStep,setStep,pointStep
+ @// setStep = - 3*pointStep+16
+ RSB setStep,setStep,#16
+
+ @// data[3] & update pSrc for the next set
+ VLD2 {dXr3,dXi3},[pSrc :128],setStep
+ @// step1 = 2*pointStep
+ MOV step1,pointStep,LSL #1
+
+ VADD qY0,qX0,qX2
+
+ @// step3 = -pointStep
+ RSB step3,pointStep,#0
+
+ @// grp = 0 a special case since all the twiddle factors are 1
+ @// Loop on the sets : 2 sets at a time
+
+radix4fsGrpZeroSetLoop\name :
+
+
+
+ @// Decrement setcount
+ SUBS setCount,setCount,#2
+
+
+ @// finish first stage of 4 point FFT
+
+
+ VSUB qY2,qX0,qX2
+
+ VLD2 {dXr0,dXi0},[pSrc :128],step1 @// data[0]
+ VADD qY1,qX1,qX3
+ VLD2 {dXr2,dXi2},[pSrc :128],step3 @// data[2]
+ VSUB qY3,qX1,qX3
+
+
+ @// finish second stage of 4 point FFT
+
+ .ifeqs "\inverse", "TRUE"
+
+ VLD2 {dXr1,dXi1},[pSrc :128],step1 @// data[1]
+ VADD qZ0,qY0,qY1
+
+ @// data[3] & update pSrc for the next set
+ VLD2 {dXr3,dXi3},[pSrc :128],setStep
+ VSUB dZr3,dYr2,dYi3
+
+ VST2 {dZr0,dZi0},[pDst :128],outPointStep
+ VADD dZi3,dYi2,dYr3
+
+ VSUB qZ1,qY0,qY1
+ VST2 {dZr3,dZi3},[pDst :128],outPointStep
+
+ VADD dZr2,dYr2,dYi3
+ VST2 {dZr1,dZi1},[pDst :128],outPointStep
+ VSUB dZi2,dYi2,dYr3
+
+ VADD qY0,qX0,qX2 @// u0 for next iteration
+ VST2 {dZr2,dZi2},[pDst :128],setStep
+
+
+ .else
+
+ VLD2 {dXr1,dXi1},[pSrc :128],step1 @// data[1]
+ VADD qZ0,qY0,qY1
+
+ @// data[3] & update pSrc for the next set
+ VLD2 {dXr3,dXi3},[pSrc :128],setStep
+ VADD dZr2,dYr2,dYi3
+
+ VST2 {dZr0,dZi0},[pDst :128],outPointStep
+ VSUB dZi2,dYi2,dYr3
+
+ VSUB qZ1,qY0,qY1
+ VST2 {dZr2,dZi2},[pDst :128],outPointStep
+
+ VSUB dZr3,dYr2,dYi3
+ VST2 {dZr1,dZi1},[pDst :128],outPointStep
+ VADD dZi3,dYi2,dYr3
+
+ VADD qY0,qX0,qX2 @// u0 for next iteration
+ VST2 {dZr3,dZi3},[pDst :128],setStep
+
+ .endif
+
+ BGT radix4fsGrpZeroSetLoop\name
+
+ @// reset pSrc to pDst for the next stage
+ SUB pSrc,pDst,pointStep @// pDst -= 2*grpSize
+ MOV pDst,pPingPongBuf
+
+
+ .endm
+
+
+
+ M_START armSP_FFTFwd_CToC_FC32_Radix4_fs_OutOfPlace_unsafe,r4
+ FFTSTAGE "FALSE","FALSE",fwd
+ M_END
+
+
+
+ M_START armSP_FFTInv_CToC_FC32_Radix4_fs_OutOfPlace_unsafe,r4
+ FFTSTAGE "FALSE","TRUE",inv
+ M_END
+
+
+ .end
diff --git a/dl/armSP_FFT_CToC_FC32_Radix4_ls_unsafe_s.S b/dl/armSP_FFT_CToC_FC32_Radix4_ls_unsafe_s.S
new file mode 100644
index 0000000..8a840ed
--- /dev/null
+++ b/dl/armSP_FFT_CToC_FC32_Radix4_ls_unsafe_s.S
@@ -0,0 +1,335 @@
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@// This is a modification of armSP_FFT_CToC_SC32_Radix4_ls_unsafe_s.s
+@// to support float instead of SC32.
+@//
+
+@//
+@// Description:
+@// Compute a Radix 4 FFT stage for a N point complex signal
+@//
+@//
+
+
+@// Include standard headers
+
+#include "omxtypes_s.h"
+#include "armCOMM_s.h"
+
+@// Import symbols required from other files
+@// (For example tables)
+
+
+
+
+@// Set debugging level
+@//DEBUG_ON SETL {TRUE}
+
+
+@// Guarding implementation by the processor name
+
+
+@// Import symbols required from other files
+@// (For example tables)
+ @//IMPORT armAAC_constTable
+
+@//Input Registers
+
+#define pSrc r0
+#define pDst r2
+#define pTwiddle r1
+#define subFFTNum r6
+#define subFFTSize r7
+
+
+
+@//Output Registers
+
+
+@//Local Scratch Registers
+
+#define outPointStep r3
+#define grpCount r4
+#define dstStep r5
+#define grpTwStep r8
+#define stepTwiddle r9
+#define twStep r10
+#define pTmp r4
+#define step16 r11
+#define step24 r12
+
+
+@// Neon Registers
+
+#define dButterfly1Real02 D0.F32
+#define dButterfly1Imag02 D1.F32
+#define dButterfly1Real13 D2.F32
+#define dButterfly1Imag13 D3.F32
+#define dButterfly2Real02 D4.F32
+#define dButterfly2Imag02 D5.F32
+#define dButterfly2Real13 D6.F32
+#define dButterfly2Imag13 D7.F32
+#define dXr0 D0.F32
+#define dXi0 D1.F32
+#define dXr1 D2.F32
+#define dXi1 D3.F32
+#define dXr2 D4.F32
+#define dXi2 D5.F32
+#define dXr3 D6.F32
+#define dXi3 D7.F32
+
+#define dYr0 D16.F32
+#define dYi0 D17.F32
+#define dYr1 D18.F32
+#define dYi1 D19.F32
+#define dYr2 D20.F32
+#define dYi2 D21.F32
+#define dYr3 D22.F32
+#define dYi3 D23.F32
+
+#define dW1r D8.F32
+#define dW1i D9.F32
+#define dW2r D10.F32
+#define dW2i D11.F32
+#define dW3r D12.F32
+#define dW3i D13.F32
+#define qT0 d14.f32
+#define qT1 d16.F32
+#define qT2 d18.F32
+#define qT3 d20.f32
+#define qT4 d22.f32
+#define qT5 d24.f32
+
+#define dZr0 D14.F32
+#define dZi0 D15.F32
+#define dZr1 D26.F32
+#define dZi1 D27.F32
+#define dZr2 D28.F32
+#define dZi2 D29.F32
+#define dZr3 D30.F32
+#define dZi3 D31.F32
+
+#define qX0 Q0.F32
+#define qY0 Q8.F32
+#define qY1 Q9.F32
+#define qY2 Q10.F32
+#define qY3 Q11.F32
+#define qZ0 Q7.F32
+#define qZ1 Q13.F32
+#define qZ2 Q14.F32
+#define qZ3 Q15.F32
+
+
+
+ .MACRO FFTSTAGE scaled, inverse , name
+
+ @// Define stack arguments
+
+
+ @// pOut0+1 increments pOut0 by 8 bytes
+ @// pOut0+outPointStep == increment of 8*outPointStep bytes
+ MOV outPointStep,subFFTSize,LSL #3
+
+ @// Update grpCount and grpSize rightaway
+
+ VLD2 {dW1r,dW1i},[pTwiddle :128] @// [wi|wr]
+ MOV step16,#16
+ LSL grpCount,subFFTSize,#2
+
+ VLD1 dW2r,[pTwiddle :64] @// [wi|wr]
+ MOV subFFTNum,#1 @//after the last stage
+
+ VLD1 dW3r,[pTwiddle :64],step16 @// [wi|wr]
+ MOV stepTwiddle,#0
+
+ VLD1 dW2i,[pTwiddle :64]! @// [wi|wr]
+ SUB grpTwStep,stepTwiddle,#8 @// grpTwStep = -8 to start with
+
+ @// update subFFTSize for the next stage
+ MOV subFFTSize,grpCount
+ VLD1 dW3i,[pTwiddle :64],grpTwStep @// [wi|wr]
+ MOV dstStep,outPointStep,LSL #1
+
+ @// AC.r AC.i BD.r BD.i
+ VLD4 {dButterfly1Real02,dButterfly1Imag02,dButterfly1Real13,dButterfly1Imag13},[pSrc :256]!
+ ADD dstStep,dstStep,outPointStep @// dstStep = 3*outPointStep
+ RSB dstStep,dstStep,#16 @// dstStep = - 3*outPointStep+16
+ MOV step24,#24
+
+ @// AC.r AC.i BD.r BD.i
+ VLD4 {dButterfly2Real02,dButterfly2Imag02,dButterfly2Real13,dButterfly2Imag13},[pSrc :256]!
+
+
+ @// Process two groups at a time
+
+radix4lsGrpLoop\name :
+
+ VZIP dW2r,dW2i
+ ADD stepTwiddle,stepTwiddle,#16
+ VZIP dW3r,dW3i
+ ADD grpTwStep,stepTwiddle,#4
+ VUZP dButterfly1Real13, dButterfly2Real13 @// B.r D.r
+ SUB twStep,stepTwiddle,#16 @// -16+stepTwiddle
+ VUZP dButterfly1Imag13, dButterfly2Imag13 @// B.i D.i
+ MOV grpTwStep,grpTwStep,LSL #1
+ VUZP dButterfly1Real02, dButterfly2Real02 @// A.r C.r
+ RSB grpTwStep,grpTwStep,#0 @// -8-2*stepTwiddle
+
+
+ VUZP dButterfly1Imag02, dButterfly2Imag02 @// A.i C.i
+
+
+ @// grpCount is multiplied by 4
+ SUBS grpCount,grpCount,#8
+
+ .ifeqs "\inverse", "TRUE"
+ VMUL dZr1,dW1r,dXr1
+ VMLA dZr1,dW1i,dXi1 @// real part
+ VMUL dZi1,dW1r,dXi1
+ VMLS dZi1,dW1i,dXr1 @// imag part
+
+ .else
+
+ VMUL dZr1,dW1r,dXr1
+ VMLS dZr1,dW1i,dXi1 @// real part
+ VMUL dZi1,dW1r,dXi1
+ VMLA dZi1,dW1i,dXr1 @// imag part
+
+ .endif
+
+ VLD2 {dW1r,dW1i},[pTwiddle :128],stepTwiddle @// [wi|wr]
+
+ .ifeqs "\inverse", "TRUE"
+ VMUL dZr2,dW2r,dXr2
+ VMLA dZr2,dW2i,dXi2 @// real part
+ VMUL dZi2,dW2r,dXi2
+ VLD1 dW2r,[pTwiddle :64],step16 @// [wi|wr]
+ VMLS dZi2,dW2i,dXr2 @// imag part
+
+ .else
+
+ VMUL dZr2,dW2r,dXr2
+ VMLS dZr2,dW2i,dXi2 @// real part
+ VMUL dZi2,dW2r,dXi2
+ VLD1 dW2r,[pTwiddle :64],step16 @// [wi|wr]
+ VMLA dZi2,dW2i,dXr2 @// imag part
+
+ .endif
+
+
+ VLD1 dW2i,[pTwiddle :64],twStep @// [wi|wr]
+
+ @// move qX0 so as to load for the next iteration
+ VMOV qZ0,qX0
+ @// AC.r AC.i BD.r BD.i
+ VLD4 {dButterfly1Real02,dButterfly1Imag02,dButterfly1Real13,dButterfly1Imag13},[pSrc :256]!
+
+
+ .ifeqs "\inverse", "TRUE"
+ VMUL dZr3,dW3r,dXr3
+ VMLA dZr3,dW3i,dXi3 @// real part
+ VMUL dZi3,dW3r,dXi3
+ VLD1 dW3r,[pTwiddle :64],step24
+ VMLS dZi3,dW3i,dXr3 @// imag part
+
+ .else
+
+ VMUL dZr3,dW3r,dXr3
+ VMLS dZr3,dW3i,dXi3 @// real part
+ VMUL dZi3,dW3r,dXi3
+ VLD1 dW3r,[pTwiddle :64],step24
+ VMLA dZi3,dW3i,dXr3 @// imag part
+
+ .endif
+
+ VLD1 dW3i,[pTwiddle :64],grpTwStep @// [wi|wr]
+
+ @// AC.r AC.i BD.r BD.i
+ VLD4 {dButterfly2Real02,dButterfly2Imag02,dButterfly2Real13,dButterfly2Imag13},[pSrc :256]!
+
+
+ @// finish first stage of 4 point FFT
+
+ VADD qY0,qZ0,qZ2
+ VSUB qY2,qZ0,qZ2
+ VADD qY1,qZ1,qZ3
+ VSUB qY3,qZ1,qZ3
+
+
+ @// finish second stage of 4 point FFT
+
+ .ifeqs "\inverse", "TRUE"
+
+ VSUB qZ0,qY2,qY1
+
+ VADD dZr3,dYr0,dYi3
+ VST2 {dZr0,dZi0},[pDst :128],outPointStep
+ VSUB dZi3,dYi0,dYr3
+
+ VADD qZ2,qY2,qY1
+ VST2 {dZr3,dZi3},[pDst :128],outPointStep
+
+ VSUB dZr1,dYr0,dYi3
+ VST2 {dZr2,dZi2},[pDst :128],outPointStep
+ VADD dZi1,dYi0,dYr3
+
+ @// dstStep = -outPointStep + 16
+ VST2 {dZr1,dZi1},[pDst :128],dstStep
+
+
+ .else
+
+ VSUB qZ0,qY2,qY1
+
+ VSUB dZr1,dYr0,dYi3
+ VST2 {dZr0,dZi0},[pDst :128],outPointStep
+ VADD dZi1,dYi0,dYr3
+
+ VADD qZ2,qY2,qY1
+ VST2 {dZr1,dZi1},[pDst :128],outPointStep
+
+ VADD dZr3,dYr0,dYi3
+ VST2 {dZr2,dZi2},[pDst :128],outPointStep
+ VSUB dZi3,dYi0,dYr3
+
+ @// dstStep = -outPointStep + 16
+ VST2 {dZr3,dZi3},[pDst :128],dstStep
+
+
+ .endif
+
+ BGT radix4lsGrpLoop\name
+
+
+ @// Reset and Swap pSrc and pDst for the next stage
+ MOV pTmp,pDst
+ @// Extra increment done in final iteration of the loop
+ SUB pSrc,pSrc,#64
+ @// pDst -= 4*size; pSrc -= 8*size bytes
+ SUB pDst,pSrc,outPointStep,LSL #2
+ SUB pSrc,pTmp,outPointStep
+ SUB pTwiddle,pTwiddle,subFFTSize,LSL #1
+ @// Extra increment done in final iteration of the loop
+ SUB pTwiddle,pTwiddle,#16
+
+ .endm
+
+
+ M_START armSP_FFTFwd_CToC_FC32_Radix4_ls_OutOfPlace_unsafe,r4
+ FFTSTAGE "FALSE","FALSE",fwd
+ M_END
+
+
+ M_START armSP_FFTInv_CToC_FC32_Radix4_ls_OutOfPlace_unsafe,r4
+ FFTSTAGE "FALSE","TRUE",inv
+ M_END
+
+
+ .end
diff --git a/dl/armSP_FFT_CToC_FC32_Radix4_unsafe_s.S b/dl/armSP_FFT_CToC_FC32_Radix4_unsafe_s.S
new file mode 100644
index 0000000..6405483
--- /dev/null
+++ b/dl/armSP_FFT_CToC_FC32_Radix4_unsafe_s.S
@@ -0,0 +1,324 @@
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@//
+@// This is a modification of armSP_FFT_CToC_SC32_Radix4_unsafe_s.s
+@// to support float instead of SC32.
+@//
+
+@//
+@// Description:
+@// Compute a Radix 4 FFT stage for a N point complex signal
+@//
+@//
+
+
+@// Include standard headers
+
+#include "omxtypes_s.h"
+#include "armCOMM_s.h"
+
+
+@// Import symbols required from other files
+@// (For example tables)
+
+
+
+
+@// Set debugging level
+@//DEBUG_ON SETL {TRUE}
+
+
+
+@// Guarding implementation by the processor name
+
+
+
+
+@// Guarding implementation by the processor name
+
+
+@// Import symbols required from other files
+@// (For example tables)
+
+
+@//Input Registers
+
+#define pSrc r0
+#define pDst r2
+#define pTwiddle r1
+#define subFFTNum r6
+#define subFFTSize r7
+
+
+
+@//Output Registers
+
+
+@//Local Scratch Registers
+
+#define grpCount r3
+#define pointStep r4
+#define outPointStep r5
+#define stepTwiddle r12
+#define setCount r14
+#define srcStep r8
+#define setStep r9
+#define dstStep r10
+#define twStep r11
+#define t1 r3
+
+@// Neon Registers
+
+#define dW1 D0.F32
+#define dW2 D1.F32
+#define dW3 D2.F32
+
+#define dXr0 D4.F32
+#define dXi0 D5.F32
+#define dXr1 D6.F32
+#define dXi1 D7.F32
+#define dXr2 D8.F32
+#define dXi2 D9.F32
+#define dXr3 D10.F32
+#define dXi3 D11.F32
+#define dYr0 D12.F32
+#define dYi0 D13.F32
+#define dYr1 D14.F32
+#define dYi1 D15.F32
+#define dYr2 D16.F32
+#define dYi2 D17.F32
+#define dYr3 D18.F32
+#define dYi3 D19.F32
+#define qT0 d16.f32
+#define qT1 d18.f32
+#define qT2 d12.f32
+#define qT3 d14.f32
+#define dZr0 D20.F32
+#define dZi0 D21.F32
+#define dZr1 D22.F32
+#define dZi1 D23.F32
+#define dZr2 D24.F32
+#define dZi2 D25.F32
+#define dZr3 D26.F32
+#define dZi3 D27.F32
+
+#define qY0 Q6.F32
+#define qY1 Q7.F32
+#define qY2 Q8.F32
+#define qY3 Q9.F32
+#define qX0 Q2.F32
+#define qZ0 Q10.F32
+#define qZ1 Q11.F32
+#define qZ2 Q12.F32
+#define qZ3 Q13.F32
+
+ .MACRO FFTSTAGE scaled, inverse , name
+
+ @// Define stack arguments
+
+
+ @// Update grpCount and grpSize rightaway inorder to reuse
+ @// pGrpCount and pGrpSize regs
+
+ LSL grpCount,subFFTSize,#2
+ LSR subFFTNum,subFFTNum,#2
+ MOV subFFTSize,grpCount
+
+ VLD1 dW1,[pTwiddle] @//[wi | wr]
+ @// pT0+1 increments pT0 by 8 bytes
+ @// pT0+pointStep = increment of 8*pointStep bytes = 2*grpSize bytes
+ MOV pointStep,subFFTNum,LSL #1
+
+
+ @// pOut0+1 increments pOut0 by 8 bytes
+ @// pOut0+outPointStep == increment of 8*outPointStep bytes
+ @// = 2*size bytes
+
+ MOV stepTwiddle,#0
+ VLD1 dW2,[pTwiddle] @//[wi | wr]
+ SMULBB outPointStep,grpCount,pointStep
+ LSL pointStep,pointStep,#2 @// 2*grpSize
+
+ VLD1 dW3,[pTwiddle] @//[wi | wr]
+ MOV srcStep,pointStep,LSL #1 @// srcStep = 2*pointStep
+ ADD setStep,srcStep,pointStep @// setStep = 3*pointStep
+
+ RSB setStep,setStep,#0 @// setStep = - 3*pointStep
+ SUB srcStep,srcStep,#16 @// srcStep = 2*pointStep-16
+
+ MOV dstStep,outPointStep,LSL #1
+ ADD dstStep,dstStep,outPointStep @// dstStep = 3*outPointStep
+ @// dstStep = - 3*outPointStep+16
+ RSB dstStep,dstStep,#16
+
+
+
+radix4GrpLoop\name :
+
+ VLD2 {dXr0,dXi0},[pSrc],pointStep @// data[0]
+ ADD stepTwiddle,stepTwiddle,pointStep
+ VLD2 {dXr1,dXi1},[pSrc],pointStep @// data[1]
+ @// set pTwiddle to the first point
+ ADD pTwiddle,pTwiddle,stepTwiddle
+ VLD2 {dXr2,dXi2},[pSrc],pointStep @// data[2]
+ MOV twStep,stepTwiddle,LSL #2
+
+ @// data[3] & update pSrc for the next set
+ VLD2 {dXr3,dXi3},[pSrc],setStep
+ SUB twStep,stepTwiddle,twStep @// twStep = -3*stepTwiddle
+
+ MOV setCount,pointStep,LSR #3
+ @// set pSrc to data[0] of the next set
+ ADD pSrc,pSrc,#16
+ @// increment to data[1] of the next set
+ ADD pSrc,pSrc,pointStep
+
+
+ @// Loop on the sets
+
+radix4SetLoop\name :
+
+
+
+ SUBS setCount,setCount,#2
+
+ .ifeqs "\inverse", "TRUE"
+ VMUL dZr1,dXr1,dW1[0]
+ VMUL dZi1,dXi1,dW1[0]
+ VMUL dZr2,dXr2,dW2[0]
+ VMUL dZi2,dXi2,dW2[0]
+ VMUL dZr3,dXr3,dW3[0]
+ VMUL dZi3,dXi3,dW3[0]
+
+ VMLA dZr1,dXi1,dW1[1] @// real part
+ VMLS dZi1,dXr1,dW1[1] @// imag part
+
+ @// data[1] for next iteration
+ VLD2 {dXr1,dXi1},[pSrc],pointStep
+
+ VMLA dZr2,dXi2,dW2[1] @// real part
+ VMLS dZi2,dXr2,dW2[1] @// imag part
+
+ @// data[2] for next iteration
+ VLD2 {dXr2,dXi2},[pSrc],pointStep
+
+ VMLA dZr3,dXi3,dW3[1] @// real part
+ VMLS dZi3,dXr3,dW3[1] @// imag part
+ .else
+ VMUL dZr1,dXr1,dW1[0]
+ VMUL dZi1,dXi1,dW1[0]
+ VMUL dZr2,dXr2,dW2[0]
+ VMUL dZi2,dXi2,dW2[0]
+ VMUL dZr3,dXr3,dW3[0]
+ VMUL dZi3,dXi3,dW3[0]
+
+ VMLS dZr1,dXi1,dW1[1] @// real part
+ VMLA dZi1,dXr1,dW1[1] @// imag part
+
+ @// data[1] for next iteration
+ VLD2 {dXr1,dXi1},[pSrc],pointStep
+
+ VMLS dZr2,dXi2,dW2[1] @// real part
+ VMLA dZi2,dXr2,dW2[1] @// imag part
+
+ @// data[2] for next iteration
+ VLD2 {dXr2,dXi2},[pSrc],pointStep
+
+ VMLS dZr3,dXi3,dW3[1] @// real part
+ VMLA dZi3,dXr3,dW3[1] @// imag part
+ .endif
+
+ @// data[3] & update pSrc to data[0]
+ VLD2 {dXr3,dXi3},[pSrc],setStep
+
+ @// finish first stage of 4 point FFT
+ VADD qY0,qX0,qZ2
+ VSUB qY2,qX0,qZ2
+
+ @// data[0] for next iteration
+ VLD2 {dXr0,dXi0},[pSrc :128]!
+ VADD qY1,qZ1,qZ3
+ VSUB qY3,qZ1,qZ3
+
+ @// finish second stage of 4 point FFT
+
+ VSUB qZ0,qY2,qY1
+
+
+ .ifeqs "\inverse", "TRUE"
+
+ VADD dZr3,dYr0,dYi3
+ VST2 {dZr0,dZi0},[pDst :128],outPointStep
+ VSUB dZi3,dYi0,dYr3
+
+ VADD qZ2,qY2,qY1
+ VST2 {dZr3,dZi3},[pDst :128],outPointStep
+
+ VSUB dZr1,dYr0,dYi3
+ VST2 {dZr2,dZi2},[pDst :128],outPointStep
+ VADD dZi1,dYi0,dYr3
+
+ VST2 {dZr1,dZi1},[pDst :128],dstStep
+
+
+ .else
+
+ VSUB dZr1,dYr0,dYi3
+ VST2 {dZr0,dZi0},[pDst :128],outPointStep
+ VADD dZi1,dYi0,dYr3
+
+ VADD qZ2,qY2,qY1
+ VST2 {dZr1,dZi1},[pDst :128],outPointStep
+
+ VADD dZr3,dYr0,dYi3
+ VST2 {dZr2,dZi2},[pDst :128],outPointStep
+ VSUB dZi3,dYi0,dYr3
+
+ VST2 {dZr3,dZi3},[pDst :128],dstStep
+
+
+ .endif
+
+ @// increment to data[1] of the next set
+ ADD pSrc,pSrc,pointStep
+ BGT radix4SetLoop\name
+
+
+ VLD1 dW1,[pTwiddle :64],stepTwiddle @//[wi | wr]
+ @// subtract 4 since grpCount multiplied by 4
+ SUBS grpCount,grpCount,#4
+ VLD1 dW2,[pTwiddle :64],stepTwiddle @//[wi | wr]
+ @// increment pSrc for the next grp
+ ADD pSrc,pSrc,srcStep
+ VLD1 dW3,[pTwiddle :64],twStep @//[wi | wr]
+ BGT radix4GrpLoop\name
+
+
+ @// Reset and Swap pSrc and pDst for the next stage
+ MOV t1,pDst
+ @// pDst -= 2*size; pSrc -= 8*size bytes
+ SUB pDst,pSrc,outPointStep,LSL #2
+ SUB pSrc,t1,outPointStep
+
+
+ .endm
+
+
+ M_START armSP_FFTFwd_CToC_FC32_Radix4_OutOfPlace_unsafe,r4
+ FFTSTAGE "FALSE","FALSE",FWD
+ M_END
+
+
+ M_START armSP_FFTInv_CToC_FC32_Radix4_OutOfPlace_unsafe,r4
+ FFTSTAGE "FALSE","TRUE",INV
+ M_END
+
+
+ .end
diff --git a/dl/armSP_FFT_CToC_FC32_Radix8_fs_unsafe_s.S b/dl/armSP_FFT_CToC_FC32_Radix8_fs_unsafe_s.S
new file mode 100644
index 0000000..d6eb71b
--- /dev/null
+++ b/dl/armSP_FFT_CToC_FC32_Radix8_fs_unsafe_s.S
@@ -0,0 +1,418 @@
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@// This is a modification of armSP_FFT_CToC_FC32_Radix8_fs_unsafe_s.s
+@// to support float instead of SC32.
+@//
+
+@//
+@// Description:
+@// Compute a first stage Radix 8 FFT stage for a N point complex signal
+@//
+@//
+
+
+@// Include standard headers
+
+#include "omxtypes_s.h"
+#include "armCOMM_s.h"
+
+@// Import symbols required from other files
+@// (For example tables)
+
+
+@// Set debugging level
+@//DEBUG_ON SETL {TRUE}
+
+
+
+@// Guarding implementation by the processor name
+
+
+
+
+@// Guarding implementation by the processor name
+
+@//Input Registers
+
+#define pSrc r0
+#define pDst r2
+#define pTwiddle r1
+#define subFFTNum r6
+#define subFFTSize r7
+@// dest buffer for the next stage (not pSrc for first stage)
+#define pPingPongBuf r5
+
+
+@//Output Registers
+
+
+@//Local Scratch Registers
+
+#define grpSize r3
+@// Reuse grpSize as setCount
+#define setCount r3
+#define pointStep r4
+#define outPointStep r4
+#define setStep r8
+#define step1 r9
+#define step2 r10
+#define t0 r11
+
+
+@// Neon Registers
+
+#define dXr0 D0.F32
+#define dXi0 D1.F32
+#define dXr1 D2.F32
+#define dXi1 D3.F32
+#define dXr2 D4.F32
+#define dXi2 D5.F32
+#define dXr3 D6.F32
+#define dXi3 D7.F32
+#define dXr4 D8.F32
+#define dXi4 D9.F32
+#define dXr5 D10.F32
+#define dXi5 D11.F32
+#define dXr6 D12.F32
+#define dXi6 D13.F32
+#define dXr7 D14.F32
+#define dXi7 D15.F32
+#define qX0 Q0.F32
+#define qX1 Q1.F32
+#define qX2 Q2.F32
+#define qX3 Q3.F32
+#define qX4 Q4.F32
+#define qX5 Q5.F32
+#define qX6 Q6.F32
+#define qX7 Q7.F32
+
+#define dUr0 D16.F32
+#define dUi0 D17.F32
+#define dUr2 D18.F32
+#define dUi2 D19.F32
+#define dUr4 D20.F32
+#define dUi4 D21.F32
+#define dUr6 D22.F32
+#define dUi6 D23.F32
+#define dUr1 D24.F32
+#define dUi1 D25.F32
+#define dUr3 D26.F32
+#define dUi3 D27.F32
+#define dUr5 D28.F32
+#define dUi5 D29.F32
+@// reuse dXr7 and dXi7
+#define dUr7 D30.F32
+#define dUi7 D31.F32
+#define qU0 Q8.F32
+#define qU1 Q12.F32
+#define qU2 Q9.F32
+#define qU3 Q13.F32
+#define qU4 Q10.F32
+#define qU5 Q14.F32
+#define qU6 Q11.F32
+#define qU7 Q15.F32
+
+
+#define dVr0 D24.F32
+#define dVi0 D25.F32
+#define dVr2 D26.F32
+#define dVi2 D27.F32
+#define dVr4 D28.F32
+#define dVi4 D29.F32
+#define dVr6 D30.F32
+#define dVi6 D31.F32
+#define dVr1 D16.F32
+#define dVi1 D17.F32
+#define dVr3 D18.F32
+#define dVi3 D19.F32
+#define dVr5 D20.F32
+#define dVi5 D21.F32
+#define dVr7 D22.F32
+#define dVi7 D23.F32
+#define qV0 Q12.F32
+#define qV1 Q8.F32
+#define qV2 Q13.F32
+#define qV3 Q9.F32
+#define qV4 Q14.F32
+#define qV5 Q10.F32
+#define qV6 Q15.F32
+#define qV7 Q11.F32
+
+#define dYr0 D16.F32
+#define dYi0 D17.F32
+#define dYr2 D18.F32
+#define dYi2 D19.F32
+#define dYr4 D20.F32
+#define dYi4 D21.F32
+#define dYr6 D22.F32
+#define dYi6 D23.F32
+#define dYr1 D24.F32
+#define dYi1 D25.F32
+#define dYr3 D26.F32
+#define dYi3 D27.F32
+#define dYr5 D28.F32
+#define dYi5 D29.F32
+#define dYr7 D30.F32
+#define dYi7 D31.F32
+#define qY0 Q8.F32
+#define qY1 Q12.F32
+#define qY2 Q9.F32
+#define qY3 Q13.F32
+#define qY4 Q10.F32
+#define qY5 Q14.F32
+#define qY6 Q11.F32
+#define qY7 Q15.F32
+
+#define dT0 D14.F32
+#define dT1 D15.F32
+
+@// Define constants
+ @ sqrt(1/2)
+ONEBYSQRT2: .float 0.7071067811865476e0
+
+
+ .MACRO FFTSTAGE scaled, inverse, name
+
+ @// Define stack arguments
+
+ @// Update pSubFFTSize and pSubFFTNum regs
+ @// subFFTSize = 1 for the first stage
+ MOV subFFTSize,#8
+ LDR t0,=ONEBYSQRT2
+
+ @// Note: setCount = subFFTNum/8 (reuse the grpSize reg for setCount)
+ LSR grpSize,subFFTNum,#3
+ MOV subFFTNum,grpSize
+
+
+ @// pT0+1 increments pT0 by 8 bytes
+ @// pT0+pointStep = increment of 8*pointStep bytes = grpSize bytes
+ @// Note: outPointStep = pointStep for firststage
+
+ MOV pointStep,grpSize,LSL #3
+
+
+ @// Calculate the step of input data for the next set
+ @//MOV step1,pointStep,LSL #1 @// step1 = 2*pointStep
+ VLD2 {dXr0,dXi0},[pSrc :128],pointStep @// data[0]
+ MOV step1,grpSize,LSL #4
+
+ MOV step2,pointStep,LSL #3
+ VLD2 {dXr1,dXi1},[pSrc :128],pointStep @// data[1]
+ SUB step2,step2,pointStep @// step2 = 7*pointStep
+ @// setStep = - 7*pointStep+16
+ RSB setStep,step2,#16
+
+ VLD2 {dXr2,dXi2},[pSrc :128],pointStep @// data[2]
+ VLD2 {dXr3,dXi3},[pSrc :128],pointStep @// data[3]
+ VLD2 {dXr4,dXi4},[pSrc :128],pointStep @// data[4]
+ VLD2 {dXr5,dXi5},[pSrc :128],pointStep @// data[5]
+ VLD2 {dXr6,dXi6},[pSrc :128],pointStep @// data[6]
+ @// data[7] & update pSrc for the next set
+ @// setStep = -7*pointStep + 16
+ VLD2 {dXr7,dXi7},[pSrc :128],setStep
+ @// grp = 0 a special case since all the twiddle factors are 1
+ @// Loop on the sets
+
+radix8fsGrpZeroSetLoop\name :
+
+ @// Decrement setcount
+ SUBS setCount,setCount,#2
+
+
+ @// finish first stage of 8 point FFT
+
+ VADD qU0,qX0,qX4
+ VADD qU2,qX1,qX5
+ VADD qU4,qX2,qX6
+ VADD qU6,qX3,qX7
+
+ @// finish second stage of 8 point FFT
+
+ VADD qV0,qU0,qU4
+ VSUB qV2,qU0,qU4
+ VADD qV4,qU2,qU6
+ VSUB qV6,qU2,qU6
+
+ @// finish third stage of 8 point FFT
+
+ VADD qY0,qV0,qV4
+ VSUB qY4,qV0,qV4
+ VST2 {dYr0,dYi0},[pDst :128],step1 @// store y0
+
+ .ifeqs "\inverse", "TRUE"
+
+ VSUB dYr2,dVr2,dVi6
+ VADD dYi2,dVi2,dVr6
+
+ VADD dYr6,dVr2,dVi6
+ VST2 {dYr2,dYi2},[pDst :128],step1 @// store y2
+ VSUB dYi6,dVi2,dVr6
+
+ VSUB qU1,qX0,qX4
+ VST2 {dYr4,dYi4},[pDst :128],step1 @// store y4
+
+ VSUB qU3,qX1,qX5
+ VSUB qU5,qX2,qX6
+ VST2 {dYr6,dYi6},[pDst :128],step1 @// store y6
+
+ .ELSE
+
+ VADD dYr6,dVr2,dVi6
+ VSUB dYi6,dVi2,dVr6
+
+ VSUB dYr2,dVr2,dVi6
+ VST2 {dYr6,dYi6},[pDst :128],step1 @// store y2
+ VADD dYi2,dVi2,dVr6
+
+
+ VSUB qU1,qX0,qX4
+ VST2 {dYr4,dYi4},[pDst :128],step1 @// store y4
+ VSUB qU3,qX1,qX5
+ VSUB qU5,qX2,qX6
+ VST2 {dYr2,dYi2},[pDst :128],step1 @// store y6
+
+
+ .ENDIF
+
+ @// finish first stage of 8 point FFT
+
+ VSUB qU7,qX3,qX7
+ VLD1 dT0[0], [t0]
+
+ @// finish second stage of 8 point FFT
+
+ VSUB dVr1,dUr1,dUi5
+ @// data[0] for next iteration
+ VLD2 {dXr0,dXi0},[pSrc :128],pointStep
+ VADD dVi1,dUi1,dUr5
+ VADD dVr3,dUr1,dUi5
+ VLD2 {dXr1,dXi1},[pSrc :128],pointStep @// data[1]
+ VSUB dVi3,dUi1,dUr5
+
+ VSUB dVr5,dUr3,dUi7
+ VLD2 {dXr2,dXi2},[pSrc :128],pointStep @// data[2]
+ VADD dVi5,dUi3,dUr7
+ VADD dVr7,dUr3,dUi7
+ VLD2 {dXr3,dXi3},[pSrc :128],pointStep @// data[3]
+ VSUB dVi7,dUi3,dUr7
+
+ @// finish third stage of 8 point FFT
+
+ .ifeqs "\inverse", "TRUE"
+
+ @// calculate a*v5
+ VMUL dT1,dVr5,dT0[0] @// use dVi0 for dT1
+
+ VLD2 {dXr4,dXi4},[pSrc :128],pointStep @// data[4]
+ VMUL dVi5,dVi5,dT0[0]
+
+ VLD2 {dXr5,dXi5},[pSrc :128],pointStep @// data[5]
+ VSUB dVr5,dT1,dVi5 @// a * V5
+ VADD dVi5,dT1,dVi5
+
+ VLD2 {dXr6,dXi6},[pSrc :128],pointStep @// data[6]
+
+ @// calculate b*v7
+ VMUL dT1,dVr7,dT0[0]
+ VMUL dVi7,dVi7,dT0[0]
+
+ VADD qY1,qV1,qV5
+ VSUB qY5,qV1,qV5
+
+
+ VADD dVr7,dT1,dVi7 @// b * V7
+ VSUB dVi7,dVi7,dT1
+ SUB pDst, pDst, step2 @// set pDst to y1
+
+ VLD2 {dXr7,dXi7},[pSrc :128],setStep @// data[7]
+
+
+ VSUB dYr3,dVr3,dVr7
+ VSUB dYi3,dVi3,dVi7
+ VST2 {dYr1,dYi1},[pDst :128],step1 @// store y1
+ VADD dYr7,dVr3,dVr7
+ VADD dYi7,dVi3,dVi7
+
+
+ VST2 {dYr3,dYi3},[pDst :128],step1 @// store y3
+ VST2 {dYr5,dYi5},[pDst :128],step1 @// store y5
+ VST2 {dYr7,dYi7},[pDst :128] @// store y7
+ ADD pDst, pDst, #16
+
+ .ELSE
+
+ @// calculate b*v7
+ VMUL dT1,dVr7,dT0[0]
+ VLD2 {dXr4,dXi4},[pSrc :128],pointStep @// data[4]
+ VMUL dVi7,dVi7,dT0[0]
+
+ VLD2 {dXr5,dXi5},[pSrc :128],pointStep @// data[5]
+ VADD dVr7,dT1,dVi7 @// b * V7
+ VSUB dVi7,dVi7,dT1
+
+ VLD2 {dXr6,dXi6},[pSrc :128],pointStep @// data[6]
+
+ @// calculate a*v5
+ VMUL dT1,dVr5,dT0[0] @// use dVi0 for dT1
+ VMUL dVi5,dVi5,dT0[0]
+
+ VADD dYr7,dVr3,dVr7
+ VADD dYi7,dVi3,dVi7
+ SUB pDst, pDst, step2 @// set pDst to y1
+
+ VSUB dVr5,dT1,dVi5 @// a * V5
+ VADD dVi5,dT1,dVi5
+ VLD2 {dXr7,dXi7},[pSrc :128],setStep @// data[7]
+
+ VSUB qY5,qV1,qV5
+
+ VSUB dYr3,dVr3,dVr7
+ VST2 {dYr7,dYi7},[pDst :128],step1 @// store y1
+ VSUB dYi3,dVi3,dVi7
+ VADD qY1,qV1,qV5
+
+
+ VST2 {dYr5,dYi5},[pDst :128],step1 @// store y3
+ VST2 {dYr3,dYi3},[pDst :128],step1 @// store y5
+ VST2 {dYr1,dYi1},[pDst :128]! @// store y7
+
+ .ENDIF
+
+
+ @// update pDst for the next set
+ SUB pDst, pDst, step2
+ BGT radix8fsGrpZeroSetLoop\name
+
+
+ @// reset pSrc to pDst for the next stage
+ SUB pSrc,pDst,pointStep @// pDst -= 2*grpSize
+ MOV pDst,pPingPongBuf
+
+
+
+ .endm
+
+
+ @// Allocate stack memory required by the function
+
+
+ M_START armSP_FFTFwd_CToC_FC32_Radix8_fs_OutOfPlace_unsafe,r4
+ FFTSTAGE "FALSE","FALSE",FWD
+ M_END
+
+
+ M_START armSP_FFTInv_CToC_FC32_Radix8_fs_OutOfPlace_unsafe,r4
+ FFTSTAGE "FALSE","TRUE",INV
+ M_END
+
+
+
+ .end
diff --git a/dl/armSP_FFT_CToC_SC32_Radix2_fs_unsafe_s.S b/dl/armSP_FFT_CToC_SC32_Radix2_fs_unsafe_s.S
new file mode 100644
index 0000000..fa3df3d
--- /dev/null
+++ b/dl/armSP_FFT_CToC_SC32_Radix2_fs_unsafe_s.S
@@ -0,0 +1,163 @@
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@// This file was originally licensed as follows. It has been
+@// relicensed with permission from the copyright holders.
+
+@//
+@//
+@// File Name: armSP_FFT_CToC_SC32_Radix2_fs_unsafe_s.s
+@// OpenMAX DL: v1.0.2
+@// Last Modified Revision: 5995
+@// Last Modified Date: Fri, 08 Jun 2007
+@//
+@// (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+@//
+@//
+@//
+@// Description:
+@// Compute the first stage of a Radix 2 DIT in-order out-of-place FFT
+@// stage for a N point complex signal.
+@//
+
+
+@// Include standard headers
+
+#include "omxtypes_s.h"
+#include "armCOMM_s.h"
+
+
+@// Import symbols required from other files
+@// (For example tables)
+
+
+
+
+@// Set debugging level
+@//DEBUG_ON SETL {TRUE}
+
+
+
+@// Guarding implementation by the processor name
+
+
+
+@// Guarding implementation by the processor name
+
+
+@//Input Registers
+
+#define pSrc r0
+#define pDst r2
+#define pTwiddle r1
+#define pPingPongBuf r5
+#define subFFTNum r6
+#define subFFTSize r7
+
+
+@//Output Registers
+
+
+@//Local Scratch Registers
+
+#define pointStep r3
+#define outPointStep r3
+#define grpSize r4
+#define setCount r4
+#define step r8
+#define dstStep r8
+
+@// Neon Registers
+
+#define dX0 D0.S32
+#define dX1 D1.S32
+#define dY0 D2.S32
+#define dY1 D3.S32
+
+
+ .MACRO FFTSTAGE scaled, inverse, name
+
+ @// Define stack arguments
+
+
+ @// update subFFTSize and subFFTNum into RN6 and RN7 for the next stage
+
+
+ MOV subFFTSize,#2
+ LSR grpSize,subFFTNum,#1
+ MOV subFFTNum,grpSize
+
+
+ @// pT0+1 increments pT0 by 8 bytes
+ @// pT0+pointStep = increment of 8*pointStep bytes = 4*grpSize bytes
+ @// Note: outPointStep = pointStep for firststage
+ @// Note: setCount = grpSize/2 (reuse the updated grpSize for setCount)
+
+ MOV pointStep,grpSize,LSL #3
+ RSB step,pointStep,#8
+
+
+ @// Loop on the sets for grp zero
+
+grpZeroSetLoop\name :
+
+ VLD1 dX0,[pSrc],pointStep
+ VLD1 dX1,[pSrc],step @// step = -pointStep + 8
+ SUBS setCount,setCount,#1 @// decrement the loop counter
+
+ .ifeqs "\scaled", "TRUE"
+
+ VHADD dY0,dX0,dX1
+ VHSUB dY1,dX0,dX1
+
+ .ELSE
+
+ VADD dY0,dX0,dX1
+ VSUB dY1,dX0,dX1
+
+
+ .ENDIF
+
+ VST1 dY0,[pDst],outPointStep
+ VST1 dY1,[pDst],dstStep @// dstStep = step = -pointStep + 8
+
+ BGT grpZeroSetLoop\name
+
+
+ @// reset pSrc to pDst for the next stage
+ SUB pSrc,pDst,pointStep @// pDst -= 2*grpSize
+ MOV pDst,pPingPongBuf
+
+ .endm
+
+
+
+ M_START armSP_FFTFwd_CToC_SC32_Radix2_fs_OutOfPlace_unsafe,r4
+ FFTSTAGE "FALSE","FALSE",fwd
+ M_END
+
+
+
+ M_START armSP_FFTInv_CToC_SC32_Radix2_fs_OutOfPlace_unsafe,r4
+ FFTSTAGE "FALSE","TRUE",inv
+ M_END
+
+
+
+ M_START armSP_FFTFwd_CToC_SC32_Sfs_Radix2_fs_OutOfPlace_unsafe,r4
+ FFTSTAGE "TRUE","FALSE",fwdsfs
+ M_END
+
+
+
+ M_START armSP_FFTInv_CToC_SC32_Sfs_Radix2_fs_OutOfPlace_unsafe,r4
+ FFTSTAGE "TRUE","TRUE",invsfs
+ M_END
+
+ .end
diff --git a/dl/armSP_FFT_CToC_SC32_Radix2_ls_unsafe_s.S b/dl/armSP_FFT_CToC_SC32_Radix2_ls_unsafe_s.S
new file mode 100644
index 0000000..568587a
--- /dev/null
+++ b/dl/armSP_FFT_CToC_SC32_Radix2_ls_unsafe_s.S
@@ -0,0 +1,184 @@
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@// This file was originally licensed as follows. It has been
+@// relicensed with permission from the copyright holders.
+@//
+
+@//
+@// File Name: armSP_FFT_CToC_SC32_Radix2_ls_unsafe_s.s
+@// OpenMAX DL: v1.0.2
+@// Last Modified Revision: 7493
+@// Last Modified Date: Mon, 24 Sep 2007
+@//
+@// (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+@//
+@//
+@//
+@// Description:
+@// Compute the last stage of a Radix 2 DIT in-order out-of-place FFT
+@// stage for a N point complex signal.
+@//
+
+
+
+@// Include standard headers
+
+#include "omxtypes_s.h"
+#include "armCOMM_s.h"
+
+
+@// Import symbols required from other files
+@// (For example tables)
+
+
+
+
+@// Set debugging level
+@//DEBUG_ON SETL {TRUE}
+
+
+@// Guarding implementation by the processor name
+
+
+@//Input Registers
+
+#define pSrc r0
+#define pDst r2
+#define pTwiddle r1
+#define subFFTNum r6
+#define subFFTSize r7
+
+
+@//Output Registers
+
+
+@//Local Scratch Registers
+
+
+#define outPointStep r3
+#define grpCount r4
+#define dstStep r5
+#define pTmp r4
+
+@// Neon Registers
+
+#define dWr D0.S32
+#define dWi d1.s32
+#define dXr0 d2.s32
+#define dXi0 d3.s32
+#define dXr1 d4.s32
+#define dXi1 d5.s32
+#define dYr0 d6.s32
+#define dYi0 d7.s32
+#define dYr1 d8.s32
+#define dYi1 d9.s32
+#define qT0 q5.s64
+#define qT1 q6.s64
+
+ .macro FFTSTAGE scaled, inverse, name
+
+
+ MOV outPointStep,subFFTSize,LSL #3
+ @// Update grpCount and grpSize rightaway
+
+ MOV subFFTNum,#1 @//after the last stage
+ LSL grpCount,subFFTSize,#1
+
+ @// update subFFTSize for the next stage
+ MOV subFFTSize,grpCount
+
+ RSB dstStep,outPointStep,#16
+
+
+ @// Loop on 2 grps at a time for the last stage
+
+grpLoop\name :
+ VLD2 {dWr,dWi},[pTwiddle :64]!
+
+ VLD4 {dXr0,dXi0,dXr1,dXi1},[pSrc :128]!
+ SUBS grpCount,grpCount,#4 @// grpCount is multiplied by 2
+
+ .ifeqs "\inverse", "TRUE"
+ VMULL qT0,dWr,dXr1
+ VMLAL qT0,dWi,dXi1 @// real part
+ VMULL qT1,dWr,dXi1
+ VMLSL qT1,dWi,dXr1 @// imag part
+
+ .else
+
+ VMULL qT0,dWr,dXr1
+ VMLSL qT0,dWi,dXi1 @// real part
+ VMULL qT1,dWr,dXi1
+ VMLAL qT1,dWi,dXr1 @// imag part
+
+ .endif
+
+ VRSHRN dXr1,qT0,#31
+ VRSHRN dXi1,qT1,#31
+
+
+ .ifeqs "\scaled", "TRUE"
+
+ VHSUB dYr0,dXr0,dXr1
+ VHSUB dYi0,dXi0,dXi1
+ VHADD dYr1,dXr0,dXr1
+ VHADD dYi1,dXi0,dXi1
+
+ .else
+
+ VSUB dYr0,dXr0,dXr1
+ VSUB dYi0,dXi0,dXi1
+ VADD dYr1,dXr0,dXr1
+ VADD dYi1,dXi0,dXi1
+
+
+ .endif
+
+ VST2 {dYr0,dYi0},[pDst],outPointStep
+ VST2 {dYr1,dYi1},[pDst],dstStep @// dstStep = step = -outPointStep + 16
+
+ bgt grpLoop\name
+
+
+ @// Reset and Swap pSrc and pDst for the next stage
+ MOV pTmp,pDst
+ SUB pDst,pSrc,outPointStep,LSL #1 @// pDst -= 4*size; pSrc -= 8*size bytes
+ SUB pSrc,pTmp,outPointStep
+
+ @// Reset pTwiddle for the next stage
+ SUB pTwiddle,pTwiddle,outPointStep @// pTwiddle -= 4*size bytes
+
+ .endm
+
+
+
+ M_START armSP_FFTFwd_CToC_SC32_Radix2_ls_OutOfPlace_unsafe,r4,""
+ FFTSTAGE "FALSE","FALSE",fwd
+ M_END
+
+
+
+ M_START armSP_FFTInv_CToC_SC32_Radix2_ls_OutOfPlace_unsafe,r4
+ FFTSTAGE "FALSE","TRUE",inv
+ M_END
+
+
+
+ M_START armSP_FFTFwd_CToC_SC32_Sfs_Radix2_ls_OutOfPlace_unsafe,r4
+ FFTSTAGE "TRUE","FALSE",fwdsfs
+ M_END
+
+
+
+ M_START armSP_FFTInv_CToC_SC32_Sfs_Radix2_ls_OutOfPlace_unsafe,r4
+ FFTSTAGE "TRUE","TRUE",invsfs
+ M_END
+
+ .end
diff --git a/dl/armSP_FFT_CToC_SC32_Radix2_unsafe_s.S b/dl/armSP_FFT_CToC_SC32_Radix2_unsafe_s.S
new file mode 100644
index 0000000..d103df1
--- /dev/null
+++ b/dl/armSP_FFT_CToC_SC32_Radix2_unsafe_s.S
@@ -0,0 +1,216 @@
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@// This file was originally licensed as follows. It has been
+@// relicensed with permission from the copyright holders.
+@//
+
+@//
+@// File Name: armSP_FFT_CToC_SC32_Radix2_unsafe_s.s
+@// OpenMAX DL: v1.0.2
+@// Last Modified Revision: 5638
+@// Last Modified Date: Wed, 06 Jun 2007
+@//
+@// (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+@//
+@//
+@//
+@// Description:
+@// Compute a Radix 2 DIT in-order out-of-place FFT stage for a N point complex signal.
+@// This handle the general stage, not the first or last stage.
+@//
+
+
+@// Include standard headers
+
+#include "omxtypes_s.h"
+#include "armCOMM_s.h"
+
+
+@// Import symbols required from other files
+@// (For example tables)
+
+
+
+@// Set debugging level
+@//DEBUG_ON SETL {TRUE}
+
+
+
+@// Guarding implementation by the processor name
+
+
+
+
+@// Guarding implementation by the processor name
+
+
+@//Input Registers
+
+#define pSrc r0
+#define pDst r2
+#define pTwiddle r1
+#define subFFTNum r6
+#define subFFTSize r7
+
+
+@//Output Registers
+
+
+@//Local Scratch Registers
+
+#define outPointStep r3
+#define pointStep r4
+#define grpCount r5
+#define setCount r8
+@//const RN 9
+#define step r10
+#define dstStep r11
+#define pTable r9
+#define pTmp r9
+
+@// Neon Registers
+
+#define dW D0.S32
+#define dX0 D2.S32
+#define dX1 D3.S32
+#define dX2 D4.S32
+#define dX3 D5.S32
+#define dY0 D6.S32
+#define dY1 D7.S32
+#define dY2 D8.S32
+#define dY3 D9.S32
+#define qT0 Q3.S64
+#define qT1 Q4.S64
+
+
+
+ .MACRO FFTSTAGE scaled, inverse, name
+
+ @// Define stack arguments
+
+
+ @// Update grpCount and grpSize rightaway inorder to reuse pGrpCount and pGrpSize regs
+
+ LSR subFFTNum,subFFTNum,#1 @//grpSize
+ LSL grpCount,subFFTSize,#1
+
+
+ @// pT0+1 increments pT0 by 8 bytes
+ @// pT0+pointStep = increment of 8*pointStep bytes = 4*grpSize bytes
+ MOV pointStep,subFFTNum,LSL #2
+
+ @// update subFFTSize for the next stage
+ MOV subFFTSize,grpCount
+
+ @// pOut0+1 increments pOut0 by 8 bytes
+ @// pOut0+outPointStep == increment of 8*outPointStep bytes = 4*size bytes
+ SMULBB outPointStep,grpCount,pointStep
+ LSL pointStep,pointStep,#1
+
+
+ RSB step,pointStep,#16
+ RSB dstStep,outPointStep,#16
+
+ @// Loop on the groups
+
+grpLoop\name :
+ MOV setCount,pointStep,LSR #3
+ VLD1 dW,[pTwiddle],pointStep @//[wi | wr]
+
+
+ @// Loop on the sets
+
+
+setLoop\name :
+
+
+ VLD2 {dX0,dX1},[pSrc],pointStep @// point0: dX0-real part dX1-img part
+ VLD2 {dX2,dX3},[pSrc],step @// point1: dX2-real part dX3-img part
+
+ SUBS setCount,setCount,#2
+
+ .ifeqs "\inverse", "TRUE"
+ VMULL qT0,dX2,dW[0]
+ VMLAL qT0,dX3,dW[1] @// real part
+ VMULL qT1,dX3,dW[0]
+ VMLSL qT1,dX2,dW[1] @// imag part
+
+ .else
+
+ VMULL qT0,dX2,dW[0]
+ VMLSL qT0,dX3,dW[1] @// real part
+ VMULL qT1,dX3,dW[0]
+ VMLAL qT1,dX2,dW[1] @// imag part
+
+ .endif
+
+ VRSHRN dX2,qT0,#31
+ VRSHRN dX3,qT1,#31
+
+ .ifeqs "\scaled", "TRUE"
+ VHSUB dY0,dX0,dX2
+ VHSUB dY1,dX1,dX3
+ VHADD dY2,dX0,dX2
+ VHADD dY3,dX1,dX3
+
+ .else
+ VSUB dY0,dX0,dX2
+ VSUB dY1,dX1,dX3
+ VADD dY2,dX0,dX2
+ VADD dY3,dX1,dX3
+
+ .endif
+
+ VST2 {dY0,dY1},[pDst],outPointStep
+ VST2 {dY2,dY3},[pDst],dstStep @// dstStep = -outPointStep + 16
+
+ BGT setLoop\name
+
+ SUBS grpCount,grpCount,#2
+ ADD pSrc,pSrc,pointStep
+ BGT grpLoop\name
+
+
+ @// Reset and Swap pSrc and pDst for the next stage
+ MOV pTmp,pDst
+ SUB pDst,pSrc,outPointStep,LSL #1 @// pDst -= 4*size; pSrc -= 8*size bytes
+ SUB pSrc,pTmp,outPointStep
+
+ @// Reset pTwiddle for the next stage
+ SUB pTwiddle,pTwiddle,outPointStep @// pTwiddle -= 4*size bytes
+
+
+ .endm
+
+
+
+ M_START armSP_FFTFwd_CToC_SC32_Radix2_OutOfPlace_unsafe,r4
+ FFTSTAGE "FALSE","FALSE",FWD
+ M_END
+
+
+
+ M_START armSP_FFTInv_CToC_SC32_Radix2_OutOfPlace_unsafe,r4
+ FFTSTAGE "FALSE","TRUE",INV
+ M_END
+
+
+
+ M_START armSP_FFTFwd_CToC_SC32_Sfs_Radix2_OutOfPlace_unsafe,r4
+ FFTSTAGE "TRUE","FALSE",FWDSFS
+ M_END
+
+
+
+ M_START armSP_FFTInv_CToC_SC32_Sfs_Radix2_OutOfPlace_unsafe,r4
+ FFTSTAGE "TRUE","TRUE",INVSFS
+ M_END
+
+ .end
diff --git a/dl/armSP_FFT_CToC_SC32_Radix4_fs_unsafe_s.S b/dl/armSP_FFT_CToC_SC32_Radix4_fs_unsafe_s.S
new file mode 100644
index 0000000..2d82124
--- /dev/null
+++ b/dl/armSP_FFT_CToC_SC32_Radix4_fs_unsafe_s.S
@@ -0,0 +1,320 @@
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@// This file was originally licensed as follows. It has been
+@// relicensed with permission from the copyright holders.
+@//
+
+@//
+@// File Name: armSP_FFT_CToC_SC32_Radix4_fs_unsafe_s.s
+@// OpenMAX DL: v1.0.2
+@// Last Modified Revision: 7767
+@// Last Modified Date: Thu, 27 Sep 2007
+@//
+@// (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+@//
+@//
+@//
+@// Description:
+@// Compute a first stage Radix 4 FFT stage for a N point complex signal
+@//
+
+
+
+@// Include standard headers
+
+#include "omxtypes_s.h"
+#include "armCOMM_s.h"
+
+@// Import symbols required from other files
+@// (For example tables)
+
+
+
+
+@// Set debugging level
+@//DEBUG_ON SETL {TRUE}
+
+
+
+@// Guarding implementation by the processor name
+
+
+
+@// Guarding implementation by the processor name
+
+
+@//Input Registers
+
+#define pSrc r0
+#define pDst r2
+#define pTwiddle r1
+#define pPingPongBuf r5
+#define subFFTNum r6
+#define subFFTSize r7
+
+
+@//Output Registers
+
+
+@//Local Scratch Registers
+
+#define grpSize r3
+@// Reuse grpSize as setCount
+#define setCount r3
+#define pointStep r4
+#define outPointStep r4
+#define setStep r8
+#define step1 r9
+#define step3 r10
+
+@// Neon Registers
+
+#define dXr0 D0.S32
+#define dXi0 D1.S32
+#define dXr1 D2.S32
+#define dXi1 D3.S32
+#define dXr2 D4.S32
+#define dXi2 D5.S32
+#define dXr3 D6.S32
+#define dXi3 D7.S32
+#define dYr0 D8.S32
+#define dYi0 D9.S32
+#define dYr1 D10.S32
+#define dYi1 D11.S32
+#define dYr2 D12.S32
+#define dYi2 D13.S32
+#define dYr3 D14.S32
+#define dYi3 D15.S32
+#define qX0 Q0.S32
+#define qX1 Q1.S32
+#define qX2 Q2.S32
+#define qX3 Q3.S32
+#define qY0 Q4.S32
+#define qY1 Q5.S32
+#define qY2 Q6.S32
+#define qY3 Q7.S32
+#define dZr0 D16.S32
+#define dZi0 D17.S32
+#define dZr1 D18.S32
+#define dZi1 D19.S32
+#define dZr2 D20.S32
+#define dZi2 D21.S32
+#define dZr3 D22.S32
+#define dZi3 D23.S32
+#define qZ0 Q8.S32
+#define qZ1 Q9.S32
+#define qZ2 Q10.S32
+#define qZ3 Q11.S32
+
+
+ .MACRO FFTSTAGE scaled, inverse, name
+
+ @// Define stack arguments
+
+ @// pT0+1 increments pT0 by 8 bytes
+ @// pT0+pointStep = increment of 8*pointStep bytes = 2*grpSize bytes
+ @// Note: outPointStep = pointStep for firststage
+
+ MOV pointStep,subFFTNum,LSL #1
+
+
+ @// Update pSubFFTSize and pSubFFTNum regs
+ VLD2 {dXr0,dXi0},[pSrc :128],pointStep @// data[0]
+ MOV subFFTSize,#4 @// subFFTSize = 1 for the first stage
+
+ @// Note: setCount = subFFTNum/4 (reuse the grpSize reg for setCount)
+ LSR grpSize,subFFTNum,#2
+ VLD2 {dXr1,dXi1},[pSrc :128],pointStep @// data[1]
+ MOV subFFTNum,grpSize
+
+
+ @// Calculate the step of input data for the next set
+ @//MOV setStep,pointStep,LSL #1
+ MOV setStep,grpSize,LSL #4
+ VLD2 {dXr2,dXi2},[pSrc :128],pointStep @// data[2]
+ ADD setStep,setStep,pointStep @// setStep = 3*pointStep
+ RSB setStep,setStep,#16 @// setStep = - 3*pointStep+16
+
+ VLD2 {dXr3,dXi3},[pSrc :128],setStep @// data[3] & update pSrc for the next set
+ MOV step1,pointStep,LSL #1 @// step1 = 2*pointStep
+
+ .ifeqs "\scaled", "TRUE"
+ VHADD qY0,qX0,qX2
+ .else
+ VADD qY0,qX0,qX2
+ .endif
+
+ RSB step3,pointStep,#0 @// step3 = -pointStep
+
+ @// grp = 0 a special case since all the twiddle factors are 1
+ @// Loop on the sets : 2 sets at a time
+
+grpZeroSetLoop\name :
+
+
+
+ @// Decrement setcount
+ SUBS setCount,setCount,#2 @// decrement the set loop counter
+
+ .ifeqs "\scaled", "TRUE"
+
+ @// finish first stage of 4 point FFT
+
+ VHSUB qY2,qX0,qX2
+
+ VLD2 {dXr0,dXi0},[pSrc :128],step1 @// data[0]
+ VHADD qY1,qX1,qX3
+ VLD2 {dXr2,dXi2},[pSrc :128],step3 @// data[2]
+ VHSUB qY3,qX1,qX3
+
+
+ @// finish second stage of 4 point FFT
+
+ .ifeqs "\inverse", "TRUE"
+
+ VLD2 {dXr1,dXi1},[pSrc :128],step1 @// data[1]
+ VHADD qZ0,qY0,qY1
+
+ VLD2 {dXr3,dXi3},[pSrc :128],setStep @// data[3] & update pSrc for the next set
+ VHSUB dZr3,dYr2,dYi3
+
+ VST2 {dZr0,dZi0},[pDst :128],outPointStep
+ VHADD dZi3,dYi2,dYr3
+
+ VHSUB qZ1,qY0,qY1
+ VST2 {dZr3,dZi3},[pDst :128],outPointStep
+
+ VHADD dZr2,dYr2,dYi3
+ VST2 {dZr1,dZi1},[pDst :128],outPointStep
+ VHSUB dZi2,dYi2,dYr3
+
+ VHADD qY0,qX0,qX2 @// u0 for next iteration
+ VST2 {dZr2,dZi2},[pDst :128],setStep
+
+
+ .else
+
+ VLD2 {dXr1,dXi1},[pSrc :128],step1 @// data[1]
+ VHADD qZ0,qY0,qY1
+
+ VLD2 {dXr3,dXi3},[pSrc :128],setStep @// data[3] & update pSrc for the next set
+ VHADD dZr2,dYr2,dYi3
+
+ VST2 {dZr0,dZi0},[pDst :128],outPointStep
+ VHSUB dZi2,dYi2,dYr3
+
+ VHSUB qZ1,qY0,qY1
+ VST2 {dZr2,dZi2},[pDst :128],outPointStep
+
+ VHSUB dZr3,dYr2,dYi3
+ VST2 {dZr1,dZi1},[pDst :128],outPointStep
+ VHADD dZi3,dYi2,dYr3
+
+ VHADD qY0,qX0,qX2 @// u0 for next iteration
+ VST2 {dZr3,dZi3},[pDst :128],setStep
+
+ .endif
+
+
+
+ .else
+
+ @// finish first stage of 4 point FFT
+
+
+ VSUB qY2,qX0,qX2
+
+ VLD2 {dXr0,dXi0},[pSrc :128],step1 @// data[0]
+ VADD qY1,qX1,qX3
+ VLD2 {dXr2,dXi2},[pSrc :128],step3 @// data[2]
+ VSUB qY3,qX1,qX3
+
+
+ @// finish second stage of 4 point FFT
+
+ .ifeqs "\inverse", "TRUE"
+
+ VLD2 {dXr1,dXi1},[pSrc :128],step1 @// data[1]
+ VADD qZ0,qY0,qY1
+
+ VLD2 {dXr3,dXi3},[pSrc :128],setStep @// data[3] & update pSrc for the next set
+ VSUB dZr3,dYr2,dYi3
+
+ VST2 {dZr0,dZi0},[pDst :128],outPointStep
+ VADD dZi3,dYi2,dYr3
+
+ VSUB qZ1,qY0,qY1
+ VST2 {dZr3,dZi3},[pDst :128],outPointStep
+
+ VADD dZr2,dYr2,dYi3
+ VST2 {dZr1,dZi1},[pDst :128],outPointStep
+ VSUB dZi2,dYi2,dYr3
+
+ VADD qY0,qX0,qX2 @// u0 for next iteration
+ VST2 {dZr2,dZi2},[pDst :128],setStep
+
+
+ .else
+
+ VLD2 {dXr1,dXi1},[pSrc :128],step1 @// data[1]
+ VADD qZ0,qY0,qY1
+
+ VLD2 {dXr3,dXi3},[pSrc :128],setStep @// data[3] & update pSrc for the next set
+ VADD dZr2,dYr2,dYi3
+
+ VST2 {dZr0,dZi0},[pDst :128],outPointStep
+ VSUB dZi2,dYi2,dYr3
+
+ VSUB qZ1,qY0,qY1
+ VST2 {dZr2,dZi2},[pDst :128],outPointStep
+
+ VSUB dZr3,dYr2,dYi3
+ VST2 {dZr1,dZi1},[pDst :128],outPointStep
+ VADD dZi3,dYi2,dYr3
+
+ VADD qY0,qX0,qX2 @// u0 for next iteration
+ VST2 {dZr3,dZi3},[pDst :128],setStep
+
+ .endif
+
+ .endif
+
+ BGT grpZeroSetLoop\name
+
+ @// reset pSrc to pDst for the next stage
+ SUB pSrc,pDst,pointStep @// pDst -= 2*grpSize
+ MOV pDst,pPingPongBuf
+
+
+ .endm
+
+
+
+ M_START armSP_FFTFwd_CToC_SC32_Radix4_fs_OutOfPlace_unsafe,r4
+ FFTSTAGE "FALSE","FALSE",fwd
+ M_END
+
+
+
+ M_START armSP_FFTInv_CToC_SC32_Radix4_fs_OutOfPlace_unsafe,r4
+ FFTSTAGE "FALSE","TRUE",inv
+ M_END
+
+
+ M_START armSP_FFTFwd_CToC_SC32_Sfs_Radix4_fs_OutOfPlace_unsafe,r4
+ FFTSTAGE "TRUE","FALSE",fwdsfs
+ M_END
+
+
+ M_START armSP_FFTInv_CToC_SC32_Sfs_Radix4_fs_OutOfPlace_unsafe,r4
+ FFTSTAGE "TRUE","TRUE",invsfs
+ M_END
+
+ .end
diff --git a/dl/armSP_FFT_CToC_SC32_Radix4_ls_unsafe_s.S b/dl/armSP_FFT_CToC_SC32_Radix4_ls_unsafe_s.S
new file mode 100644
index 0000000..101a65e
--- /dev/null
+++ b/dl/armSP_FFT_CToC_SC32_Radix4_ls_unsafe_s.S
@@ -0,0 +1,404 @@
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@// This file was originally licensed as follows. It has been
+@// relicensed with permission from the copyright holders.
+@//
+
+@//
+@// File Name: armSP_FFT_CToC_SC32_Radix4_ls_unsafe_s.s
+@// OpenMAX DL: v1.0.2
+@// Last Modified Revision: 7767
+@// Last Modified Date: Thu, 27 Sep 2007
+@//
+@// (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+@//
+@//
+@//
+@// Description:
+@// Compute a Radix 4 FFT stage for a N point complex signal
+@//
+
+
+@// Include standard headers
+
+#include "omxtypes_s.h"
+#include "armCOMM_s.h"
+
+@// Import symbols required from other files
+@// (For example tables)
+
+
+
+
+@// Set debugging level
+@//DEBUG_ON SETL {TRUE}
+
+
+@// Guarding implementation by the processor name
+
+
+@// Import symbols required from other files
+@// (For example tables)
+ @//IMPORT armAAC_constTable
+
+@//Input Registers
+
+#define pSrc r0
+#define pDst r2
+#define pTwiddle r1
+#define subFFTNum r6
+#define subFFTSize r7
+
+
+
+@//Output Registers
+
+
+@//Local Scratch Registers
+
+#define outPointStep r3
+#define grpCount r4
+#define dstStep r5
+#define grpTwStep r8
+#define stepTwiddle r9
+#define twStep r10
+#define pTmp r4
+#define step16 r11
+#define step24 r12
+
+
+@// Neon Registers
+
+#define dButterfly1Real02 D0.S32
+#define dButterfly1Imag02 D1.S32
+#define dButterfly1Real13 D2.S32
+#define dButterfly1Imag13 D3.S32
+#define dButterfly2Real02 D4.S32
+#define dButterfly2Imag02 D5.S32
+#define dButterfly2Real13 D6.S32
+#define dButterfly2Imag13 D7.S32
+#define dXr0 D0.S32
+#define dXi0 D1.S32
+#define dXr1 D2.S32
+#define dXi1 D3.S32
+#define dXr2 D4.S32
+#define dXi2 D5.S32
+#define dXr3 D6.S32
+#define dXi3 D7.S32
+
+#define dYr0 D16.S32
+#define dYi0 D17.S32
+#define dYr1 D18.S32
+#define dYi1 D19.S32
+#define dYr2 D20.S32
+#define dYi2 D21.S32
+#define dYr3 D22.S32
+#define dYi3 D23.S32
+
+#define dW1r D8.S32
+#define dW1i D9.S32
+#define dW2r D10.S32
+#define dW2i D11.S32
+#define dW3r D12.S32
+#define dW3i D13.S32
+#define qT0 Q7.S64
+#define qT1 Q8.S64
+#define qT2 Q9.S64
+#define qT3 Q10.S64
+#define qT4 Q11.S64
+#define qT5 Q12.S64
+
+#define dZr0 D14.S32
+#define dZi0 D15.S32
+#define dZr1 D26.S32
+#define dZi1 D27.S32
+#define dZr2 D28.S32
+#define dZi2 D29.S32
+#define dZr3 D30.S32
+#define dZi3 D31.S32
+
+#define qX0 Q0.S32
+#define qY0 Q8.S32
+#define qY1 Q9.S32
+#define qY2 Q10.S32
+#define qY3 Q11.S32
+#define qZ0 Q7.S32
+#define qZ1 Q13.S32
+#define qZ2 Q14.S32
+#define qZ3 Q15.S32
+
+
+
+ .MACRO FFTSTAGE scaled, inverse , name
+
+ @// Define stack arguments
+
+
+ @// pOut0+1 increments pOut0 by 8 bytes
+ @// pOut0+outPointStep == increment of 8*outPointStep bytes
+ MOV outPointStep,subFFTSize,LSL #3
+
+ @// Update grpCount and grpSize rightaway
+
+ VLD2 {dW1r,dW1i},[pTwiddle :128] @// [wi|wr]
+ MOV step16,#16
+ LSL grpCount,subFFTSize,#2
+
+ VLD1 dW2r,[pTwiddle :64] @// [wi|wr]
+ MOV subFFTNum,#1 @//after the last stage
+
+ VLD1 dW3r,[pTwiddle :64],step16 @// [wi|wr]
+ MOV stepTwiddle,#0
+
+ VLD1 dW2i,[pTwiddle :64]! @// [wi|wr]
+ SUB grpTwStep,stepTwiddle,#8 @// grpTwStep = -8 to start with
+
+ @// update subFFTSize for the next stage
+ MOV subFFTSize,grpCount
+ VLD1 dW3i,[pTwiddle :64],grpTwStep @// [wi|wr]
+ MOV dstStep,outPointStep,LSL #1
+
+ VLD4 {dButterfly1Real02,dButterfly1Imag02,dButterfly1Real13,dButterfly1Imag13},[pSrc :256]! @// AC.r AC.i BD.r BD.i
+ ADD dstStep,dstStep,outPointStep @// dstStep = 3*outPointStep
+ RSB dstStep,dstStep,#16 @// dstStep = - 3*outPointStep+16
+ MOV step24,#24
+
+ VLD4 {dButterfly2Real02,dButterfly2Imag02,dButterfly2Real13,dButterfly2Imag13},[pSrc :256]! @// AC.r AC.i BD.r BD.i
+
+
+ @// Process two groups at a time
+
+grpLoop\name :
+
+ VZIP dW2r,dW2i
+ ADD stepTwiddle,stepTwiddle,#16 @// increment for the next iteration
+ VZIP dW3r,dW3i
+ ADD grpTwStep,stepTwiddle,#4
+ VUZP dButterfly1Real13, dButterfly2Real13 @// B.r D.r
+ SUB twStep,stepTwiddle,#16 @// -16+stepTwiddle
+ VUZP dButterfly1Imag13, dButterfly2Imag13 @// B.i D.i
+ MOV grpTwStep,grpTwStep,LSL #1
+ VUZP dButterfly1Real02, dButterfly2Real02 @// A.r C.r
+ RSB grpTwStep,grpTwStep,#0 @// -8-2*stepTwiddle
+
+
+ VUZP dButterfly1Imag02, dButterfly2Imag02 @// A.i C.i
+
+
+ SUBS grpCount,grpCount,#8 @// grpCount is multiplied by 4
+
+ .ifeqs "\inverse", "TRUE"
+ VMULL qT0,dW1r,dXr1
+ VMLAL qT0,dW1i,dXi1 @// real part
+ VMULL qT1,dW1r,dXi1
+ VMLSL qT1,dW1i,dXr1 @// imag part
+
+ .else
+
+ VMULL qT0,dW1r,dXr1
+ VMLSL qT0,dW1i,dXi1 @// real part
+ VMULL qT1,dW1r,dXi1
+ VMLAL qT1,dW1i,dXr1 @// imag part
+
+ .endif
+
+ VLD2 {dW1r,dW1i},[pTwiddle :128],stepTwiddle @// [wi|wr]
+
+ .ifeqs "\inverse", "TRUE"
+ VMULL qT2,dW2r,dXr2
+ VMLAL qT2,dW2i,dXi2 @// real part
+ VMULL qT3,dW2r,dXi2
+ VLD1 dW2r,[pTwiddle :64],step16 @// [wi|wr]
+ VMLSL qT3,dW2i,dXr2 @// imag part
+
+ .else
+
+ VMULL qT2,dW2r,dXr2
+ VMLSL qT2,dW2i,dXi2 @// real part
+ VMULL qT3,dW2r,dXi2
+ VLD1 dW2r,[pTwiddle :64],step16 @// [wi|wr]
+ VMLAL qT3,dW2i,dXr2 @// imag part
+
+ .endif
+
+
+ VRSHRN dZr1,qT0,#31
+ VLD1 dW2i,[pTwiddle :64],twStep @// [wi|wr]
+ VRSHRN dZi1,qT1,#31
+
+ VMOV qZ0,qX0 @// move qX0 so as to load for the next iteration
+ VLD4 {dButterfly1Real02,dButterfly1Imag02,dButterfly1Real13,dButterfly1Imag13},[pSrc :256]! @// AC.r AC.i BD.r BD.i
+
+
+ .ifeqs "\inverse", "TRUE"
+ VMULL qT4,dW3r,dXr3
+ VMLAL qT4,dW3i,dXi3 @// real part
+ VMULL qT5,dW3r,dXi3
+ VLD1 dW3r,[pTwiddle :64],step24
+ VMLSL qT5,dW3i,dXr3 @// imag part
+
+ .else
+
+ VMULL qT4,dW3r,dXr3
+ VMLSL qT4,dW3i,dXi3 @// real part
+ VMULL qT5,dW3r,dXi3
+ VLD1 dW3r,[pTwiddle :64],step24
+ VMLAL qT5,dW3i,dXr3 @// imag part
+
+ .endif
+
+ VRSHRN dZr2,qT2,#31
+ VLD1 dW3i,[pTwiddle :64],grpTwStep @// [wi|wr]
+ VRSHRN dZi2,qT3,#31
+
+ VRSHRN dZr3,qT4,#31
+ VRSHRN dZi3,qT5,#31
+ VLD4 {dButterfly2Real02,dButterfly2Imag02,dButterfly2Real13,dButterfly2Imag13},[pSrc :256]! @// AC.r AC.i BD.r BD.i
+
+
+ .ifeqs "\scaled", "TRUE"
+
+ @// finish first stage of 4 point FFT
+
+ VHADD qY0,qZ0,qZ2
+ VHSUB qY2,qZ0,qZ2
+ VHADD qY1,qZ1,qZ3
+ VHSUB qY3,qZ1,qZ3
+
+
+ @// finish second stage of 4 point FFT
+
+ .ifeqs "\inverse", "TRUE"
+
+ VHSUB qZ0,qY2,qY1
+
+ VHADD dZr3,dYr0,dYi3
+ VST2 {dZr0,dZi0},[pDst :128],outPointStep
+ VHSUB dZi3,dYi0,dYr3
+
+ VHADD qZ2,qY2,qY1
+ VST2 {dZr3,dZi3},[pDst :128],outPointStep
+
+ VHSUB dZr1,dYr0,dYi3
+ VST2 {dZr2,dZi2},[pDst :128],outPointStep
+ VHADD dZi1,dYi0,dYr3
+
+ VST2 {dZr1,dZi1},[pDst :128],dstStep @// dstStep = -outPointStep + 16
+
+
+ .else
+
+ VHSUB qZ0,qY2,qY1
+
+ VHSUB dZr1,dYr0,dYi3
+ VST2 {dZr0,dZi0},[pDst :128],outPointStep
+ VHADD dZi1,dYi0,dYr3
+
+ VHADD qZ2,qY2,qY1
+ VST2 {dZr1,dZi1},[pDst :128],outPointStep
+
+ VHADD dZr3,dYr0,dYi3
+ VST2 {dZr2,dZi2},[pDst :128],outPointStep
+ VHSUB dZi3,dYi0,dYr3
+
+ VST2 {dZr3,dZi3},[pDst :128],dstStep @// dstStep = -outPointStep + 16
+
+
+ .endif
+
+
+
+ .else
+
+ @// finish first stage of 4 point FFT
+
+ VADD qY0,qZ0,qZ2
+ VSUB qY2,qZ0,qZ2
+ VADD qY1,qZ1,qZ3
+ VSUB qY3,qZ1,qZ3
+
+
+ @// finish second stage of 4 point FFT
+
+ .ifeqs "\inverse", "TRUE"
+
+ VSUB qZ0,qY2,qY1
+
+ VADD dZr3,dYr0,dYi3
+ VST2 {dZr0,dZi0},[pDst :128],outPointStep
+ VSUB dZi3,dYi0,dYr3
+
+ VADD qZ2,qY2,qY1
+ VST2 {dZr3,dZi3},[pDst :128],outPointStep
+
+ VSUB dZr1,dYr0,dYi3
+ VST2 {dZr2,dZi2},[pDst :128],outPointStep
+ VADD dZi1,dYi0,dYr3
+
+ VST2 {dZr1,dZi1},[pDst :128],dstStep @// dstStep = -outPointStep + 16
+
+
+ .else
+
+ VSUB qZ0,qY2,qY1
+
+ VSUB dZr1,dYr0,dYi3
+ VST2 {dZr0,dZi0},[pDst :128],outPointStep
+ VADD dZi1,dYi0,dYr3
+
+ VADD qZ2,qY2,qY1
+ VST2 {dZr1,dZi1},[pDst :128],outPointStep
+
+ VADD dZr3,dYr0,dYi3
+ VST2 {dZr2,dZi2},[pDst :128],outPointStep
+ VSUB dZi3,dYi0,dYr3
+
+ VST2 {dZr3,dZi3},[pDst :128],dstStep @// dstStep = -outPointStep + 16
+
+
+ .endif
+
+ .endif
+
+ BGT grpLoop\name
+
+
+ @// Reset and Swap pSrc and pDst for the next stage
+ MOV pTmp,pDst
+ SUB pSrc,pSrc,#64 @// Extra increment done in final iteration of the loop
+ SUB pDst,pSrc,outPointStep,LSL #2 @// pDst -= 4*size; pSrc -= 8*size bytes
+ SUB pSrc,pTmp,outPointStep
+ SUB pTwiddle,pTwiddle,subFFTSize,LSL #1
+ SUB pTwiddle,pTwiddle,#16 @// Extra increment done in final iteration of the loop
+
+ .endm
+
+
+ M_START armSP_FFTFwd_CToC_SC32_Radix4_ls_OutOfPlace_unsafe,r4
+ FFTSTAGE "FALSE","FALSE",fwd
+ M_END
+
+
+ M_START armSP_FFTInv_CToC_SC32_Radix4_ls_OutOfPlace_unsafe,r4
+ FFTSTAGE "FALSE","TRUE",inv
+ M_END
+
+
+ M_START armSP_FFTFwd_CToC_SC32_Sfs_Radix4_ls_OutOfPlace_unsafe,r4
+ FFTSTAGE "TRUE","FALSE",fwdsfs
+ M_END
+
+
+ M_START armSP_FFTInv_CToC_SC32_Sfs_Radix4_ls_OutOfPlace_unsafe,r4
+ FFTSTAGE "TRUE","TRUE",invsfs
+ M_END
+
+
+ .end
diff --git a/dl/armSP_FFT_CToC_SC32_Radix4_unsafe_s.S b/dl/armSP_FFT_CToC_SC32_Radix4_unsafe_s.S
new file mode 100644
index 0000000..5a2e21b
--- /dev/null
+++ b/dl/armSP_FFT_CToC_SC32_Radix4_unsafe_s.S
@@ -0,0 +1,395 @@
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@// This file was originally licensed as follows. It has been
+@// relicensed with permission from the copyright holders.
+@//
+
+@//
+@// File Name: armSP_FFT_CToC_SC32_Radix4_unsafe_s.s
+@// OpenMAX DL: v1.0.2
+@// Last Modified Revision: 7767
+@// Last Modified Date: Thu, 27 Sep 2007
+@//
+@// (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+@//
+@//
+@//
+@// Description:
+@// Compute a Radix 4 FFT stage for a N point complex signal
+@//
+
+
+
+
+@// Include standard headers
+
+#include "omxtypes_s.h"
+#include "armCOMM_s.h"
+
+
+@// Import symbols required from other files
+@// (For example tables)
+
+
+
+
+@// Set debugging level
+@//DEBUG_ON SETL {TRUE}
+
+
+
+@// Guarding implementation by the processor name
+
+
+
+
+@// Guarding implementation by the processor name
+
+
+@// Import symbols required from other files
+@// (For example tables)
+
+
+@//Input Registers
+
+#define pSrc r0
+#define pDst r2
+#define pTwiddle r1
+#define subFFTNum r6
+#define subFFTSize r7
+
+
+
+@//Output Registers
+
+
+@//Local Scratch Registers
+
+#define grpCount r3
+#define pointStep r4
+#define outPointStep r5
+#define stepTwiddle r12
+#define setCount r14
+#define srcStep r8
+#define setStep r9
+#define dstStep r10
+#define twStep r11
+#define t1 r3
+
+@// Neon Registers
+
+#define dW1 D0.S32
+#define dW2 D1.S32
+#define dW3 D2.S32
+
+#define dXr0 D4.S32
+#define dXi0 D5.S32
+#define dXr1 D6.S32
+#define dXi1 D7.S32
+#define dXr2 D8.S32
+#define dXi2 D9.S32
+#define dXr3 D10.S32
+#define dXi3 D11.S32
+#define dYr0 D12.S32
+#define dYi0 D13.S32
+#define dYr1 D14.S32
+#define dYi1 D15.S32
+#define dYr2 D16.S32
+#define dYi2 D17.S32
+#define dYr3 D18.S32
+#define dYi3 D19.S32
+#define qT0 Q8.S64
+#define qT1 Q9.S64
+#define qT2 Q6.S64
+#define qT3 Q7.S64
+
+#define dZr0 D20.S32
+#define dZi0 D21.S32
+#define dZr1 D22.S32
+#define dZi1 D23.S32
+#define dZr2 D24.S32
+#define dZi2 D25.S32
+#define dZr3 D26.S32
+#define dZi3 D27.S32
+
+#define qY0 Q6.S32
+#define qY1 Q7.S32
+#define qY2 Q8.S32
+#define qY3 Q9.S32
+#define qX0 Q2.S32
+#define qZ0 Q10.S32
+#define qZ1 Q11.S32
+#define qZ2 Q12.S32
+#define qZ3 Q13.S32
+
+
+ .MACRO FFTSTAGE scaled, inverse , name
+
+ @// Define stack arguments
+
+
+ @// Update grpCount and grpSize rightaway inorder to reuse pGrpCount and pGrpSize regs
+
+ LSL grpCount,subFFTSize,#2
+ LSR subFFTNum,subFFTNum,#2
+ MOV subFFTSize,grpCount
+
+ VLD1 dW1,[pTwiddle] @//[wi | wr]
+ @// pT0+1 increments pT0 by 8 bytes
+ @// pT0+pointStep = increment of 8*pointStep bytes = 2*grpSize bytes
+ MOV pointStep,subFFTNum,LSL #1
+
+
+ @// pOut0+1 increments pOut0 by 8 bytes
+ @// pOut0+outPointStep == increment of 8*outPointStep bytes = 2*size bytes
+
+ MOV stepTwiddle,#0
+ VLD1 dW2,[pTwiddle] @//[wi | wr]
+ SMULBB outPointStep,grpCount,pointStep
+ LSL pointStep,pointStep,#2 @// 2*grpSize
+
+ VLD1 dW3,[pTwiddle] @//[wi | wr]
+ MOV srcStep,pointStep,LSL #1 @// srcStep = 2*pointStep
+ ADD setStep,srcStep,pointStep @// setStep = 3*pointStep
+ @//RSB setStep,setStep,#16 @// setStep = - 3*pointStep+16
+ RSB setStep,setStep,#0 @// setStep = - 3*pointStep
+ SUB srcStep,srcStep,#16 @// srcStep = 2*pointStep-16
+
+ MOV dstStep,outPointStep,LSL #1
+ ADD dstStep,dstStep,outPointStep @// dstStep = 3*outPointStep
+ RSB dstStep,dstStep,#16 @// dstStep = - 3*outPointStep+16
+
+
+
+grpLoop\name :
+
+ VLD2 {dXr0,dXi0},[pSrc],pointStep @// data[0]
+ ADD stepTwiddle,stepTwiddle,pointStep
+ VLD2 {dXr1,dXi1},[pSrc],pointStep @// data[1]
+ ADD pTwiddle,pTwiddle,stepTwiddle @// set pTwiddle to the first point
+ VLD2 {dXr2,dXi2},[pSrc],pointStep @// data[2]
+ MOV twStep,stepTwiddle,LSL #2
+
+ VLD2 {dXr3,dXi3},[pSrc],setStep @// data[3] & update pSrc for the next set
+ SUB twStep,stepTwiddle,twStep @// twStep = -3*stepTwiddle
+
+ MOV setCount,pointStep,LSR #3
+ ADD pSrc,pSrc,#16 @// set pSrc to data[0] of the next set
+ ADD pSrc,pSrc,pointStep @// increment to data[1] of the next set
+
+
+ @// Loop on the sets
+
+setLoop\name :
+
+
+
+ SUBS setCount,setCount,#2 @// decrement the loop counter
+
+ .ifeqs "\inverse", "TRUE"
+ VMULL qT0,dXr1,dW1[0]
+ VMLAL qT0,dXi1,dW1[1] @// real part
+ VMULL qT1,dXi1,dW1[0]
+ VMLSL qT1,dXr1,dW1[1] @// imag part
+
+ .else
+ VMULL qT0,dXr1,dW1[0]
+ VMLSL qT0,dXi1,dW1[1] @// real part
+ VMULL qT1,dXi1,dW1[0]
+ VMLAL qT1,dXr1,dW1[1] @// imag part
+
+ .endif
+
+ VLD2 {dXr1,dXi1},[pSrc],pointStep @// data[1] for next iteration
+
+ .ifeqs "\inverse", "TRUE"
+ VMULL qT2,dXr2,dW2[0]
+ VMLAL qT2,dXi2,dW2[1] @// real part
+ VMULL qT3,dXi2,dW2[0]
+ VMLSL qT3,dXr2,dW2[1] @// imag part
+
+ .else
+ VMULL qT2,dXr2,dW2[0]
+ VMLSL qT2,dXi2,dW2[1] @// real part
+ VMULL qT3,dXi2,dW2[0]
+ VMLAL qT3,dXr2,dW2[1] @// imag part
+
+ .endif
+
+ VRSHRN dZr1,qT0,#31
+ VRSHRN dZi1,qT1,#31
+ VLD2 {dXr2,dXi2},[pSrc],pointStep @// data[2] for next iteration
+
+
+ .ifeqs "\inverse", "TRUE"
+ VMULL qT0,dXr3,dW3[0]
+ VMLAL qT0,dXi3,dW3[1] @// real part
+ VMULL qT1,dXi3,dW3[0]
+ VMLSL qT1,dXr3,dW3[1] @// imag part
+
+ .else
+ VMULL qT0,dXr3,dW3[0]
+ VMLSL qT0,dXi3,dW3[1] @// real part
+ VMULL qT1,dXi3,dW3[0]
+ VMLAL qT1,dXr3,dW3[1] @// imag part
+
+ .endif
+
+ VRSHRN dZr2,qT2,#31
+ VRSHRN dZi2,qT3,#31
+
+
+ VRSHRN dZr3,qT0,#31
+ VRSHRN dZi3,qT1,#31
+ VLD2 {dXr3,dXi3},[pSrc],setStep @// data[3] & update pSrc to data[0]
+
+ .ifeqs "\scaled", "TRUE"
+
+ @// finish first stage of 4 point FFT
+ VHADD qY0,qX0,qZ2
+ VHSUB qY2,qX0,qZ2
+
+ VLD2 {dXr0,dXi0},[pSrc]! @// data[0] for next iteration
+ VHADD qY1,qZ1,qZ3
+ VHSUB qY3,qZ1,qZ3
+
+ @// finish second stage of 4 point FFT
+
+ VHSUB qZ0,qY2,qY1
+
+
+ .ifeqs "\inverse", "TRUE"
+
+ VHADD dZr3,dYr0,dYi3
+ VST2 {dZr0,dZi0},[pDst :128],outPointStep
+ VHSUB dZi3,dYi0,dYr3
+
+ VHADD qZ2,qY2,qY1
+ VST2 {dZr3,dZi3},[pDst :128],outPointStep
+
+ VHSUB dZr1,dYr0,dYi3
+ VST2 {dZr2,dZi2},[pDst :128],outPointStep
+ VHADD dZi1,dYi0,dYr3
+
+ VST2 {dZr1,dZi1},[pDst :128],dstStep
+
+
+ .else
+
+ VHSUB dZr1,dYr0,dYi3
+ VST2 {dZr0,dZi0},[pDst :128],outPointStep
+ VHADD dZi1,dYi0,dYr3
+
+ VHADD qZ2,qY2,qY1
+ VST2 {dZr1,dZi1},[pDst :128],outPointStep
+
+ VHADD dZr3,dYr0,dYi3
+ VST2 {dZr2,dZi2},[pDst :128],outPointStep
+ VHSUB dZi3,dYi0,dYr3
+
+ VST2 {dZr3,dZi3},[pDst :128],dstStep
+
+
+ .endif
+
+
+ .else
+
+ @// finish first stage of 4 point FFT
+ VADD qY0,qX0,qZ2
+ VSUB qY2,qX0,qZ2
+
+ VLD2 {dXr0,dXi0},[pSrc :128]! @// data[0] for next iteration
+ VADD qY1,qZ1,qZ3
+ VSUB qY3,qZ1,qZ3
+
+ @// finish second stage of 4 point FFT
+
+ VSUB qZ0,qY2,qY1
+
+
+ .ifeqs "\inverse", "TRUE"
+
+ VADD dZr3,dYr0,dYi3
+ VST2 {dZr0,dZi0},[pDst :128],outPointStep
+ VSUB dZi3,dYi0,dYr3
+
+ VADD qZ2,qY2,qY1
+ VST2 {dZr3,dZi3},[pDst :128],outPointStep
+
+ VSUB dZr1,dYr0,dYi3
+ VST2 {dZr2,dZi2},[pDst :128],outPointStep
+ VADD dZi1,dYi0,dYr3
+
+ VST2 {dZr1,dZi1},[pDst :128],dstStep
+
+
+ .else
+
+ VSUB dZr1,dYr0,dYi3
+ VST2 {dZr0,dZi0},[pDst :128],outPointStep
+ VADD dZi1,dYi0,dYr3
+
+ VADD qZ2,qY2,qY1
+ VST2 {dZr1,dZi1},[pDst :128],outPointStep
+
+ VADD dZr3,dYr0,dYi3
+ VST2 {dZr2,dZi2},[pDst :128],outPointStep
+ VSUB dZi3,dYi0,dYr3
+
+ VST2 {dZr3,dZi3},[pDst :128],dstStep
+
+
+ .endif
+
+ .endif
+
+ ADD pSrc,pSrc,pointStep @// increment to data[1] of the next set
+ BGT setLoop\name
+
+
+ VLD1 dW1,[pTwiddle :64],stepTwiddle @//[wi | wr]
+ SUBS grpCount,grpCount,#4 @// subtract 4 since grpCount multiplied by 4
+ VLD1 dW2,[pTwiddle :64],stepTwiddle @//[wi | wr]
+ ADD pSrc,pSrc,srcStep @// increment pSrc for the next grp
+ VLD1 dW3,[pTwiddle :64],twStep @//[wi | wr]
+ BGT grpLoop\name
+
+
+ @// Reset and Swap pSrc and pDst for the next stage
+ MOV t1,pDst
+ SUB pDst,pSrc,outPointStep,LSL #2 @// pDst -= 2*size; pSrc -= 8*size bytes
+ SUB pSrc,t1,outPointStep
+
+
+ .endm
+
+
+ M_START armSP_FFTFwd_CToC_SC32_Radix4_OutOfPlace_unsafe,r4
+ FFTSTAGE "FALSE","FALSE",FWD
+ M_END
+
+
+ M_START armSP_FFTInv_CToC_SC32_Radix4_OutOfPlace_unsafe,r4
+ FFTSTAGE "FALSE","TRUE",INV
+ M_END
+
+
+ M_START armSP_FFTFwd_CToC_SC32_Sfs_Radix4_OutOfPlace_unsafe,r4
+ FFTSTAGE "TRUE","FALSE",FWDSFS
+ M_END
+
+
+ M_START armSP_FFTInv_CToC_SC32_Sfs_Radix4_OutOfPlace_unsafe,r4
+ FFTSTAGE "TRUE","TRUE",INVSFS
+ M_END
+
+
+ .end
diff --git a/dl/armSP_FFT_CToC_SC32_Radix8_fs_unsafe_s.S b/dl/armSP_FFT_CToC_SC32_Radix8_fs_unsafe_s.S
new file mode 100644
index 0000000..5fd8d9b
--- /dev/null
+++ b/dl/armSP_FFT_CToC_SC32_Radix8_fs_unsafe_s.S
@@ -0,0 +1,595 @@
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@// This file was originally licensed as follows. It has been
+@// relicensed with permission from the copyright holders.
+@//
+
+@//
+@// File Name: armSP_FFT_CToC_SC32_Radix8_fs_unsafe_s.s
+@// OpenMAX DL: v1.0.2
+@// Last Modified Revision: 7770
+@// Last Modified Date: Thu, 27 Sep 2007
+@//
+@// (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+@//
+@//
+@//
+@// Description:
+@// Compute a first stage Radix 8 FFT stage for a N point complex signal
+@//
+
+
+
+
+@// Include standard headers
+
+#include "omxtypes_s.h"
+#include "armCOMM_s.h"
+
+@// Import symbols required from other files
+@// (For example tables)
+
+
+@// Set debugging level
+@//DEBUG_ON SETL {TRUE}
+
+
+
+@// Guarding implementation by the processor name
+
+
+
+
+@// Guarding implementation by the processor name
+
+@//Input Registers
+
+#define pSrc r0
+#define pDst r2
+#define pTwiddle r1
+#define subFFTNum r6
+#define subFFTSize r7
+@// dest buffer for the next stage (not pSrc for first stage)
+#define pPingPongBuf r5
+
+
+@//Output Registers
+
+
+@//Local Scratch Registers
+
+#define grpSize r3
+@// Reuse grpSize as setCount
+#define setCount r3
+#define pointStep r4
+#define outPointStep r4
+#define setStep r8
+#define step1 r9
+#define step2 r10
+#define t0 r11
+
+
+@// Neon Registers
+
+#define dXr0 D0.S32
+#define dXi0 D1.S32
+#define dXr1 D2.S32
+#define dXi1 D3.S32
+#define dXr2 D4.S32
+#define dXi2 D5.S32
+#define dXr3 D6.S32
+#define dXi3 D7.S32
+#define dXr4 D8.S32
+#define dXi4 D9.S32
+#define dXr5 D10.S32
+#define dXi5 D11.S32
+#define dXr6 D12.S32
+#define dXi6 D13.S32
+#define dXr7 D14.S32
+#define dXi7 D15.S32
+#define qX0 Q0.S32
+#define qX1 Q1.S32
+#define qX2 Q2.S32
+#define qX3 Q3.S32
+#define qX4 Q4.S32
+#define qX5 Q5.S32
+#define qX6 Q6.S32
+#define qX7 Q7.S32
+
+#define dUr0 D16.S32
+#define dUi0 D17.S32
+#define dUr2 D18.S32
+#define dUi2 D19.S32
+#define dUr4 D20.S32
+#define dUi4 D21.S32
+#define dUr6 D22.S32
+#define dUi6 D23.S32
+#define dUr1 D24.S32
+#define dUi1 D25.S32
+#define dUr3 D26.S32
+#define dUi3 D27.S32
+#define dUr5 D28.S32
+#define dUi5 D29.S32
+@// reuse dXr7 and dXi7
+#define dUr7 D30.S32
+#define dUi7 D31.S32
+#define qU0 Q8.S32
+#define qU1 Q12.S32
+#define qU2 Q9.S32
+#define qU3 Q13.S32
+#define qU4 Q10.S32
+#define qU5 Q14.S32
+#define qU6 Q11.S32
+#define qU7 Q15.S32
+
+
+
+#define dVr0 D24.S32
+#define dVi0 D25.S32
+#define dVr2 D26.S32
+#define dVi2 D27.S32
+#define dVr4 D28.S32
+#define dVi4 D29.S32
+#define dVr6 D30.S32
+#define dVi6 D31.S32
+#define dVr1 D16.S32
+#define dVi1 D17.S32
+#define dVr3 D18.S32
+#define dVi3 D19.S32
+#define dVr5 D20.S32
+#define dVi5 D21.S32
+#define dVr7 D22.S32
+#define dVi7 D23.S32
+#define qV0 Q12.S32
+#define qV1 Q8.S32
+#define qV2 Q13.S32
+#define qV3 Q9.S32
+#define qV4 Q14.S32
+#define qV5 Q10.S32
+#define qV6 Q15.S32
+#define qV7 Q11.S32
+
+
+
+#define dYr0 D16.S32
+#define dYi0 D17.S32
+#define dYr2 D18.S32
+#define dYi2 D19.S32
+#define dYr4 D20.S32
+#define dYi4 D21.S32
+#define dYr6 D22.S32
+#define dYi6 D23.S32
+#define dYr1 D24.S32
+#define dYi1 D25.S32
+#define dYr3 D26.S32
+#define dYi3 D27.S32
+#define dYr5 D28.S32
+#define dYi5 D29.S32
+#define dYr7 D30.S32
+#define dYi7 D31.S32
+#define qY0 Q8.S32
+#define qY1 Q12.S32
+#define qY2 Q9.S32
+#define qY3 Q13.S32
+#define qY4 Q10.S32
+#define qY5 Q14.S32
+#define qY6 Q11.S32
+#define qY7 Q15.S32
+
+
+#define dT0 D14.S32
+#define dT1 D15.S32
+
+@// Define constants
+ .set ONEBYSQRT2, 0x5A82799A @// Q31 format
+
+
+ .MACRO FFTSTAGE scaled, inverse, name
+
+ @// Define stack arguments
+
+ @// Update pSubFFTSize and pSubFFTNum regs
+ MOV subFFTSize,#8 @// subFFTSize = 1 for the first stage
+ LDR t0,=ONEBYSQRT2 @// t0=(1/sqrt(2)) as Q31 value
+
+ @// Note: setCount = subFFTNum/8 (reuse the grpSize reg for setCount)
+ LSR grpSize,subFFTNum,#3
+ MOV subFFTNum,grpSize
+
+
+ @// pT0+1 increments pT0 by 8 bytes
+ @// pT0+pointStep = increment of 8*pointStep bytes = grpSize bytes
+ @// Note: outPointStep = pointStep for firststage
+
+ MOV pointStep,grpSize,LSL #3
+
+
+ @// Calculate the step of input data for the next set
+ @//MOV step1,pointStep,LSL #1 @// step1 = 2*pointStep
+ VLD2 {dXr0,dXi0},[pSrc :128],pointStep @// data[0]
+ MOV step1,grpSize,LSL #4
+
+ MOV step2,pointStep,LSL #3
+ VLD2 {dXr1,dXi1},[pSrc :128],pointStep @// data[1]
+ SUB step2,step2,pointStep @// step2 = 7*pointStep
+ RSB setStep,step2,#16 @// setStep = - 7*pointStep+16
+
+ VLD2 {dXr2,dXi2},[pSrc :128],pointStep @// data[2]
+ VLD2 {dXr3,dXi3},[pSrc :128],pointStep @// data[3]
+ VLD2 {dXr4,dXi4},[pSrc :128],pointStep @// data[4]
+ VLD2 {dXr5,dXi5},[pSrc :128],pointStep @// data[5]
+ VLD2 {dXr6,dXi6},[pSrc :128],pointStep @// data[6]
+ VLD2 {dXr7,dXi7},[pSrc :128],setStep @// data[7] & update pSrc for the next set
+ @// setStep = -7*pointStep + 16
+ @// grp = 0 a special case since all the twiddle factors are 1
+ @// Loop on the sets
+
+grpZeroSetLoop\name :
+
+ @// Decrement setcount
+ SUBS setCount,setCount,#2 @// decrement the set loop counter
+
+
+ .ifeqs "\scaled", "TRUE"
+ @// finish first stage of 8 point FFT
+
+ VHADD qU0,qX0,qX4
+ VHADD qU2,qX1,qX5
+ VHADD qU4,qX2,qX6
+ VHADD qU6,qX3,qX7
+
+ @// finish second stage of 8 point FFT
+
+ VHADD qV0,qU0,qU4
+ VHSUB qV2,qU0,qU4
+ VHADD qV4,qU2,qU6
+ VHSUB qV6,qU2,qU6
+
+ @// finish third stage of 8 point FFT
+
+ VHADD qY0,qV0,qV4
+ VHSUB qY4,qV0,qV4
+ VST2 {dYr0,dYi0},[pDst :128],step1 @// store y0
+
+ .ifeqs "\inverse", "TRUE"
+
+ VHSUB dYr2,dVr2,dVi6
+ VHADD dYi2,dVi2,dVr6
+
+ VHADD dYr6,dVr2,dVi6
+ VST2 {dYr2,dYi2},[pDst :128],step1 @// store y2
+ VHSUB dYi6,dVi2,dVr6
+
+ VHSUB qU1,qX0,qX4
+ VST2 {dYr4,dYi4},[pDst :128],step1 @// store y4
+
+ VHSUB qU3,qX1,qX5
+ VHSUB qU5,qX2,qX6
+ VST2 {dYr6,dYi6},[pDst :128],step1 @// store y6
+
+ .ELSE
+
+ VHADD dYr6,dVr2,dVi6
+ VHSUB dYi6,dVi2,dVr6
+
+ VHSUB dYr2,dVr2,dVi6
+ VST2 {dYr6,dYi6},[pDst :128],step1 @// store y2
+ VHADD dYi2,dVi2,dVr6
+
+
+ VHSUB qU1,qX0,qX4
+ VST2 {dYr4,dYi4},[pDst :128],step1 @// store y4
+ VHSUB qU3,qX1,qX5
+ VHSUB qU5,qX2,qX6
+ VST2 {dYr2,dYi2},[pDst :128],step1 @// store y6
+
+
+ .ENDIF
+
+ @// finish first stage of 8 point FFT
+
+ VHSUB qU7,qX3,qX7
+ VMOV dT0[0],t0
+
+ @// finish second stage of 8 point FFT
+
+ VHSUB dVr1,dUr1,dUi5
+ VLD2 {dXr0,dXi0},[pSrc :128],pointStep @// data[0] for next iteration
+ VHADD dVi1,dUi1,dUr5
+ VHADD dVr3,dUr1,dUi5
+ VLD2 {dXr1,dXi1},[pSrc :128],pointStep @// data[1]
+ VHSUB dVi3,dUi1,dUr5
+
+ VHSUB dVr5,dUr3,dUi7
+ VLD2 {dXr2,dXi2},[pSrc :128],pointStep @// data[2]
+ VHADD dVi5,dUi3,dUr7
+ VHADD dVr7,dUr3,dUi7
+ VLD2 {dXr3,dXi3},[pSrc :128],pointStep @// data[3]
+ VHSUB dVi7,dUi3,dUr7
+
+ @// finish third stage of 8 point FFT
+
+ .ifeqs "\inverse", "TRUE"
+
+ @// calculate a*v5
+ VQRDMULH dT1,dVr5,dT0[0] @// use dVi0 for dT1
+ VLD2 {dXr4,dXi4},[pSrc :128],pointStep @// data[4]
+ VQRDMULH dVi5,dVi5,dT0[0]
+
+ VLD2 {dXr5,dXi5},[pSrc :128],pointStep @// data[5]
+ VSUB dVr5,dT1,dVi5 @// a * V5
+ VADD dVi5,dT1,dVi5
+
+ VLD2 {dXr6,dXi6},[pSrc :128],pointStep @// data[6]
+
+ @// calculate b*v7
+ VQRDMULH dT1,dVr7,dT0[0]
+ VQRDMULH dVi7,dVi7,dT0[0]
+
+ VHADD qY1,qV1,qV5
+ VHSUB qY5,qV1,qV5
+
+
+ VADD dVr7,dT1,dVi7 @// b * V7
+ VSUB dVi7,dVi7,dT1
+ SUB pDst, pDst, step2 @// set pDst to y1
+
+ VLD2 {dXr7,dXi7},[pSrc :128],setStep @// data[7]
+
+
+ VHSUB dYr3,dVr3,dVr7
+ VHSUB dYi3,dVi3,dVi7
+ VST2 {dYr1,dYi1},[pDst :128],step1 @// store y1
+ VHADD dYr7,dVr3,dVr7
+ VHADD dYi7,dVi3,dVi7
+
+
+ VST2 {dYr3,dYi3},[pDst :128],step1 @// store y3
+ VST2 {dYr5,dYi5},[pDst :128],step1 @// store y5
+ VST2 {dYr7,dYi7},[pDst :128]! @// store y7
+
+ .ELSE
+
+ @// calculate b*v7
+ VQRDMULH dT1,dVr7,dT0[0]
+ VLD2 {dXr4,dXi4},[pSrc :128],pointStep @// data[4]
+ VQRDMULH dVi7,dVi7,dT0[0]
+
+ VLD2 {dXr5,dXi5},[pSrc :128],pointStep @// data[5]
+ VADD dVr7,dT1,dVi7 @// b * V7
+ VSUB dVi7,dVi7,dT1
+
+ VLD2 {dXr6,dXi6},[pSrc :128],pointStep @// data[6]
+
+ @// calculate a*v5
+ VQRDMULH dT1,dVr5,dT0[0] @// use dVi0 for dT1
+ VQRDMULH dVi5,dVi5,dT0[0]
+
+ VHADD dYr7,dVr3,dVr7
+ VHADD dYi7,dVi3,dVi7
+ SUB pDst, pDst, step2 @// set pDst to y1
+
+ VSUB dVr5,dT1,dVi5 @// a * V5
+ VADD dVi5,dT1,dVi5
+ VLD2 {dXr7,dXi7},[pSrc :128],setStep @// data[7]
+
+ VHSUB qY5,qV1,qV5
+
+ VHSUB dYr3,dVr3,dVr7
+ VST2 {dYr7,dYi7},[pDst :128],step1 @// store y1
+ VHSUB dYi3,dVi3,dVi7
+ VHADD qY1,qV1,qV5
+
+
+ VST2 {dYr5,dYi5},[pDst :128],step1 @// store y3
+ VST2 {dYr3,dYi3},[pDst :128],step1 @// store y5
+ VST2 {dYr1,dYi1},[pDst :128]! @// store y7
+
+ .ENDIF
+
+
+
+ .ELSE
+ @// finish first stage of 8 point FFT
+
+ VADD qU0,qX0,qX4
+ VADD qU2,qX1,qX5
+ VADD qU4,qX2,qX6
+ VADD qU6,qX3,qX7
+
+ @// finish second stage of 8 point FFT
+
+ VADD qV0,qU0,qU4
+ VSUB qV2,qU0,qU4
+ VADD qV4,qU2,qU6
+ VSUB qV6,qU2,qU6
+
+ @// finish third stage of 8 point FFT
+
+ VADD qY0,qV0,qV4
+ VSUB qY4,qV0,qV4
+ VST2 {dYr0,dYi0},[pDst :128],step1 @// store y0
+
+ .ifeqs "\inverse", "TRUE"
+
+ VSUB dYr2,dVr2,dVi6
+ VADD dYi2,dVi2,dVr6
+
+ VADD dYr6,dVr2,dVi6
+ VST2 {dYr2,dYi2},[pDst :128],step1 @// store y2
+ VSUB dYi6,dVi2,dVr6
+
+ VSUB qU1,qX0,qX4
+ VST2 {dYr4,dYi4},[pDst :128],step1 @// store y4
+
+ VSUB qU3,qX1,qX5
+ VSUB qU5,qX2,qX6
+ VST2 {dYr6,dYi6},[pDst :128],step1 @// store y6
+
+ .ELSE
+
+ VADD dYr6,dVr2,dVi6
+ VSUB dYi6,dVi2,dVr6
+
+ VSUB dYr2,dVr2,dVi6
+ VST2 {dYr6,dYi6},[pDst :128],step1 @// store y2
+ VADD dYi2,dVi2,dVr6
+
+
+ VSUB qU1,qX0,qX4
+ VST2 {dYr4,dYi4},[pDst :128],step1 @// store y4
+ VSUB qU3,qX1,qX5
+ VSUB qU5,qX2,qX6
+ VST2 {dYr2,dYi2},[pDst :128],step1 @// store y6
+
+
+ .ENDIF
+
+ @// finish first stage of 8 point FFT
+
+ VSUB qU7,qX3,qX7
+ VMOV dT0[0],t0
+
+ @// finish second stage of 8 point FFT
+
+ VSUB dVr1,dUr1,dUi5
+ VLD2 {dXr0,dXi0},[pSrc :128],pointStep @// data[0] for next iteration
+ VADD dVi1,dUi1,dUr5
+ VADD dVr3,dUr1,dUi5
+ VLD2 {dXr1,dXi1},[pSrc :128],pointStep @// data[1]
+ VSUB dVi3,dUi1,dUr5
+
+ VSUB dVr5,dUr3,dUi7
+ VLD2 {dXr2,dXi2},[pSrc :128],pointStep @// data[2]
+ VADD dVi5,dUi3,dUr7
+ VADD dVr7,dUr3,dUi7
+ VLD2 {dXr3,dXi3},[pSrc :128],pointStep @// data[3]
+ VSUB dVi7,dUi3,dUr7
+
+ @// finish third stage of 8 point FFT
+
+ .ifeqs "\inverse", "TRUE"
+
+ @// calculate a*v5
+ VQRDMULH dT1,dVr5,dT0[0] @// use dVi0 for dT1
+ VLD2 {dXr4,dXi4},[pSrc :128],pointStep @// data[4]
+ VQRDMULH dVi5,dVi5,dT0[0]
+
+ VLD2 {dXr5,dXi5},[pSrc :128],pointStep @// data[5]
+ VSUB dVr5,dT1,dVi5 @// a * V5
+ VADD dVi5,dT1,dVi5
+
+ VLD2 {dXr6,dXi6},[pSrc :128],pointStep @// data[6]
+
+ @// calculate b*v7
+ VQRDMULH dT1,dVr7,dT0[0]
+ VQRDMULH dVi7,dVi7,dT0[0]
+
+ VADD qY1,qV1,qV5
+ VSUB qY5,qV1,qV5
+
+
+ VADD dVr7,dT1,dVi7 @// b * V7
+ VSUB dVi7,dVi7,dT1
+ SUB pDst, pDst, step2 @// set pDst to y1
+
+ VLD2 {dXr7,dXi7},[pSrc :128],setStep @// data[7]
+
+
+ VSUB dYr3,dVr3,dVr7
+ VSUB dYi3,dVi3,dVi7
+ VST2 {dYr1,dYi1},[pDst :128],step1 @// store y1
+ VADD dYr7,dVr3,dVr7
+ VADD dYi7,dVi3,dVi7
+
+
+ VST2 {dYr3,dYi3},[pDst :128],step1 @// store y3
+ VST2 {dYr5,dYi5},[pDst :128],step1 @// store y5
+ VST2 {dYr7,dYi7},[pDst :128]! @// store y7
+
+ .ELSE
+
+ @// calculate b*v7
+ VQRDMULH dT1,dVr7,dT0[0]
+ VLD2 {dXr4,dXi4},[pSrc :128],pointStep @// data[4]
+ VQRDMULH dVi7,dVi7,dT0[0]
+
+ VLD2 {dXr5,dXi5},[pSrc :128],pointStep @// data[5]
+ VADD dVr7,dT1,dVi7 @// b * V7
+ VSUB dVi7,dVi7,dT1
+
+ VLD2 {dXr6,dXi6},[pSrc :128],pointStep @// data[6]
+
+ @// calculate a*v5
+ VQRDMULH dT1,dVr5,dT0[0] @// use dVi0 for dT1
+ VQRDMULH dVi5,dVi5,dT0[0]
+
+ VADD dYr7,dVr3,dVr7
+ VADD dYi7,dVi3,dVi7
+ SUB pDst, pDst, step2 @// set pDst to y1
+
+ VSUB dVr5,dT1,dVi5 @// a * V5
+ VADD dVi5,dT1,dVi5
+ VLD2 {dXr7,dXi7},[pSrc :128],setStep @// data[7]
+
+ VSUB qY5,qV1,qV5
+
+ VSUB dYr3,dVr3,dVr7
+ VST2 {dYr7,dYi7},[pDst :128],step1 @// store y1
+ VSUB dYi3,dVi3,dVi7
+ VADD qY1,qV1,qV5
+
+
+ VST2 {dYr5,dYi5},[pDst :128],step1 @// store y3
+ VST2 {dYr3,dYi3},[pDst :128],step1 @// store y5
+ VST2 {dYr1,dYi1},[pDst :128]! @// store y7
+
+ .ENDIF
+
+
+ .ENDIF
+
+ SUB pDst, pDst, step2 @// update pDst for the next set
+ BGT grpZeroSetLoop\name
+
+
+ @// reset pSrc to pDst for the next stage
+ SUB pSrc,pDst,pointStep @// pDst -= 2*grpSize
+ MOV pDst,pPingPongBuf
+
+
+
+ .endm
+
+
+ @// Allocate stack memory required by the function
+
+
+ M_START armSP_FFTFwd_CToC_SC32_Radix8_fs_OutOfPlace_unsafe,r4
+ FFTSTAGE "FALSE","FALSE",FWD
+ M_END
+
+
+ M_START armSP_FFTInv_CToC_SC32_Radix8_fs_OutOfPlace_unsafe,r4
+ FFTSTAGE "FALSE","TRUE",INV
+ M_END
+
+
+ M_START armSP_FFTFwd_CToC_SC32_Sfs_Radix8_fs_OutOfPlace_unsafe,r4
+ FFTSTAGE "TRUE","FALSE",FWDSFS
+ M_END
+
+
+ M_START armSP_FFTInv_CToC_SC32_Sfs_Radix8_fs_OutOfPlace_unsafe,r4
+ FFTSTAGE "TRUE","TRUE",INVSFS
+ M_END
+
+
+ .end
diff --git a/dl/armSP_FFT_F32TwiddleTable.c b/dl/armSP_FFT_F32TwiddleTable.c
new file mode 100644
index 0000000..78cd8a4
--- /dev/null
+++ b/dl/armSP_FFT_F32TwiddleTable.c
@@ -0,0 +1,4643 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ *
+ */
+
+/*
+ * Description:
+ * Twiddle table for Forward FFT in float format.
+ * It contains complex pairs [-cos (W * i), -sin (W * i)] where W = -2*PI/N
+ * and 0<= i<= N/8. N is the max size of the FFT. Here N = 2^12
+ * Values for N/8 < i < N are generated in the FFTInit function using the
+ * symmetries of cos and sine.
+ *
+ * We use the negative to be consistent with the S32 version.
+**/
+
+#include "omxtypes.h"
+
+#define TWIDDLE_TABLE_ENTRIES ((1 << TWIDDLE_TABLE_ORDER) / 8)
+
+const OMX_F32 armSP_FFT_F32TwiddleTable[2 * TWIDDLE_TABLE_ENTRIES + 2] = {
+#if TWIDDLE_TABLE_ORDER == 15
+ -1.000000000000000e+00, 0.000000000000000e+00,
+ -9.999999816164293e-01, 1.917475973107033e-04,
+ -9.999999264657179e-01, 3.834951875713956e-04,
+ -9.999998345478677e-01, 5.752427637320661e-04,
+ -9.999997058628822e-01, 7.669903187427045e-04,
+ -9.999995404107661e-01, 9.587378455533014e-04,
+ -9.999993381915255e-01, 1.150485337113848e-03,
+ -9.999990992051678e-01, 1.342232786374338e-03,
+ -9.999988234517019e-01, 1.533980186284766e-03,
+ -9.999985109311378e-01, 1.725727529795126e-03,
+ -9.999981616434870e-01, 1.917474809855419e-03,
+ -9.999977755887623e-01, 2.109222019415644e-03,
+ -9.999973527669782e-01, 2.300969151425805e-03,
+ -9.999968931781499e-01, 2.492716198835908e-03,
+ -9.999963968222944e-01, 2.684463154595962e-03,
+ -9.999958636994299e-01, 2.876210011655979e-03,
+ -9.999952938095762e-01, 3.067956762965976e-03,
+ -9.999946871527541e-01, 3.259703401475973e-03,
+ -9.999940437289858e-01, 3.451449920135994e-03,
+ -9.999933635382952e-01, 3.643196311896068e-03,
+ -9.999926465807072e-01, 3.834942569706228e-03,
+ -9.999918928562480e-01, 4.026688686516512e-03,
+ -9.999911023649456e-01, 4.218434655276963e-03,
+ -9.999902751068289e-01, 4.410180468937631e-03,
+ -9.999894110819284e-01, 4.601926120448570e-03,
+ -9.999885102902757e-01, 4.793671602759841e-03,
+ -9.999875727319041e-01, 4.985416908821511e-03,
+ -9.999865984068480e-01, 5.177162031583651e-03,
+ -9.999855873151432e-01, 5.368906963996342e-03,
+ -9.999845394568270e-01, 5.560651699009674e-03,
+ -9.999834548319377e-01, 5.752396229573736e-03,
+ -9.999823334405153e-01, 5.944140548638633e-03,
+ -9.999811752826011e-01, 6.135884649154475e-03,
+ -9.999799803582377e-01, 6.327628524071378e-03,
+ -9.999787486674688e-01, 6.519372166339468e-03,
+ -9.999774802103399e-01, 6.711115568908879e-03,
+ -9.999761749868976e-01, 6.902858724729756e-03,
+ -9.999748329971898e-01, 7.094601626752250e-03,
+ -9.999734542412659e-01, 7.286344267926521e-03,
+ -9.999720387191767e-01, 7.478086641202744e-03,
+ -9.999705864309741e-01, 7.669828739531097e-03,
+ -9.999690973767116e-01, 7.861570555861772e-03,
+ -9.999675715564438e-01, 8.053312083144972e-03,
+ -9.999660089702269e-01, 8.245053314330906e-03,
+ -9.999644096181183e-01, 8.436794242369799e-03,
+ -9.999627735001769e-01, 8.628534860211886e-03,
+ -9.999611006164628e-01, 8.820275160807411e-03,
+ -9.999593909670375e-01, 9.012015137106633e-03,
+ -9.999576445519639e-01, 9.203754782059820e-03,
+ -9.999558613713061e-01, 9.395494088617251e-03,
+ -9.999540414251298e-01, 9.587233049729225e-03,
+ -9.999521847135018e-01, 9.778971658346043e-03,
+ -9.999502912364905e-01, 9.970709907418030e-03,
+ -9.999483609941654e-01, 1.016244778989551e-02,
+ -9.999463939865975e-01, 1.035418529872884e-02,
+ -9.999443902138591e-01, 1.054592242686838e-02,
+ -9.999423496760239e-01, 1.073765916726449e-02,
+ -9.999402723731670e-01, 1.092939551286757e-02,
+ -9.999381583053646e-01, 1.112113145662802e-02,
+ -9.999360074726946e-01, 1.131286699149626e-02,
+ -9.999338198752360e-01, 1.150460211042271e-02,
+ -9.999315955130692e-01, 1.169633680635784e-02,
+ -9.999293343862761e-01, 1.188807107225209e-02,
+ -9.999270364949396e-01, 1.207980490105596e-02,
+ -9.999247018391445e-01, 1.227153828571993e-02,
+ -9.999223304189765e-01, 1.246327121919451e-02,
+ -9.999199222345228e-01, 1.265500369443024e-02,
+ -9.999174772858718e-01, 1.284673570437766e-02,
+ -9.999149955731135e-01, 1.303846724198733e-02,
+ -9.999124770963392e-01, 1.323019830020983e-02,
+ -9.999099218556415e-01, 1.342192887199577e-02,
+ -9.999073298511143e-01, 1.361365895029574e-02,
+ -9.999047010828529e-01, 1.380538852806039e-02,
+ -9.999020355509539e-01, 1.399711759824037e-02,
+ -9.998993332555154e-01, 1.418884615378634e-02,
+ -9.998965941966367e-01, 1.438057418764901e-02,
+ -9.998938183744185e-01, 1.457230169277906e-02,
+ -9.998910057889630e-01, 1.476402866212725e-02,
+ -9.998881564403733e-01, 1.495575508864430e-02,
+ -9.998852703287545e-01, 1.514748096528099e-02,
+ -9.998823474542126e-01, 1.533920628498810e-02,
+ -9.998793878168549e-01, 1.553093104071645e-02,
+ -9.998763914167904e-01, 1.572265522541686e-02,
+ -9.998733582541293e-01, 1.591437883204018e-02,
+ -9.998702883289830e-01, 1.610610185353729e-02,
+ -9.998671816414644e-01, 1.629782428285906e-02,
+ -9.998640381916877e-01, 1.648954611295644e-02,
+ -9.998608579797685e-01, 1.668126733678033e-02,
+ -9.998576410058239e-01, 1.687298794728171e-02,
+ -9.998543872699719e-01, 1.706470793741156e-02,
+ -9.998510967723322e-01, 1.725642730012088e-02,
+ -9.998477695130259e-01, 1.744814602836069e-02,
+ -9.998444054921752e-01, 1.763986411508205e-02,
+ -9.998410047099040e-01, 1.783158155323604e-02,
+ -9.998375671663371e-01, 1.802329833577375e-02,
+ -9.998340928616010e-01, 1.821501445564629e-02,
+ -9.998305817958234e-01, 1.840672990580482e-02,
+ -9.998270339691334e-01, 1.859844467920051e-02,
+ -9.998234493816616e-01, 1.879015876878455e-02,
+ -9.998198280335394e-01, 1.898187216750818e-02,
+ -9.998161699249004e-01, 1.917358486832262e-02,
+ -9.998124750558788e-01, 1.936529686417916e-02,
+ -9.998087434266105e-01, 1.955700814802908e-02,
+ -9.998049750372329e-01, 1.974871871282373e-02,
+ -9.998011698878843e-01, 1.994042855151444e-02,
+ -9.997973279787047e-01, 2.013213765705259e-02,
+ -9.997934493098353e-01, 2.032384602238959e-02,
+ -9.997895338814188e-01, 2.051555364047688e-02,
+ -9.997855816935992e-01, 2.070726050426589e-02,
+ -9.997815927465217e-01, 2.089896660670814e-02,
+ -9.997775670403329e-01, 2.109067194075512e-02,
+ -9.997735045751810e-01, 2.128237649935839e-02,
+ -9.997694053512153e-01, 2.147408027546951e-02,
+ -9.997652693685865e-01, 2.166578326204008e-02,
+ -9.997610966274466e-01, 2.185748545202174e-02,
+ -9.997568871279491e-01, 2.204918683836614e-02,
+ -9.997526408702488e-01, 2.224088741402496e-02,
+ -9.997483578545018e-01, 2.243258717194993e-02,
+ -9.997440380808654e-01, 2.262428610509280e-02,
+ -9.997396815494987e-01, 2.281598420640535e-02,
+ -9.997352882605617e-01, 2.300768146883937e-02,
+ -9.997308582142160e-01, 2.319937788534672e-02,
+ -9.997263914106245e-01, 2.339107344887926e-02,
+ -9.997218878499513e-01, 2.358276815238889e-02,
+ -9.997173475323622e-01, 2.377446198882755e-02,
+ -9.997127704580239e-01, 2.396615495114721e-02,
+ -9.997081566271049e-01, 2.415784703229986e-02,
+ -9.997035060397746e-01, 2.434953822523753e-02,
+ -9.996988186962042e-01, 2.454122852291229e-02,
+ -9.996940945965660e-01, 2.473291791827622e-02,
+ -9.996893337410336e-01, 2.492460640428147e-02,
+ -9.996845361297821e-01, 2.511629397388019e-02,
+ -9.996797017629879e-01, 2.530798062002457e-02,
+ -9.996748306408287e-01, 2.549966633566685e-02,
+ -9.996699227634838e-01, 2.569135111375929e-02,
+ -9.996649781311333e-01, 2.588303494725420e-02,
+ -9.996599967439592e-01, 2.607471782910390e-02,
+ -9.996549786021447e-01, 2.626639975226076e-02,
+ -9.996499237058742e-01, 2.645808070967719e-02,
+ -9.996448320553336e-01, 2.664976069430562e-02,
+ -9.996397036507102e-01, 2.684143969909853e-02,
+ -9.996345384921923e-01, 2.703311771700843e-02,
+ -9.996293365799701e-01, 2.722479474098788e-02,
+ -9.996240979142346e-01, 2.741647076398944e-02,
+ -9.996188224951786e-01, 2.760814577896574e-02,
+ -9.996135103229960e-01, 2.779981977886944e-02,
+ -9.996081613978821e-01, 2.799149275665324e-02,
+ -9.996027757200335e-01, 2.818316470526987e-02,
+ -9.995973532896484e-01, 2.837483561767210e-02,
+ -9.995918941069260e-01, 2.856650548681273e-02,
+ -9.995863981720671e-01, 2.875817430564461e-02,
+ -9.995808654852737e-01, 2.894984206712064e-02,
+ -9.995752960467492e-01, 2.914150876419372e-02,
+ -9.995696898566986e-01, 2.933317438981684e-02,
+ -9.995640469153277e-01, 2.952483893694298e-02,
+ -9.995583672228443e-01, 2.971650239852519e-02,
+ -9.995526507794570e-01, 2.990816476751655e-02,
+ -9.995468975853760e-01, 3.009982603687020e-02,
+ -9.995411076408129e-01, 3.029148619953928e-02,
+ -9.995352809459805e-01, 3.048314524847701e-02,
+ -9.995294175010931e-01, 3.067480317663663e-02,
+ -9.995235173063663e-01, 3.086645997697141e-02,
+ -9.995175803620170e-01, 3.105811564243470e-02,
+ -9.995116066682634e-01, 3.124977016597986e-02,
+ -9.995055962253253e-01, 3.144142354056030e-02,
+ -9.994995490334236e-01, 3.163307575912948e-02,
+ -9.994934650927806e-01, 3.182472681464089e-02,
+ -9.994873444036201e-01, 3.201637670004806e-02,
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+ -9.039892931234433e-01, 4.275550934302821e-01,
+ -9.033323684945118e-01, 4.289412920553295e-01,
+ -9.026733182372588e-01, 4.303264813400826e-01,
+ -9.020121439024932e-01, 4.317106580250573e-01,
+ -9.013488470460220e-01, 4.330938188531520e-01,
+ -9.006834292286470e-01, 4.344759605696557e-01,
+ -9.000158920161603e-01, 4.358570799222555e-01,
+ -8.993462369793416e-01, 4.372371736610441e-01,
+ -8.986744656939538e-01, 4.386162385385277e-01,
+ -8.980005797407399e-01, 4.399942713096333e-01,
+ -8.973245807054183e-01, 4.413712687317167e-01,
+ -8.966464701786802e-01, 4.427472275645700e-01,
+ -8.959662497561852e-01, 4.441221445704292e-01,
+ -8.952839210385576e-01, 4.454960165139817e-01,
+ -8.945994856313827e-01, 4.468688401623742e-01,
+ -8.939129451452033e-01, 4.482406122852199e-01,
+ -8.932243011955153e-01, 4.496113296546065e-01,
+ -8.925335554027646e-01, 4.509809890451039e-01,
+ -8.918407093923427e-01, 4.523495872337709e-01,
+ -8.911457647945832e-01, 4.537171210001639e-01,
+ -8.904487232447579e-01, 4.550835871263438e-01,
+ -8.897495863830728e-01, 4.564489823968839e-01,
+ -8.890483558546646e-01, 4.578133035988772e-01,
+ -8.883450333095964e-01, 4.591765475219441e-01,
+ -8.876396204028539e-01, 4.605387109582400e-01,
+ -8.869321187943422e-01, 4.618997907024627e-01,
+ -8.862225301488806e-01, 4.632597835518601e-01,
+ -8.855108561362000e-01, 4.646186863062378e-01,
+ -8.847970984309378e-01, 4.659764957679662e-01,
+ -8.840812587126350e-01, 4.673332087419884e-01,
+ -8.833633386657316e-01, 4.686888220358279e-01,
+ -8.826433399795628e-01, 4.700433324595956e-01,
+ -8.819212643483550e-01, 4.713967368259976e-01,
+ -8.811971134712221e-01, 4.727490319503428e-01,
+ -8.804708890521608e-01, 4.741002146505500e-01,
+ -8.797425928000474e-01, 4.754502817471559e-01,
+ -8.790122264286335e-01, 4.767992300633221e-01,
+ -8.782797916565416e-01, 4.781470564248430e-01,
+ -8.775452902072614e-01, 4.794937576601530e-01,
+ -8.768087238091457e-01, 4.808393306003340e-01,
+ -8.760700941954066e-01, 4.821837720791227e-01,
+ -8.753294031041109e-01, 4.835270789329187e-01,
+ -8.745866522781761e-01, 4.848692480007911e-01,
+ -8.738418434653669e-01, 4.862102761244864e-01,
+ -8.730949784182901e-01, 4.875501601484360e-01,
+ -8.723460588943915e-01, 4.888888969197632e-01,
+ -8.715950866559510e-01, 4.902264832882912e-01,
+ -8.708420634700790e-01, 4.915629161065499e-01,
+ -8.700869911087115e-01, 4.928981922297840e-01,
+ -8.693298713486068e-01, 4.942323085159597e-01,
+ -8.685707059713409e-01, 4.955652618257725e-01,
+ -8.678094967633033e-01, 4.968970490226545e-01,
+ -8.670462455156926e-01, 4.982276669727819e-01,
+ -8.662809540245130e-01, 4.995571125450818e-01,
+ -8.655136240905691e-01, 5.008853826112407e-01,
+ -8.647442575194624e-01, 5.022124740457108e-01,
+ -8.639728561215868e-01, 5.035383837257176e-01,
+ -8.631994217121242e-01, 5.048631085312676e-01,
+ -8.624239561110406e-01, 5.061866453451552e-01,
+ -8.616464611430813e-01, 5.075089910529709e-01,
+ -8.608669386377673e-01, 5.088301425431070e-01,
+ -8.600853904293901e-01, 5.101500967067668e-01,
+ -8.593018183570085e-01, 5.114688504379703e-01,
+ -8.585162242644427e-01, 5.127864006335630e-01,
+ -8.577286100002721e-01, 5.141027441932217e-01,
+ -8.569389774178288e-01, 5.154178780194629e-01,
+ -8.561473283751945e-01, 5.167317990176499e-01,
+ -8.553536647351960e-01, 5.180445040959993e-01,
+ -8.545579883654005e-01, 5.193559901655896e-01,
+ -8.537603011381114e-01, 5.206662541403672e-01,
+ -8.529606049303636e-01, 5.219752929371544e-01,
+ -8.521589016239198e-01, 5.232831034756564e-01,
+ -8.513551931052652e-01, 5.245896826784690e-01,
+ -8.505494812656035e-01, 5.258950274710846e-01,
+ -8.497417680008525e-01, 5.271991347819013e-01,
+ -8.489320552116396e-01, 5.285020015422285e-01,
+ -8.481203448032972e-01, 5.298036246862946e-01,
+ -8.473066386858583e-01, 5.311040011512550e-01,
+ -8.464909387740521e-01, 5.324031278771979e-01,
+ -8.456732469872991e-01, 5.337010018071530e-01,
+ -8.448535652497071e-01, 5.349976198870972e-01,
+ -8.440318954900664e-01, 5.362929790659632e-01,
+ -8.432082396418454e-01, 5.375870762956454e-01,
+ -8.423825996431858e-01, 5.388799085310084e-01,
+ -8.415549774368984e-01, 5.401714727298929e-01,
+ -8.407253749704581e-01, 5.414617658531234e-01,
+ -8.398937941959995e-01, 5.427507848645159e-01,
+ -8.390602370703127e-01, 5.440385267308838e-01,
+ -8.382247055548381e-01, 5.453249884220465e-01,
+ -8.373872016156619e-01, 5.466101669108349e-01,
+ -8.365477272235120e-01, 5.478940591731002e-01,
+ -8.357062843537526e-01, 5.491766621877197e-01,
+ -8.348628749863800e-01, 5.504579729366048e-01,
+ -8.340175011060181e-01, 5.517379884047073e-01,
+ -8.331701647019132e-01, 5.530167055800275e-01,
+ -8.323208677679297e-01, 5.542941214536200e-01,
+ -8.314696123025452e-01, 5.555702330196022e-01,
+ -8.306164003088463e-01, 5.568450372751601e-01,
+ -8.297612337945230e-01, 5.581185312205561e-01,
+ -8.289041147718649e-01, 5.593907118591361e-01,
+ -8.280450452577558e-01, 5.606615761973360e-01,
+ -8.271840272736691e-01, 5.619311212446895e-01,
+ -8.263210628456635e-01, 5.631993440138341e-01,
+ -8.254561540043776e-01, 5.644662415205195e-01,
+ -8.245893027850253e-01, 5.657318107836131e-01,
+ -8.237205112273914e-01, 5.669960488251087e-01,
+ -8.228497813758264e-01, 5.682589526701315e-01,
+ -8.219771152792416e-01, 5.695205193469471e-01,
+ -8.211025149911046e-01, 5.707807458869673e-01,
+ -8.202259825694347e-01, 5.720396293247570e-01,
+ -8.193475200767969e-01, 5.732971666980422e-01,
+ -8.184671295802987e-01, 5.745533550477158e-01,
+ -8.175848131515837e-01, 5.758081914178453e-01,
+ -8.167005728668278e-01, 5.770616728556794e-01,
+ -8.158144108067338e-01, 5.783137964116556e-01,
+ -8.149263290565266e-01, 5.795645591394056e-01,
+ -8.140363297059484e-01, 5.808139580957645e-01,
+ -8.131444148492536e-01, 5.820619903407754e-01,
+ -8.122505865852039e-01, 5.833086529376983e-01,
+ -8.113548470170637e-01, 5.845539429530153e-01,
+ -8.104571982525948e-01, 5.857978574564389e-01,
+ -8.095576424040513e-01, 5.870403935209180e-01,
+ -8.086561815881750e-01, 5.882815482226452e-01,
+ -8.077528179261904e-01, 5.895213186410639e-01,
+ -8.068475535437993e-01, 5.907597018588742e-01,
+ -8.059403905711763e-01, 5.919966949620410e-01,
+ -8.050313311429637e-01, 5.932322950397998e-01,
+ -8.041203773982658e-01, 5.944664991846644e-01,
+ -8.032075314806449e-01, 5.956993044924334e-01,
+ -8.022927955381157e-01, 5.969307080621965e-01,
+ -8.013761717231402e-01, 5.981607069963423e-01,
+ -8.004576621926228e-01, 5.993892984005645e-01,
+ -7.995372691079050e-01, 6.006164793838690e-01,
+ -7.986149946347608e-01, 6.018422470585800e-01,
+ -7.976908409433912e-01, 6.030665985403482e-01,
+ -7.967648102084188e-01, 6.042895309481560e-01,
+ -7.958369046088836e-01, 6.055110414043255e-01,
+ -7.949071263282370e-01, 6.067311270345245e-01,
+ -7.939754775543372e-01, 6.079497849677736e-01,
+ -7.930419604794436e-01, 6.091670123364532e-01,
+ -7.921065773002124e-01, 6.103828062763095e-01,
+ -7.911693302176902e-01, 6.115971639264619e-01,
+ -7.902302214373100e-01, 6.128100824294097e-01,
+ -7.892892531688857e-01, 6.140215589310384e-01,
+ -7.883464276266063e-01, 6.152315905806268e-01,
+ -7.874017470290314e-01, 6.164401745308536e-01,
+ -7.864552135990858e-01, 6.176473079378039e-01,
+ -7.855068295640539e-01, 6.188529879609763e-01,
+ -7.845565971555752e-01, 6.200572117632891e-01,
+ -7.836045186096382e-01, 6.212599765110876e-01,
+ -7.826505961665757e-01, 6.224612793741500e-01,
+ -7.816948320710594e-01, 6.236611175256945e-01,
+ -7.807372285720945e-01, 6.248594881423863e-01,
+ -7.797777879230146e-01, 6.260563884043435e-01,
+ -7.788165123814760e-01, 6.272518154951441e-01,
+ -7.778534042094531e-01, 6.284457666018327e-01,
+ -7.768884656732324e-01, 6.296382389149270e-01,
+ -7.759216990434077e-01, 6.308292296284245e-01,
+ -7.749531065948739e-01, 6.320187359398091e-01,
+ -7.739826906068229e-01, 6.332067550500572e-01,
+ -7.730104533627370e-01, 6.343932841636455e-01,
+ -7.720363971503845e-01, 6.355783204885561e-01,
+ -7.710605242618138e-01, 6.367618612362842e-01,
+ -7.700828369933479e-01, 6.379439036218440e-01,
+ -7.691033376455797e-01, 6.391244448637757e-01,
+ -7.681220285233654e-01, 6.403034821841517e-01,
+ -7.671389119358204e-01, 6.414810128085832e-01,
+ -7.661539901963129e-01, 6.426570339662269e-01,
+ -7.651672656224590e-01, 6.438315428897914e-01,
+ -7.641787405361167e-01, 6.450045368155439e-01,
+ -7.631884172633813e-01, 6.461760129833163e-01,
+ -7.621962981345789e-01, 6.473459686365121e-01,
+ -7.612023854842618e-01, 6.485144010221124e-01,
+ -7.602066816512024e-01, 6.496813073906832e-01,
+ -7.592091889783881e-01, 6.508466849963809e-01,
+ -7.582099098130153e-01, 6.520105310969595e-01,
+ -7.572088465064846e-01, 6.531728429537768e-01,
+ -7.562060014143945e-01, 6.543336178318004e-01,
+ -7.552013768965365e-01, 6.554928529996153e-01,
+ -7.541949753168892e-01, 6.566505457294289e-01,
+ -7.531867990436125e-01, 6.578066932970786e-01,
+ -7.521768504490428e-01, 6.589612929820373e-01,
+ -7.511651319096865e-01, 6.601143420674205e-01,
+ -7.501516458062151e-01, 6.612658378399923e-01,
+ -7.491363945234594e-01, 6.624157775901718e-01,
+ -7.481193804504036e-01, 6.635641586120398e-01,
+ -7.471006059801801e-01, 6.647109782033448e-01,
+ -7.460800735100638e-01, 6.658562336655097e-01,
+ -7.450577854414661e-01, 6.669999223036375e-01,
+ -7.440337441799293e-01, 6.681420414265185e-01,
+ -7.430079521351217e-01, 6.692825883466360e-01,
+ -7.419804117208311e-01, 6.704215603801731e-01,
+ -7.409511253549591e-01, 6.715589548470183e-01,
+ -7.399200954595162e-01, 6.726947690707729e-01,
+ -7.388873244606151e-01, 6.738290003787560e-01,
+ -7.378528147884660e-01, 6.749616461020119e-01,
+ -7.368165688773699e-01, 6.760927035753159e-01,
+ -7.357785891657136e-01, 6.772221701371803e-01,
+ -7.347388780959635e-01, 6.783500431298615e-01,
+ -7.336974381146604e-01, 6.794763198993650e-01,
+ -7.326542716724128e-01, 6.806009977954530e-01,
+ -7.316093812238926e-01, 6.817240741716497e-01,
+ -7.305627692278276e-01, 6.828455463852481e-01,
+ -7.295144381469970e-01, 6.839654117973154e-01,
+ -7.284643904482252e-01, 6.850836677727004e-01,
+ -7.274126286023758e-01, 6.862003116800386e-01,
+ -7.263591550843460e-01, 6.873153408917590e-01,
+ -7.253039723730608e-01, 6.884287527840904e-01,
+ -7.242470829514670e-01, 6.895405447370668e-01,
+ -7.231884893065275e-01, 6.906507141345346e-01,
+ -7.221281939292153e-01, 6.917592583641577e-01,
+ -7.210661993145081e-01, 6.928661748174246e-01,
+ -7.200025079613817e-01, 6.939714608896540e-01,
+ -7.189371223728045e-01, 6.950751139800009e-01,
+ -7.178700450557317e-01, 6.961771314914630e-01,
+ -7.168012785210995e-01, 6.972775108308865e-01,
+ -7.157308252838186e-01, 6.983762494089729e-01,
+ -7.146586878627691e-01, 6.994733446402838e-01,
+ -7.135848687807936e-01, 7.005687939432483e-01,
+ -7.125093705646923e-01, 7.016625947401685e-01,
+ -7.114321957452164e-01, 7.027547444572253e-01,
+ -7.103533468570624e-01, 7.038452405244849e-01,
+ -7.092728264388657e-01, 7.049340803759049e-01,
+ -7.081906370331954e-01, 7.060212614493397e-01,
+ -7.071067811865476e-01, 7.071067811865475e-01,
+#else
+#error Unsupported twiddle table size
+#endif
+};
diff --git a/dl/armSP_FFT_S32TwiddleTable.c b/dl/armSP_FFT_S32TwiddleTable.c
new file mode 100644
index 0000000..25807e0
--- /dev/null
+++ b/dl/armSP_FFT_S32TwiddleTable.c
@@ -0,0 +1,556 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ *
+ * This file was originally licensed as follows. It has been
+ * relicensed with permission from the copyright holders.
+ */
+
+/**
+ *
+ * File Name: armSP_FFT_S32TwiddleTable.c
+ * OpenMAX DL: v1.0.2
+ * Last Modified Revision: 6781
+ * Last Modified Date: Wed, 25 Jul 2007
+ *
+ * (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+ *
+ *
+ *
+ * Description:
+ * Twiddle table for Forward FFT in Q31 format.
+ * It contains complex pairs [-cos (W * i), -sin (W * i)] where W = -2*PI/N
+ * and 0<= i<= N/8. N is the max size of the FFT. Here N = 2^12.
+ * Values for N/8 < i < N are generated in the FFTInit function using the
+ * symmetries of cos and sine.
+ *
+ * NOTE: The values are stored negated. This is to represent '1' which cannot be otherwise
+ * represented as Q31 in 32 bits.
+**/
+
+#include "omxtypes.h"
+
+
+const OMX_S32 armSP_FFT_S32TwiddleTable[1026] ={
+
+0x80000000, 0x0,
+0x800009df, 0x3243f5,
+0x8000277a, 0x6487e3,
+0x800058d4, 0x96cbc1,
+0x80009dea, 0xc90f88,
+0x8000f6bd, 0xfb5330,
+0x8001634e, 0x12d96b1,
+0x8001e39b, 0x15fda03,
+0x800277a6, 0x1921d20,
+0x80031f6d, 0x1c45ffe,
+0x8003daf1, 0x1f6a297,
+0x8004aa32, 0x228e4e2,
+0x80058d2f, 0x25b26d7,
+0x800683e8, 0x28d6870,
+0x80078e5e, 0x2bfa9a4,
+0x8008ac90, 0x2f1ea6c,
+0x8009de7e, 0x3242abf,
+0x800b2427, 0x3566a96,
+0x800c7d8c, 0x388a9ea,
+0x800deaad, 0x3bae8b2,
+0x800f6b88, 0x3ed26e6,
+0x8011001f, 0x41f6480,
+0x8012a86f, 0x451a177,
+0x8014647b, 0x483ddc3,
+0x80163440, 0x4b6195d,
+0x801817bf, 0x4e8543e,
+0x801a0ef8, 0x51a8e5c,
+0x801c19ea, 0x54cc7b1,
+0x801e3895, 0x57f0035,
+0x80206af8, 0x5b137df,
+0x8022b114, 0x5e36ea9,
+0x80250ae7, 0x615a48b,
+0x80277872, 0x647d97c,
+0x8029f9b4, 0x67a0d76,
+0x802c8ead, 0x6ac406f,
+0x802f375d, 0x6de7262,
+0x8031f3c2, 0x710a345,
+0x8034c3dd, 0x742d311,
+0x8037a7ac, 0x77501be,
+0x803a9f31, 0x7a72f45,
+0x803daa6a, 0x7d95b9e,
+0x8040c956, 0x80b86c2,
+0x8043fbf6, 0x83db0a7,
+0x80474248, 0x86fd947,
+0x804a9c4d, 0x8a2009a,
+0x804e0a04, 0x8d42699,
+0x80518b6b, 0x9064b3a,
+0x80552084, 0x9386e78,
+0x8058c94c, 0x96a9049,
+0x805c85c4, 0x99cb0a7,
+0x806055eb, 0x9cecf89,
+0x806439c0, 0xa00ece8,
+0x80683143, 0xa3308bd,
+0x806c3c74, 0xa6522fe,
+0x80705b50, 0xa973ba5,
+0x80748dd9, 0xac952aa,
+0x8078d40d, 0xafb6805,
+0x807d2dec, 0xb2d7baf,
+0x80819b74, 0xb5f8d9f,
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+0xa306a9c8, 0x57f9f2f8,
+0xa3293d4b, 0x581e6ef1,
+0xa34bdf20, 0x5842dd54,
+0xa36e8f41, 0x58673e1b,
+0xa3914da8, 0x588b9140,
+0xa3b41a50, 0x58afd6bd,
+0xa3d6f534, 0x58d40e8c,
+0xa3f9de4e, 0x58f838a9,
+0xa41cd599, 0x591c550e,
+0xa43fdb10, 0x594063b5,
+0xa462eeac, 0x59646498,
+0xa486106a, 0x598857b2,
+0xa4a94043, 0x59ac3cfd,
+0xa4cc7e32, 0x59d01475,
+0xa4efca31, 0x59f3de12,
+0xa513243b, 0x5a1799d1,
+0xa5368c4b, 0x5a3b47ab,
+0xa55a025b, 0x5a5ee79a,
+0xa57d8666, 0x5a82799a
+};
+
+/*End of File*/
diff --git a/dl/arm_fft.gyp b/dl/arm_fft.gyp
new file mode 100644
index 0000000..fb7386f
--- /dev/null
+++ b/dl/arm_fft.gyp
@@ -0,0 +1,80 @@
+# Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+#
+# Use of this source code is governed by a BSD-style license
+# that can be found in the LICENSE file in the root of the source
+# tree. An additional intellectual property rights grant can be found
+# in the file PATENTS. All contributing project authors may
+# be found in the AUTHORS file in the root of the source tree.
+
+{
+ 'variables' : {
+ # Override this value to build with small float FFT tables
+ 'big_float_fft%' : 1,
+ },
+ 'targets': [
+ {
+ 'target_name': 'arm_fft',
+ 'type': 'static_library',
+ 'sources': [
+ 'armCOMM.h',
+ 'armCOMM_s.h',
+ 'armOMX.h',
+ 'armSP.h',
+ 'omxSP.h',
+ 'omxtypes.h',
+ 'omxtypes_s.h',
+ # Complex 32-bit fixed-point FFT.
+ 'armSP_FFT_S32TwiddleTable.c',
+ 'omxSP_FFTGetBufSize_C_SC32.c',
+ 'omxSP_FFTInit_C_SC32.c',
+ 'armSP_FFT_CToC_SC32_Radix2_fs_unsafe_s.S',
+ 'armSP_FFT_CToC_SC32_Radix2_ls_unsafe_s.S',
+ 'armSP_FFT_CToC_SC32_Radix2_fs_unsafe_s.S',
+ 'armSP_FFT_CToC_SC32_Radix4_fs_unsafe_s.S',
+ 'armSP_FFT_CToC_SC32_Radix4_ls_unsafe_s.S',
+ 'armSP_FFT_CToC_SC32_Radix2_unsafe_s.S',
+ 'armSP_FFT_CToC_SC32_Radix4_unsafe_s.S',
+ 'armSP_FFT_CToC_SC32_Radix8_fs_unsafe_s.S',
+ 'omxSP_FFTInv_CToC_SC32_Sfs_s.S',
+ 'omxSP_FFTFwd_CToC_SC32_Sfs_s.S',
+ # Real 32-bit fixed-point FFT
+ 'armSP_FFTInv_CCSToR_S32_preTwiddleRadix2_unsafe_s.S',
+ 'omxSP_FFTFwd_RToCCS_S32_Sfs_s.S',
+ 'omxSP_FFTGetBufSize_R_S32.c',
+ 'omxSP_FFTInit_R_S32.c',
+ 'omxSP_FFTInv_CCSToR_S32_Sfs_s.S',
+ # Real 16-bit fixed-point FFT
+ 'omxSP_FFTFwd_RToCCS_S16S32_Sfs_s.S',
+ 'omxSP_FFTGetBufSize_R_S16S32.c',
+ 'omxSP_FFTInit_R_S16S32.c',
+ 'omxSP_FFTInv_CCSToR_S32S16_Sfs_s.S',
+ # Complex floating-point FFT
+ 'armSP_FFT_CToC_FC32_Radix2_fs_unsafe_s.S',
+ 'armSP_FFT_CToC_FC32_Radix2_ls_unsafe_s.S',
+ 'armSP_FFT_CToC_FC32_Radix2_fs_unsafe_s.S',
+ 'armSP_FFT_CToC_FC32_Radix4_fs_unsafe_s.S',
+ 'armSP_FFT_CToC_FC32_Radix4_ls_unsafe_s.S',
+ 'armSP_FFT_CToC_FC32_Radix2_unsafe_s.S',
+ 'armSP_FFT_CToC_FC32_Radix4_unsafe_s.S',
+ 'armSP_FFT_CToC_FC32_Radix8_fs_unsafe_s.S',
+ 'armSP_FFT_F32TwiddleTable.c',
+ 'omxSP_FFTGetBufSize_C_FC32.c',
+ 'omxSP_FFTInit_C_FC32.c',
+ 'omxSP_FFTInv_CToC_FC32_Sfs_s.S',
+ 'omxSP_FFTFwd_CToC_FC32_Sfs_s.S',
+ # Real floating-point FFT
+ 'armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_unsafe_s.S',
+ 'omxSP_FFTFwd_RToCCS_F32_Sfs_s.S',
+ 'omxSP_FFTGetBufSize_R_F32.c',
+ 'omxSP_FFTInit_R_F32.c',
+ 'omxSP_FFTInv_CCSToR_F32_Sfs_s.S',
+ ],
+ 'conditions' : [
+ ['big_float_fft == 1', {
+ 'defines': [
+ 'BIG_FFT_TABLE',
+ ],
+ }],
+ ],
+ }]
+}
diff --git a/dl/omxSP.h b/dl/omxSP.h
new file mode 100644
index 0000000..b0ad9cb
--- /dev/null
+++ b/dl/omxSP.h
@@ -0,0 +1,2299 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ *
+ * This file was originally licensed as follows. It has been
+ * relicensed with permission from the copyright holders.
+ */
+
+/**
+ * File: omxSP.h
+ * Brief: OpenMAX DL v1.0.2 - Signal Processing library
+ *
+ * Copyright 2005-2008 The Khronos Group Inc. All Rights Reserved.
+ *
+ * These materials are protected by copyright laws and contain material
+ * proprietary to the Khronos Group, Inc. You may use these materials
+ * for implementing Khronos specifications, without altering or removing
+ * any trademark, copyright or other notice from the specification.
+ *
+ * Khronos Group makes no, and expressly disclaims any, representations
+ * or warranties, express or implied, regarding these materials, including,
+ * without limitation, any implied warranties of merchantability or fitness
+ * for a particular purpose or non-infringement of any intellectual property.
+ * Khronos Group makes no, and expressly disclaims any, warranties, express
+ * or implied, regarding the correctness, accuracy, completeness, timeliness,
+ * and reliability of these materials.
+ *
+ * Under no circumstances will the Khronos Group, or any of its Promoters,
+ * Contributors or Members or their respective partners, officers, directors,
+ * employees, agents or representatives be liable for any damages, whether
+ * direct, indirect, special or consequential damages for lost revenues,
+ * lost profits, or otherwise, arising from or in connection with these
+ * materials.
+ *
+ * Khronos and OpenMAX are trademarks of the Khronos Group Inc.
+ *
+ */
+
+/* *****************************************************************************************/
+
+#ifndef _OMXSP_H_
+#define _OMXSP_H_
+
+#include "omxtypes.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/* 2.1 Vendor-Specific FFT Data Structures */
+ typedef void OMXFFTSpec_C_SC16;
+ typedef void OMXFFTSpec_C_SC32;
+ typedef void OMXFFTSpec_R_S16S32;
+ typedef void OMXFFTSpec_R_S32;
+ typedef void OMXFFTSpec_R_F32;
+ typedef void OMXFFTSpec_C_FC32;
+
+/**
+ * Function: omxSP_Copy_S16 (2.2.1.1.1)
+ *
+ * Description:
+ * Copies the len elements of the vector pointed to by pSrcinto the len
+ * elements of the vector pointed to by pDst. That is:
+ * pDst[i] = pSrc[i], for (i=0, 1, ..., len-1)
+ *
+ * Input Arguments:
+ *
+ * pSrc - pointer to the source vector
+ * len - number of elements contained in the source and destination vectors
+ *
+ * Output Arguments:
+ *
+ * pDst - pointer to the destination vector
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments detected; returned if one or more of
+ * the following is true:
+ * - pSrc or pDst is NULL
+ * - len < 0
+ *
+ */
+OMXResult omxSP_Copy_S16 (
+ const OMX_S16 *pSrc,
+ OMX_S16 *pDst,
+ OMX_INT len
+);
+
+
+
+/**
+ * Function: omxSP_DotProd_S16 (2.2.2.1.1)
+ *
+ * Description:
+ * Calculates the dot product of the two input vectors. This function does
+ * not perform scaling. The internal accumulator width must be at least 32
+ * bits. If any of the partially accumulated values exceeds the range of a
+ * signed 32-bit integer then the result is undefined.
+ *
+ * Input Arguments:
+ *
+ * pSrc1 - pointer to the first input vector; must be aligned on an 8-byte
+ * boundary.
+ * pSrc2 - pointer to the second input vector; must be aligned on an 8-byte
+ * boundary.
+ * len - length of the vectors in pSrc1 and pSrc2
+ *
+ * Output Arguments:
+ *
+ * Return Value:
+ *
+ * The dot product result Note: this function returns the actual result
+ * rather than the standard OMXError.
+ *
+ */
+OMX_S32 omxSP_DotProd_S16 (
+ const OMX_S16 *pSrc1,
+ const OMX_S16 *pSrc2,
+ OMX_INT len
+);
+
+
+
+/**
+ * Function: omxSP_DotProd_S16_Sfs (2.2.2.1.2)
+ *
+ * Description:
+ * Calculates the dot product of the two input signals with output scaling
+ * and saturation, i.e., the result is multiplied by two to the power of the
+ * negative (-)scalefactor (scaled) prior to return. The result is saturated
+ * with rounding if the scaling operation produces a value outside the range
+ * of a signed 32-bit integer. Rounding behavior is defined in section 1.6.7
+ * Integer Scaling and Rounding Conventions. The internal accumulator width
+ * must be at least 32 bits. The result is undefined if any of the partially
+ * accumulated values exceeds the range of a signed 32-bit integer.
+ *
+ * Input Arguments:
+ *
+ * pSrc1 - pointer to the first input vector; must be aligned on an 8-byte
+ * boundary.
+ * pSrc2 - pointer to the second input vector; must be aligned on an 8-byte
+ * boundary.
+ * len - length of the vectors in pSrc1 and pSrc2
+ * scaleFactor - integer scalefactor
+ *
+ * Output Arguments:
+ *
+ * Return Value:
+ *
+ * The dot product result Note: This function returns the actual result
+ * rather than the standard OMXError.
+ *
+ */
+OMX_S32 omxSP_DotProd_S16_Sfs (
+ const OMX_S16 *pSrc1,
+ const OMX_S16 *pSrc2,
+ OMX_INT len,
+ OMX_INT scaleFactor
+);
+
+
+
+/**
+ * Function: omxSP_BlockExp_S16 (2.2.2.2.2)
+ *
+ * Description:
+ * Block exponent calculation for 16-bit and 32-bit signals (count leading
+ * sign bits). These functions compute the number of extra sign bits of all
+ * values in the 16-bit and 32-bit input vector pSrc and return the minimum
+ * sign bit count. This is also the maximum shift value that could be used in
+ * scaling the block of data. The functions BlockExp_S16 and
+ * BlockExp_S32 return the values 15 and 31, respectively, for input vectors in
+ * which all entries are equal to zero.
+ *
+ * Note: These functions differ from other DL functions by not returning the
+ * standard OMXError but the actual result.
+ *
+ * Input Arguments:
+ *
+ * pSrc - pointer to the input vector
+ * len - number of elements contained in the input and output
+ * vectors (0 < len < 65536)
+ *
+ * Output Arguments:
+ *
+ * none
+ *
+ * Return Value:
+ *
+ * Maximum exponent that may be used in scaling
+ *
+ */
+OMX_INT omxSP_BlockExp_S16 (
+ const OMX_S16 *pSrc,
+ OMX_INT len
+);
+
+
+
+/**
+ * Function: omxSP_BlockExp_S32 (2.2.2.2.2)
+ *
+ * Description:
+ * Block exponent calculation for 16-bit and 32-bit signals (count leading
+ * sign bits). These functions compute the number of extra sign bits of all
+ * values in the 16-bit and 32-bit input vector pSrc and return the minimum
+ * sign bit count. This is also the maximum shift value that could be used in
+ * scaling the block of data. The functions BlockExp_S16 and
+ * BlockExp_S32 return the values 15 and 31, respectively, for input vectors in
+ * which all entries are equal to zero.
+ *
+ * Note: These functions differ from other DL functions by not returning the
+ * standard OMXError but the actual result.
+ *
+ * Input Arguments:
+ *
+ * pSrc - pointer to the input vector
+ * len - number of elements contained in the input and output
+ * vectors (0 < len < 65536)
+ *
+ * Output Arguments:
+ *
+ * none
+ *
+ * Return Value:
+ *
+ * Maximum exponent that may be used in scaling
+ *
+ */
+OMX_INT omxSP_BlockExp_S32 (
+ const OMX_S32 *pSrc,
+ OMX_INT len
+);
+
+
+
+/**
+ * Function: omxSP_FIR_Direct_S16 (2.2.3.1.1)
+ *
+ * Description:
+ * Block FIR filtering for 16-bit data type. This function applies the
+ * FIR filter defined by the coefficient vector pTapsQ15 to a vector of
+ * input data. The result is saturated with rounding if the operation
+ * produces a value outside the range of a signed 16-bit integer.
+ * Rounding behavior is defined in:
+ * section 1.6.7 "Integer Scaling and Rounding Conventions".
+ * The internal accumulator width must be at least 32 bits. The result
+ * is undefined if any of the partially accumulated values exceeds the
+ * range of a signed 32-bit integer.
+ *
+ *
+ * Input Arguments:
+ *
+ * pSrc - pointer to the vector of input samples to which the
+ * filter is applied
+ * sampLen - the number of samples contained in the input and output
+ * vectors
+ * pTapsQ15 - pointer to the vector that contains the filter coefficients,
+ * represented in Q0.15 format (defined in section 1.6.5). Given
+ * that:
+ * -32768 = pTapsQ15(k) < 32768,
+ * 0 = k <tapsLen,
+ * the range on the actual filter coefficients is -1 = bK <1, and
+ * therefore coefficient normalization may be required during the
+ * filter design process.
+ * tapsLen - the number of taps, or, equivalently, the filter order + 1
+ * pDelayLine - pointer to the 2.tapsLen -element filter memory buffer
+ * (state). The user is responsible for allocation, initialization,
+ * and de-allocation. The filter memory elements are initialized to
+ * zero in most applications.
+ * pDelayLineIndex - pointer to the filter memory index that is maintained
+ * internally by the function. The user should initialize the value
+ * of this index to zero.
+ *
+ * Output Arguments:
+ *
+ * pDst - pointer to the vector of filtered output samples
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments; returned if one or more of the
+ * following is true:
+ * - One or more of the following pointers is NULL:
+ * - pSrc,
+ * - pDst,
+ * - pSrcDst,
+ * - pTapsQ15,
+ * - pDelayLine, or
+ * - pDelayLineIndex
+ * - samplen < 0
+ * - tapslen < 1
+ * - *pDelayLineIndex < 0 or *pDelayLineIndex >= (2 * tapslen).
+ *
+ */
+OMXResult omxSP_FIR_Direct_S16 (
+ const OMX_S16 *pSrc,
+ OMX_S16 *pDst,
+ OMX_INT sampLen,
+ const OMX_S16 *pTapsQ15,
+ OMX_INT tapsLen,
+ OMX_S16 *pDelayLine,
+ OMX_INT *pDelayLineIndex
+);
+
+
+
+/**
+ * Function: omxSP_FIR_Direct_S16_I (2.2.3.1.1)
+ *
+ * Description:
+ * Block FIR filtering for 16-bit data type. This function applies the
+ * FIR filter defined by the coefficient vector pTapsQ15 to a vector of
+ * input data. The result is saturated with rounding if the operation
+ * produces a value outside the range of a signed 16-bit integer.
+ * Rounding behavior is defined in:
+ * section 1.6.7 "Integer Scaling and Rounding Conventions".
+ * The internal accumulator width must be at least 32 bits. The result
+ * is undefined if any of the partially accumulated values exceeds the
+ * range of a signed 32-bit integer.
+ *
+ * Input Arguments:
+ *
+ * pSrcDst - pointer to the vector of input samples to which the
+ * filter is applied
+ * sampLen - the number of samples contained in the input and output
+ * vectors
+ * pTapsQ15 - pointer to the vector that contains the filter coefficients,
+ * represented in Q0.15 format (defined in section 1.6.5). Given
+ * that:
+ * -32768 = pTapsQ15(k) < 32768,
+ * 0 = k <tapsLen,
+ * the range on the actual filter coefficients is -1 = bK <1, and
+ * therefore coefficient normalization may be required during the
+ * filter design process.
+ * tapsLen - the number of taps, or, equivalently, the filter order + 1
+ * pDelayLine - pointer to the 2.tapsLen -element filter memory buffer
+ * (state). The user is responsible for allocation, initialization,
+ * and de-allocation. The filter memory elements are initialized to
+ * zero in most applications.
+ * pDelayLineIndex - pointer to the filter memory index that is maintained
+ * internally by the function. The user should initialize the value
+ * of this index to zero.
+ *
+ * Output Arguments:
+ *
+ * pSrcDst - pointer to the vector of filtered output samples
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments; returned if one or more of the
+ * following is true:
+ * - One or more of the following pointers is NULL:
+ * - pSrc,
+ * - pDst,
+ * - pSrcDst,
+ * - pTapsQ15,
+ * - pDelayLine, or
+ * - pDelayLineIndex
+ * - samplen < 0
+ * - tapslen < 1
+ * - *pDelayLineIndex < 0 or *pDelayLineIndex >= (2 * tapslen).
+ *
+ */
+OMXResult omxSP_FIR_Direct_S16_I (
+ OMX_S16 *pSrcDst,
+ OMX_INT sampLen,
+ const OMX_S16 *pTapsQ15,
+ OMX_INT tapsLen,
+ OMX_S16 *pDelayLine,
+ OMX_INT *pDelayLineIndex
+);
+
+
+
+/**
+ * Function: omxSP_FIR_Direct_S16_Sfs (2.2.3.1.1)
+ *
+ * Description:
+ * Block FIR filtering for 16-bit data type. This function applies
+ * the FIR filter defined by the coefficient vector pTapsQ15 to a
+ * vector of input data. The output is multiplied by 2 to the negative
+ * power of scalefactor (i.e., 2^-scalefactor) before returning to the caller.
+ * Scaling and rounding conventions are defined in section 1.6.7.
+ * The internal accumulator width must be at least 32 bits.
+ * The result is undefined if any of the partially accumulated
+ * values exceeds the range of a signed 32-bit integer.
+ *
+ * Input Arguments:
+ *
+ * pSrc - pointer to the vector of input samples to which the
+ * filter is applied
+ * sampLen - the number of samples contained in the input and output
+ * vectors
+ * pTapsQ15 - pointer to the vector that contains the filter coefficients,
+ * represented in Q0.15 format (defined in section 1.6.5). Given
+ * that:
+ * -32768 = pTapsQ15(k) < 32768,
+ * 0 = k <tapsLen,
+ * the range on the actual filter coefficients is -1 = bK <1, and
+ * therefore coefficient normalization may be required during the
+ * filter design process.
+ * tapsLen - the number of taps, or, equivalently, the filter order + 1
+ * pDelayLine - pointer to the 2.tapsLen -element filter memory buffer
+ * (state). The user is responsible for allocation, initialization,
+ * and de-allocation. The filter memory elements are initialized to
+ * zero in most applications.
+ * pDelayLineIndex - pointer to the filter memory index that is maintained
+ * internally by the function. The user should initialize the value
+ * of this index to zero.
+ * scaleFactor - saturation fixed scalefactor
+ *
+ * Output Arguments:
+ *
+ * pDst - pointer to the vector of filtered output samples
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments; returned if one or more of the
+ * following is true:
+ * - One or more of the following pointers is NULL:
+ * - pSrc,
+ * - pDst,
+ * - pSrcDst,
+ * - pTapsQ15,
+ * - pDelayLine, or
+ * - pDelayLineIndex
+ * - samplen < 0
+ * - tapslen < 1
+ * - scaleFactor < 0
+ * - *pDelayLineIndex < 0 or *pDelayLineIndex >= (2 * tapslen).
+ *
+ */
+OMXResult omxSP_FIR_Direct_S16_Sfs (
+ const OMX_S16 *pSrc,
+ OMX_S16 *pDst,
+ OMX_INT sampLen,
+ const OMX_S16 *pTapsQ15,
+ OMX_INT tapsLen,
+ OMX_S16 *pDelayLine,
+ OMX_INT *pDelayLineIndex,
+ OMX_INT scaleFactor
+);
+
+
+
+/**
+ * Function: omxSP_FIR_Direct_S16_ISfs (2.2.3.1.1)
+ *
+ * Description:
+ * Block FIR filtering for 16-bit data type. This function applies
+ * the FIR filter defined by the coefficient vector pTapsQ15 to a
+ * vector of input data. The output is multiplied by 2 to the negative
+ * power of scalefactor (i.e., 2^-scalefactor) before returning to the caller.
+ * Scaling and rounding conventions are defined in section 1.6.7.
+ * The internal accumulator width must be at least 32 bits.
+ * The result is undefined if any of the partially accumulated
+ * values exceeds the range of a signed 32-bit integer.
+ *
+ * Input Arguments:
+ *
+ * pSrcDst - pointer to the vector of input samples to which the
+ * filter is applied
+ * sampLen - the number of samples contained in the input and output
+ * vectors
+ * pTapsQ15 - pointer to the vector that contains the filter coefficients,
+ * represented in Q0.15 format (defined in section 1.6.5). Given
+ * that:
+ * -32768 = pTapsQ15(k) < 32768,
+ * 0 = k <tapsLen,
+ * the range on the actual filter coefficients is -1 = bK <1, and
+ * therefore coefficient normalization may be required during the
+ * filter design process.
+ * tapsLen - the number of taps, or, equivalently, the filter order + 1
+ * pDelayLine - pointer to the 2.tapsLen -element filter memory buffer
+ * (state). The user is responsible for allocation, initialization,
+ * and de-allocation. The filter memory elements are initialized to
+ * zero in most applications.
+ * pDelayLineIndex - pointer to the filter memory index that is maintained
+ * internally by the function. The user should initialize the value
+ * of this index to zero.
+ * scaleFactor - saturation fixed scalefactor
+ *
+ * Output Arguments:
+ *
+ * pSrcDst - pointer to the vector of filtered output samples
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments; returned if one or more of the
+ * following is true:
+ * - One or more of the following pointers is NULL:
+ * - pSrc,
+ * - pDst,
+ * - pSrcDst,
+ * - pTapsQ15,
+ * - pDelayLine, or
+ * - pDelayLineIndex
+ * - samplen < 0
+ * - tapslen < 1
+ * - scaleFactor < 0
+ * - *pDelayLineIndex < 0 or *pDelayLineIndex >= (2 * tapslen).
+ *
+ */
+OMXResult omxSP_FIR_Direct_S16_ISfs (
+ OMX_S16 *pSrcDst,
+ OMX_INT sampLen,
+ const OMX_S16 *pTapsQ15,
+ OMX_INT tapsLen,
+ OMX_S16 *pDelayLine,
+ OMX_INT *pDelayLineIndex,
+ OMX_INT scaleFactor
+);
+
+
+
+/**
+ * Function: omxSP_FIROne_Direct_S16 (2.2.3.1.2)
+ *
+ * Description:
+ * Single-sample FIR filtering for 16-bit data type. These functions apply
+ * the FIR filter defined by the coefficient vector pTapsQ15 to a single
+ * sample of input data. The result is saturated with rounding if the
+ * operation produces a value outside the range of a signed 16-bit integer.
+ * Rounding behavior is defined in:
+ * section 1.6.7 "Integer Scaling and Rounding Conventions".
+ * The internal accumulator width must be at least 32 bits. The result is
+ * undefined if any of the partially accumulated values exceeds the range of a
+ * signed 32-bit integer.
+ *
+ * Input Arguments:
+ *
+ * val - the single input sample to which the filter is
+ * applied.
+ * pTapsQ15 - pointer to the vector that contains the filter coefficients,
+ * represented in Q0.15 format (as defined in section 1.6.5). Given
+ * that:
+ * -32768 = pTapsQ15(k) < 32768,
+ * 0 = k < tapsLen,
+ * the range on the actual filter coefficients is -1 = bK <1, and
+ * therefore coefficient normalization may be required during the
+ * filter design process.
+ * tapsLen - the number of taps, or, equivalently, the filter order + 1
+ * pDelayLine - pointer to the 2.tapsLen -element filter memory buffer
+ * (state). The user is responsible for allocation, initialization,
+ * and de-allocation. The filter memory elements are initialized to
+ * zero in most applications.
+ * pDelayLineIndex - pointer to the filter memory index that is maintained
+ * internally by the function. The user should initialize the value
+ * of this index to zero.
+ *
+ * Output Arguments:
+ *
+ * pResult - pointer to the filtered output sample
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments; returned if one or more of the
+ * following is true:
+ * - One or more of the following pointers is NULL:
+ * - pResult,
+ * - pTapsQ15,
+ * - pDelayLine, or
+ * - pDelayLineIndex
+ * - tapslen < 1
+ * - *pDelayLineIndex < 0 or *pDelayLineIndex >= (2 * tapslen)
+ *
+ */
+OMXResult omxSP_FIROne_Direct_S16 (
+ OMX_S16 val,
+ OMX_S16 *pResult,
+ const OMX_S16 *pTapsQ15,
+ OMX_INT tapsLen,
+ OMX_S16 *pDelayLine,
+ OMX_INT *pDelayLineIndex
+);
+
+
+
+/**
+ * Function: omxSP_FIROne_Direct_S16_I (2.2.3.1.2)
+ *
+ * Description:
+ * Single-sample FIR filtering for 16-bit data type. These functions apply
+ * the FIR filter defined by the coefficient vector pTapsQ15 to a single
+ * sample of input data. The result is saturated with rounding if the
+ * operation produces a value outside the range of a signed 16-bit integer.
+ * Rounding behavior is defined in:
+ * section 1.6.7 "Integer Scaling and Rounding Conventions".
+ * The internal accumulator width must be at least 32 bits. The result is
+ * undefined if any of the partially accumulated values exceeds the range of a
+ * signed 32-bit integer.
+ *
+ * Input Arguments:
+ *
+ * pValResult - pointer to the single input sample to which the filter is
+ * applied.
+ * pTapsQ15 - pointer to the vector that contains the filter coefficients,
+ * represented in Q0.15 format (as defined in section 1.6.5). Given
+ * that:
+ * -32768 = pTapsQ15(k) < 32768,
+ * 0 = k < tapsLen,
+ * the range on the actual filter coefficients is -1 = bK <1, and
+ * therefore coefficient normalization may be required during the
+ * filter design process.
+ * tapsLen - the number of taps, or, equivalently, the filter order + 1
+ * pDelayLine - pointer to the 2.tapsLen -element filter memory buffer
+ * (state). The user is responsible for allocation, initialization,
+ * and de-allocation. The filter memory elements are initialized to
+ * zero in most applications.
+ * pDelayLineIndex - pointer to the filter memory index that is maintained
+ * internally by the function. The user should initialize the value
+ * of this index to zero.
+ *
+ * Output Arguments:
+ *
+ * pValResult - pointer to the filtered output sample
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments; returned if one or more of the
+ * following is true:
+ * - One or more of the following pointers is NULL:
+ * - pValResult,
+ * - pTapsQ15,
+ * - pDelayLine, or
+ * - pDelayLineIndex
+ * - tapslen < 1
+ * - *pDelayLineIndex < 0 or *pDelayLineIndex >= (2 * tapslen)
+ *
+ */
+OMXResult omxSP_FIROne_Direct_S16_I (
+ OMX_S16 *pValResult,
+ const OMX_S16 *pTapsQ15,
+ OMX_INT tapsLen,
+ OMX_S16 *pDelayLine,
+ OMX_INT *pDelayLineIndex
+);
+
+
+
+/**
+ * Function: omxSP_FIROne_Direct_S16_Sfs (2.2.3.1.2)
+ *
+ * Description:
+ * Single-sample FIR filtering for 16-bit data type. These functions apply
+ * the FIR filter defined by the coefficient vector pTapsQ15 to a single
+ * sample of input data. The output is multiplied by 2 to the negative power
+ * of scalefactor (i.e., 2^-scalefactor) before returning to the user.
+ * Scaling and rounding conventions are defined in section 1.6.7.
+ * The internal accumulator width must be at least 32 bits.
+ * The result is undefined if any of the partially accumulated values exceeds
+ * the range of a signed 32-bit integer.
+ *
+ * Input Arguments:
+ *
+ * val - the single input sample to which the filter is
+ * applied.
+ * pTapsQ15 - pointer to the vector that contains the filter coefficients,
+ * represented in Q0.15 format (as defined in section 1.6.5). Given
+ * that:
+ * -32768 = pTapsQ15(k) < 32768,
+ * 0 = k < tapsLen,
+ * the range on the actual filter coefficients is -1 = bK <1, and
+ * therefore coefficient normalization may be required during the
+ * filter design process.
+ * tapsLen - the number of taps, or, equivalently, the filter order + 1
+ * pDelayLine - pointer to the 2.tapsLen -element filter memory buffer
+ * (state). The user is responsible for allocation, initialization,
+ * and de-allocation. The filter memory elements are initialized to
+ * zero in most applications.
+ * pDelayLineIndex - pointer to the filter memory index that is maintained
+ * internally by the function. The user should initialize the value
+ * of this index to zero.
+ * scaleFactor - saturation fixed scaleFactor
+ *
+ * Output Arguments:
+ *
+ * pResult - pointer to the filtered output sample
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments; returned if one or more of the
+ * following is true:
+ * - One or more of the following pointers is NULL:
+ * - pResult,
+ * - pTapsQ15,
+ * - pDelayLine, or
+ * - pDelayLineIndex
+ * - tapslen < 1
+ * - scaleFactor < 0
+ * - *pDelayLineIndex < 0 or *pDelayLineIndex >= (2 * tapslen)
+ *
+ */
+OMXResult omxSP_FIROne_Direct_S16_Sfs (
+ OMX_S16 val,
+ OMX_S16 *pResult,
+ const OMX_S16 *pTapsQ15,
+ OMX_INT tapsLen,
+ OMX_S16 *pDelayLine,
+ OMX_INT *pDelayLineIndex,
+ OMX_INT scaleFactor
+);
+
+
+
+/**
+ * Function: omxSP_FIROne_Direct_S16_ISfs (2.2.3.1.2)
+ *
+ * Description:
+ * Single-sample FIR filtering for 16-bit data type. These functions apply
+ * the FIR filter defined by the coefficient vector pTapsQ15 to a single
+ * sample of input data. The output is multiplied by 2 to the negative power
+ * of scalefactor (i.e., 2^-scalefactor) before returning to the user.
+ * Scaling and rounding conventions are defined in section 1.6.7.
+ * The internal accumulator width must be at least 32 bits.
+ * The result is undefined if any of the partially accumulated values exceeds
+ * the range of a signed 32-bit integer.
+ *
+ * Input Arguments:
+ *
+ * pValResult - the pointer to a single input sample to which the filter is
+ * applied.
+ * pTapsQ15 - pointer to the vector that contains the filter coefficients,
+ * represented in Q0.15 format (as defined in section 1.6.5). Given
+ * that:
+ * -32768 = pTapsQ15(k) < 32768,
+ * 0 = k < tapsLen,
+ * the range on the actual filter coefficients is -1 = bK <1, and
+ * therefore coefficient normalization may be required during the
+ * filter design process.
+ * tapsLen - the number of taps, or, equivalently, the filter order + 1
+ * pDelayLine - pointer to the 2.tapsLen -element filter memory buffer
+ * (state). The user is responsible for allocation, initialization,
+ * and de-allocation. The filter memory elements are initialized to
+ * zero in most applications.
+ * pDelayLineIndex - pointer to the filter memory index that is maintained
+ * internally by the function. The user should initialize the value
+ * of this index to zero.
+ * scaleFactor - saturation fixed scaleFactor
+ *
+ * Output Arguments:
+ *
+ * pValResult - pointer to the filtered output sample
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments; returned if one or more of the
+ * following is true:
+ * - One or more of the following pointers is NULL:
+ * - pValResult,
+ * - pTapsQ15,
+ * - pDelayLine, or
+ * - pDelayLineIndex
+ * - tapslen < 1
+ * - scaleFactor < 0
+ * - *pDelayLineIndex < 0 or *pDelayLineIndex >= (2 * tapslen)
+ *
+ */
+OMXResult omxSP_FIROne_Direct_S16_ISfs (
+ OMX_S16 *pValResult,
+ const OMX_S16 *pTapsQ15,
+ OMX_INT tapsLen,
+ OMX_S16 *pDelayLine,
+ OMX_INT *pDelayLineIndex,
+ OMX_INT scaleFactor
+);
+
+
+
+/**
+ * Function: omxSP_IIR_Direct_S16 (2.2.3.2.1)
+ *
+ * Description:
+ * Block IIR filtering for 16-bit data. This function applies the direct form
+ * II IIR filter defined by the coefficient vector pTaps to a vector of input
+ * data. The internal accumulator width must be at least 32 bits, and the
+ * result is saturated if the operation produces a value outside the range of
+ * a signed 16-bit integer, i.e., the output will saturate to 0x8000 (-32768)
+ * for a negative overflow or 0x7fff (32767) for a positive overflow. The
+ * result is undefined if any of the partially accumulated values exceeds the
+ * range of a signed 32-bit integer.
+ *
+ * Input Arguments:
+ *
+ * pSrc - pointer to the vector of input samples to which the
+ * filter is applied
+ * len - the number of samples contained in both the input and output
+ * vectors
+ * pTaps - pointer to the 2L+2-element vector that contains the combined
+ * numerator and denominator filter coefficients from the system
+ * transfer function, H(z). Coefficient scaling and coefficient
+ * vector organization should follow the conventions described
+ * above. The value of the coefficient scaleFactor exponent must be
+ * non-negative (sf=0).
+ * order - the maximum of the degrees of the numerator and denominator
+ * coefficient polynomials from the system transfer function, H(z).
+ * In the notation of section 2.2.3.2, the parameter
+ * order=max(K,M)=L gives the maximum delay, in samples, used to
+ * compute each output sample.
+ * pDelayLine - pointer to the L-element filter memory buffer (state). The
+ * user is responsible for allocation, initialization, and
+ * deallocation. The filter memory elements are initialized to zero
+ * in most applications.
+ *
+ * Output Arguments:
+ *
+ * pDst - pointer to the vector of filtered output samples
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments; returned if one or more of the
+ * following is true:
+ * - one or more of the following pointers is NULL:
+ * - pSrc,
+ * - pDst,
+ * - pTaps, or
+ * - pDelayLine.
+ * - len < 0
+ * - pTaps[order+1] < 0 (negative scaling)
+ * - order < 1
+ *
+ */
+OMXResult omxSP_IIR_Direct_S16 (
+ const OMX_S16 *pSrc,
+ OMX_S16 *pDst,
+ OMX_INT len,
+ const OMX_S16 *pTaps,
+ OMX_INT order,
+ OMX_S32 *pDelayLine
+);
+
+
+
+/**
+ * Function: omxSP_IIR_Direct_S16_I (2.2.3.2.1)
+ *
+ * Description:
+ * Block IIR filtering for 16-bit data. This function applies the direct form
+ * II IIR filter defined by the coefficient vector pTaps to a vector of input
+ * data. The internal accumulator width must be at least 32 bits, and the
+ * result is saturated if the operation produces a value outside the range of
+ * a signed 16-bit integer, i.e., the output will saturate to 0x8000 (-32768)
+ * for a negative overflow or 0x7fff (32767) for a positive overflow. The
+ * result is undefined if any of the partially accumulated values exceeds the
+ * range of a signed 32-bit integer.
+ *
+ * Input Arguments:
+ *
+ * pSrcDst - pointer to the vector of input samples to which the
+ * filter is applied
+ * len - the number of samples contained in both the input and output
+ * vectors
+ * pTaps - pointer to the 2L+2-element vector that contains the combined
+ * numerator and denominator filter coefficients from the system
+ * transfer function, H(z). Coefficient scaling and coefficient
+ * vector organization should follow the conventions described
+ * above. The value of the coefficient scaleFactor exponent must be
+ * non-negative (sf>=0).
+ * order - the maximum of the degrees of the numerator and denominator
+ * coefficient polynomials from the system transfer function, H(z).
+ * In the notation of section 2.2.3.2, the parameter
+ * order=max(K,M)=L gives the maximum delay, in samples, used to
+ * compute each output sample.
+ * pDelayLine - pointer to the L-element filter memory buffer (state). The
+ * user is responsible for allocation, initialization, and
+ * deallocation. The filter memory elements are initialized to zero
+ * in most applications.
+ *
+ * Output Arguments:
+ *
+ * pSrcDst - pointer to the vector of filtered output samples
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments; returned if one or more of the
+ * following is true:
+ * - one or more of the following pointers is NULL:
+ * - pSrcDst,
+ * - pTaps, or
+ * - pDelayLine.
+ * - len < 0
+ * - pTaps[order+1] < 0 (negative scaling)
+ * - order < 1
+ *
+ */
+OMXResult omxSP_IIR_Direct_S16_I (
+ OMX_S16 *pSrcDst,
+ OMX_INT len,
+ const OMX_S16 *pTaps,
+ OMX_INT order,
+ OMX_S32 *pDelayLine
+);
+
+
+
+/**
+ * Function: omxSP_IIROne_Direct_S16 (2.2.3.2.2)
+ *
+ * Description:
+ * Single sample IIR filtering for 16-bit data. This function applies the
+ * direct form II IIR filter defined by the coefficient vector pTaps to a
+ * single sample of input data. The internal accumulator width must be at
+ * least 32 bits, and the result is saturated if the operation produces a
+ * value outside the range of a signed 16-bit integer, i.e., the output will
+ * saturate to 0x8000 (-32768) for a negative overflow or 0x7fff (32767) for a
+ * positive overflow. The result is undefined if any of the partially
+ * accumulated values exceeds the range of a signed 32-bit integer.
+ *
+ * Input Arguments:
+ *
+ * val - the single input sample to which the filter is
+ * applied.
+ * pTaps - pointer to the 2L+2 -element vector that contains the combined
+ * numerator and denominator filter coefficients from the system
+ * transfer function, H(z). Coefficient scaling and coefficient
+ * vector organization should follow the conventions described
+ * above. The value of the coefficient scaleFactor exponent must be
+ * non-negative (sf>=0).
+ * order - the maximum of the degrees of the numerator and denominator
+ * coefficient polynomials from the system transfer function, H(z).
+ * In the notation of section 2.2.3.2, the parameter
+ * order=max(K,M)=L gives the maximum delay, in samples, used to
+ * compute each output sample.
+ * pDelayLine - pointer to the L-element filter memory buffer (state). The
+ * user is responsible for allocation, initialization, and
+ * deallocation. The filter memory elements are initialized to zero
+ * in most applications.
+ *
+ * Output Arguments:
+ *
+ * pResult - pointer to the filtered output sample
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments; returned if one or more of the
+ * following is true:
+ * - one or more of the following pointers is NULL: pResult,
+ * pTaps, or pDelayLine.
+ * - order < 1
+ * - pTaps[order+1] < 0 (negative scaling)
+ *
+ */
+OMXResult omxSP_IIROne_Direct_S16 (
+ OMX_S16 val,
+ OMX_S16 *pResult,
+ const OMX_S16 *pTaps,
+ OMX_INT order,
+ OMX_S32 *pDelayLine
+);
+
+
+
+/**
+ * Function: omxSP_IIROne_Direct_S16_I (2.2.3.2.2)
+ *
+ * Description:
+ * Single sample IIR filtering for 16-bit data. This function applies the
+ * direct form II IIR filter defined by the coefficient vector pTaps to a
+ * single sample of input data. The internal accumulator width must be at
+ * least 32 bits, and the result is saturated if the operation produces a
+ * value outside the range of a signed 16-bit integer, i.e., the output will
+ * saturate to 0x8000 (-32768) for a negative overflow or 0x7fff (32767) for a
+ * positive overflow. The result is undefined if any of the partially
+ * accumulated values exceeds the range of a signed 32-bit integer.
+ *
+ * Input Arguments:
+ *
+ * pValResult - pointer to the single input sample to which the filter is
+ * applied.
+ * pTaps - pointer to the 2L+2 -element vector that contains the combined
+ * numerator and denominator filter coefficients from the system
+ * transfer function, H(z). Coefficient scaling and coefficient
+ * vector organization should follow the conventions described
+ * above. The value of the coefficient scaleFactor exponent must be
+ * non-negative (sf>=0).
+ * order - the maximum of the degrees of the numerator and denominator
+ * coefficient polynomials from the system transfer function, H(z).
+ * In the notation of section 2.2.3.2, the parameter
+ * order=max(K,M)=L gives the maximum delay, in samples, used to
+ * compute each output sample.
+ * pDelayLine - pointer to the L-element filter memory buffer (state). The
+ * user is responsible for allocation, initialization, and
+ * deallocation. The filter memory elements are initialized to zero
+ * in most applications.
+ *
+ * Output Arguments:
+ *
+ * pValResult - pointer to the filtered output sample
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments; returned if one or more of the
+ * following is true:
+ * - one or more of the following pointers is NULL:
+ * pValResult, pTaps, or pDelayLine.
+ * - order < 1
+ * - pTaps[order+1] < 0 (negative scaling)
+ *
+ */
+OMXResult omxSP_IIROne_Direct_S16_I (
+ OMX_S16 *pValResult,
+ const OMX_S16 *pTaps,
+ OMX_INT order,
+ OMX_S32 *pDelayLine
+);
+
+
+
+/**
+ * Function: omxSP_IIR_BiQuadDirect_S16 (2.2.3.3.1)
+ *
+ * Description:
+ * Block biquad IIR filtering for 16-bit data type. This function applies the
+ * direct form II biquad IIR cascade defined by the coefficient vector pTaps
+ * to a vector of input data. The internal accumulator width must be at least
+ * 32 bits, and the result is saturated if the operation produces a value
+ * outside the range of a signed 16-bit integer, i.e., the output will
+ * saturate to 0x8000 (-32768) for a negative overflow or 0x7fff (32767) for a
+ * positive overflow. The result is undefined if any of the partially
+ * accumulated values exceeds the range of a signed 32-bit integer.
+ *
+ * Input Arguments:
+ *
+ * pSrc - pointer to the vector of input samples to which the
+ * filter is applied
+ * len - the number of samples contained in both the input and output
+ * vectors
+ * pTaps - pointer to the 6P -element vector that contains the combined
+ * numerator and denominator filter coefficients from the biquad
+ * cascade. Coefficient scaling and coefficient vector organization
+ * should follow the conventions described above. The value of the
+ * coefficient scaleFactor exponent must be non-negative. (sfp>=0).
+ * numBiquad - the number of biquads contained in the IIR filter cascade:
+ * (P)
+ * pDelayLine - pointer to the 2P -element filter memory buffer (state).
+ * The user is responsible for allocation, initialization, and
+ * de-allocation. The filter memory elements are initialized to
+ * zero in most applications.
+ *
+ * Output Arguments:
+ *
+ * pDst - pointer to the vector of filtered output samples
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments; returned if one or more of the
+ * following is true:
+ * - one or more of the following pointers is NULL: pSrc, pDst,
+ * pTaps, or pDelayLine.
+ * - len < 0
+ * - numBiquad < 1
+ * - pTaps[3+n*6] < 0, for 0 <= n < numBiquad (negative scaling)
+ *
+ */
+OMXResult omxSP_IIR_BiQuadDirect_S16 (
+ const OMX_S16 *pSrc,
+ OMX_S16 *pDst,
+ OMX_INT len,
+ const OMX_S16 *pTaps,
+ OMX_INT numBiquad,
+ OMX_S32 *pDelayLine
+);
+
+
+
+/**
+ * Function: omxSP_IIR_BiQuadDirect_S16_I (2.2.3.3.1)
+ *
+ * Description:
+ * Block biquad IIR filtering for 16-bit data type. This function applies the
+ * direct form II biquad IIR cascade defined by the coefficient vector pTaps
+ * to a vector of input data. The internal accumulator width must be at least
+ * 32 bits, and the result is saturated if the operation produces a value
+ * outside the range of a signed 16-bit integer, i.e., the output will
+ * saturate to 0x8000 (-32768) for a negative overflow or 0x7fff (32767) for a
+ * positive overflow. The result is undefined if any of the partially
+ * accumulated values exceeds the range of a signed 32-bit integer.
+ *
+ * Input Arguments:
+ *
+ * pSrcDst - pointer to the vector of input samples to which the
+ * filter is applied
+ * len - the number of samples contained in both the input and output
+ * vectors
+ * pTaps - pointer to the 6P -element vector that contains the combined
+ * numerator and denominator filter coefficients from the biquad
+ * cascade. Coefficient scaling and coefficient vector organization
+ * should follow the conventions described above. The value of the
+ * coefficient scaleFactor exponent must be non-negative. (sfp>=0).
+ * numBiquad - the number of biquads contained in the IIR filter cascade:
+ * (P)
+ * pDelayLine - pointer to the 2P -element filter memory buffer (state).
+ * The user is responsible for allocation, initialization, and
+ * de-allocation. The filter memory elements are initialized to
+ * zero in most applications.
+ *
+ * Output Arguments:
+ *
+ * pSrcDst - pointer to the vector of filtered output samples
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments; returned if one or more of the
+ * following is true:
+ * - one or more of the following pointers is NULL:
+ * pSrcDst, pTaps, or pDelayLine.
+ * - len < 0
+ * - numBiquad < 1
+ * - pTaps[3+n*6] < 0, for 0 <= n < numBiquad (negative scaling)
+ *
+ */
+OMXResult omxSP_IIR_BiQuadDirect_S16_I (
+ OMX_S16 *pSrcDst,
+ OMX_INT len,
+ const OMX_S16 *pTaps,
+ OMX_INT numBiquad,
+ OMX_S32 *pDelayLine
+);
+
+
+
+/**
+ * Function: omxSP_IIROne_BiQuadDirect_S16 (2.2.3.3.2)
+ *
+ * Description:
+ * Single-sample biquad IIR filtering for 16-bit data type. This function
+ * applies the direct form II biquad IIR cascade defined by the coefficient
+ * vector pTaps to a single sample of input data. The internal accumulator
+ * width must be at least 32 bits, and the result is saturated if the
+ * operation produces a value outside the range of a signed 16-bit integer,
+ * i.e., the output will saturate to 0x8000 (-32768) for a negative overflow
+ * or 0x7fff (32767) for a positive overflow. The result is undefined if any
+ * of the partially accumulated values exceeds the range of a signed 32-bit
+ * integer.
+ *
+ * Input Arguments:
+ *
+ * val - the single input sample to which the filter is
+ * applied.
+ * pTaps - pointer to the 6P-element vector that contains the combined
+ * numerator and denominator filter coefficients from the biquad
+ * cascade. Coefficient scaling and coefficient vector organization
+ * should follow the conventions described above. The value of the
+ * coefficient scalefactor exponent must be non-negative: (sfp>=0).
+ * numBiquad - the number of biquads contained in the IIR filter cascade:
+ * (P)
+ * pDelayLine - pointer to the 2p-element filter memory buffer (state). The
+ * user is responsible for allocation, initialization, and
+ * deallocation. The filter memory elements are initialized to zero
+ * in most applications.
+ *
+ * Output Arguments:
+ *
+ * pResult - pointer to the filtered output sample
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments; returned if one or more of the
+ * following is true:
+ * - one or more of the following pointers is NULL: pResult,
+ * pValResult, pTaps, or pDelayLine.
+ * - numBiquad < 1
+ * - pTaps[3+n*6] < 0, for 0 <= n < numBiquad (negative scaling)
+ *
+ */
+OMXResult omxSP_IIROne_BiQuadDirect_S16 (
+ OMX_S16 val,
+ OMX_S16 *pResult,
+ const OMX_S16 *pTaps,
+ OMX_INT numBiquad,
+ OMX_S32 *pDelayLine
+);
+
+
+
+/**
+ * Function: omxSP_IIROne_BiQuadDirect_S16_I (2.2.3.3.2)
+ *
+ * Description:
+ * Single-sample biquad IIR filtering for 16-bit data type. This function
+ * applies the direct form II biquad IIR cascade defined by the coefficient
+ * vector pTaps to a single sample of input data. The internal accumulator
+ * width must be at least 32 bits, and the result is saturated if the
+ * operation produces a value outside the range of a signed 16-bit integer,
+ * i.e., the output will saturate to 0x8000 (-32768) for a negative overflow
+ * or 0x7fff (32767) for a positive overflow. The result is undefined if any
+ * of the partially accumulated values exceeds the range of a signed 32-bit
+ * integer.
+ *
+ * Input Arguments:
+ *
+ * pValResult - pointer to the single input sample to which the filter is
+ * applied.
+ * pTaps - pointer to the 6P-element vector that contains the combined
+ * numerator and denominator filter coefficients from the biquad
+ * cascade. Coefficient scaling and coefficient vector organization
+ * should follow the conventions described above. The value of the
+ * coefficient scalefactor exponent must be non-negative: (sfp>=0).
+ * numBiquad - the number of biquads contained in the IIR filter cascade:
+ * (P)
+ * pDelayLine - pointer to the 2p-element filter memory buffer (state). The
+ * user is responsible for allocation, initialization, and
+ * deallocation. The filter memory elements are initialized to zero
+ * in most applications.
+ *
+ * Output Arguments:
+ *
+ * pValResult - pointer to the filtered output sample
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments; returned if one or more of the
+ * following is true:
+ * - one or more of the following pointers is NULL:
+ * pValResult, pTaps, or pDelayLine.
+ * - numBiquad < 1
+ * - pTaps[3+n*6] < 0, for 0 <= n < numBiquad (negative scaling)
+ *
+ */
+OMXResult omxSP_IIROne_BiQuadDirect_S16_I (
+ OMX_S16 *pValResult,
+ const OMX_S16 *pTaps,
+ OMX_INT numBiquad,
+ OMX_S32 *pDelayLine
+);
+
+
+
+/**
+ * Function: omxSP_FilterMedian_S32 (2.2.3.4.1)
+ *
+ * Description:
+ * This function computes the median over the region specified by the median
+ * mask for the every element of the input array. The median outputs are
+ * stored in the corresponding elements of the output vector.
+ *
+ * Input Arguments:
+ *
+ * pSrc - pointer to the input vector
+ * len - number of elements contained in the input and output vectors (0 <
+ * len < 65536)
+ * maskSize - median mask size; if an even value is specified, the function
+ * subtracts 1 and uses the odd value of the filter mask for median
+ * filtering (0 < maskSize < 256)
+ *
+ * Output Arguments:
+ *
+ * pDst - pointer to the median-filtered output vector
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments; returned if one or more of the
+ * following is true:
+ * - one or more of the following pointers is NULL: pSrc, pDst.
+ * - len < 0
+ * - maskSize < 1 or maskSize> 255
+ * OMX_StsSP_EvenMedianMaskSizeErr - even mask size replaced by odd mask
+ * size
+ *
+ */
+OMXResult omxSP_FilterMedian_S32 (
+ const OMX_S32 *pSrc,
+ OMX_S32 *pDst,
+ OMX_INT len,
+ OMX_INT maskSize
+);
+
+
+
+/**
+ * Function: omxSP_FilterMedian_S32_I (2.2.3.4.1)
+ *
+ * Description:
+ * This function computes the median over the region specified by the median
+ * mask for the every element of the input array. The median outputs are
+ * stored in the corresponding elements of the output vector.
+ *
+ * Input Arguments:
+ *
+ * pSrcDst - pointer to the input vector
+ * len - number of elements contained in the input and output vectors (0 <
+ * len < 65536)
+ * maskSize - median mask size; if an even value is specified, the function
+ * subtracts 1 and uses the odd value of the filter mask for median
+ * filtering (0 < maskSize < 256)
+ *
+ * Output Arguments:
+ *
+ * pSrcDst - pointer to the median-filtered output vector
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments; returned if one or more of the
+ * following is true:
+ * - pSrcDst is NULL.
+ * - len < 0
+ * - maskSize < 1 or maskSize> 255
+ * OMX_StsSP_EvenMedianMaskSizeErr - even mask size replaced by odd mask
+ * size
+ *
+ */
+OMXResult omxSP_FilterMedian_S32_I (
+ OMX_S32 *pSrcDst,
+ OMX_INT len,
+ OMX_INT maskSize
+);
+
+
+
+/**
+ * Function: omxSP_FFTInit_C_SC16 (2.2.4.1.2)
+ *
+ * Description:
+ * These functions initialize the specification structures required for the
+ * complex FFT and IFFT functions. Desired block length is specified as an
+ * input. The function <FFTInit_C_SC16> is used to initialize the
+ * specification structures for functions <FFTFwd_CToC_SC16_Sfs> and
+ * <FFTInv_CToC_SC16_Sfs>.
+ *
+ * Memory for the specification structure *pFFTSpec
+ * must be allocated prior to calling these functions and should be 4-byte
+ * aligned for omxSP_FFTInit_C_SC16.
+ *
+ * The space required for *pFFTSpec, in bytes, can be
+ * determined using <FFTGetBufSize_C_SC16>.
+ *
+ * Input Arguments:
+ *
+ * order - base-2 logarithm of the desired block length;
+ * valid in the range [0,12]
+ *
+ * Output Arguments:
+ *
+ * pFFTSpec - pointer to initialized specification structure
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr -no error
+ * OMX_Sts_BadArgErr - bad arguments; returned if one or more of the
+ * following is true:
+ * - pFFTSpec is either NULL or violates the 4-byte alignment
+ * restrictions
+ * - order < 0 or order > 12
+ *
+ */
+OMXResult omxSP_FFTInit_C_SC16 (
+ OMXFFTSpec_C_SC16 *pFFTSpec,
+ OMX_INT order
+);
+
+
+
+/**
+ * Function: omxSP_FFTInit_C_SC32 (2.2.4.1.2)
+ *
+ * Description:
+ * These functions initialize the specification structures required for the
+ * complex FFT and IFFT functions. Desired block length is specified as an
+ * input. The function <FFTInit_C_SC32> is used to initialize
+ * the specification structures for the functions <FFTFwd_CToC_SC32_Sfs> and
+ * <FFTInv_CToC_SC32_Sfs>.
+ *
+ * Memory for the specification structure *pFFTSpec must be allocated prior
+ * to calling these functions and should be 8-byte aligned for
+ * omxSP_FFTInit_C_SC32.
+ *
+ * The space required for *pFFTSpec, in bytes, can be
+ * determined using <FFTGetBufSize_C_SC32>.
+ *
+ * Input Arguments:
+ *
+ * order - base-2 logarithm of the desired block length; valid in the range
+ * [0,12]
+ *
+ * Output Arguments:
+ *
+ * pFFTSpec - pointer to initialized specification structure
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr -no error
+ * OMX_Sts_BadArgErr - bad arguments; returned if one or more of the
+ * following is true:
+ * - pFFTSpec is either NULL or violates the 8-byte alignment
+ * restrictions
+ * - order < 0 or order > 12
+ *
+ */
+OMXResult omxSP_FFTInit_C_SC32 (
+ OMXFFTSpec_C_SC32 *pFFTSpec,
+ OMX_INT order
+);
+
+/**
+ * Function: omxSP_FFTInit_C_FC32 (2.2.4.1.2)
+ *
+ * Description:
+ * These functions initialize the specification structures required for the
+ * complex FFT and IFFT functions. Desired block length is specified as an
+ * input. The function <FFTInit_C_FC32> is used to initialize
+ * the specification structures for the functions <FFTFwd_CToC_FC32_Sfs> and
+ * <FFTInv_CToC_FC32_Sfs>.
+ *
+ * Memory for the specification structure *pFFTSpec must be allocated prior
+ * to calling these functions and should be 8-byte aligned for
+ * omxSP_FFTInit_C_FC32.
+ *
+ * The space required for *pFFTSpec, in bytes, can be
+ * determined using <FFTGetBufSize_C_FC32>.
+ *
+ * Input Arguments:
+ *
+ * order - base-2 logarithm of the desired block length; valid in the range
+ * [0,12]
+ *
+ * Output Arguments:
+ *
+ * pFFTSpec - pointer to initialized specification structure
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr -no error
+ * OMX_Sts_BadArgErr - bad arguments; returned if one or more of the
+ * following is true:
+ * - pFFTSpec is either NULL or violates the 8-byte alignment
+ * restrictions
+ * - order < 0 or order > 12
+ *
+ */
+OMXResult omxSP_FFTInit_C_FC32(
+ OMXFFTSpec_C_FC32* pFFTSpec,
+ OMX_INT order
+);
+
+
+
+/**
+ * Function: omxSP_FFTInit_R_S16S32 (2.2.4.1.4)
+ *
+ * Description:
+ * These functions initialize specification structures required for the real
+ * FFT and IFFT functions. The function <FFTInit_R_S16S32> is used to
+ * initialize the specification structures for functions
+ * <FFTFwd_RToCCS_S16S32_Sfs> and <FFTInv_CCSToR_S32S16_Sfs>.
+ *
+ * Memory for
+ * *pFFTFwdSpec must be allocated before calling these functions and should be
+ * 8-byte aligned. The number of bytes required for *pFFTFwdSpec can be
+ * determined using <FFTGetBufSize_R_S16S32>.
+ *
+ * Input Arguments:
+ *
+ * order - base-2 logarithm of the desired block length; valid in the range
+ * [0,12]
+ *
+ * Output Arguments:
+ *
+ * pFFTFwdSpec - pointer to the initialized specification structure
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments; returned if one or more of the
+ * following is true:
+ * - pFFTFwdSpec is either NULL or violates the 8-byte alignment
+ * restrictions
+ * - order < 0 or order > 12
+ *
+ */
+OMXResult omxSP_FFTInit_R_S16S32(
+ OMXFFTSpec_R_S16S32* pFFTFwdSpec,
+ OMX_INT order
+);
+
+
+
+/**
+ * Function: omxSP_FFTInit_R_S32 (2.2.4.1.4)
+ *
+ * Description:
+ * These functions initialize specification structures required for the real
+ * FFT and IFFT functions. The function <FFTInit_R_S32> is used to initialize
+ * the specification structures for functions <FFTFwd_RToCCS_S32_Sfs>
+ * and <FFTInv_CCSToR_S32_Sfs>.
+ *
+ * Memory for *pFFTFwdSpec must be allocated before calling these functions
+ * and should be 8-byte aligned.
+ *
+ * The number of bytes required for *pFFTFwdSpec can be
+ * determined using <FFTGetBufSize_R_S32>.
+ *
+ * Input Arguments:
+ *
+ * order - base-2 logarithm of the desired block length; valid in the range
+ * [0,12]
+ *
+ * Output Arguments:
+ *
+ * pFFTFwdSpec - pointer to the initialized specification structure
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments; returned if one or more of the
+ * following is true:
+ * - pFFTFwdSpec is either NULL or violates the 8-byte alignment
+ * restrictions
+ * - order < 0 or order > 12
+ *
+ */
+OMXResult omxSP_FFTInit_R_S32 (
+ OMXFFTSpec_R_S32*pFFTFwdSpec,
+ OMX_INT order
+);
+
+/**
+ * Function: omxSP_FFTInit_R_F32
+ *
+ * Description:
+ * These functions initialize specification structures required for the real
+ * FFT and IFFT functions. The function <FFTInit_R_F32> is used to initialize
+ * the specification structures for functions <FFTFwd_RToCCS_F32_Sfs>
+ * and <FFTInv_CCSToR_F32_Sfs>.
+ *
+ * Memory for *pFFTFwdSpec must be allocated before calling these functions
+ * and should be 8-byte aligned.
+ *
+ * The number of bytes required for *pFFTFwdSpec can be
+ * determined using <FFTGetBufSize_R_F32>.
+ *
+ * Input Arguments:
+ *
+ * order - base-2 logarithm of the desired block length; valid in the range
+ * [0,12]
+ *
+ * Output Arguments:
+ *
+ * pFFTFwdSpec - pointer to the initialized specification structure
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments; returned if one or more of the
+ * following is true:
+ * - pFFTFwdSpec is either NULL or violates the 8-byte alignment
+ * restrictions
+ * - order < 0 or order > 12
+ *
+ */
+OMXResult omxSP_FFTInit_R_F32(
+ OMXFFTSpec_R_F32* pFFTFwdSpec,
+ OMX_INT order
+);
+
+/**
+ * Function: omxSP_FFTGetBufSize_C_SC16 (2.2.4.1.6)
+ *
+ * Description:
+ * These functions compute the size of the specification structure
+ * required for the length 2^order complex FFT and IFFT functions. The function
+ * <FFTGetBufSize_C_SC16> is used in conjunction with the 16-bit functions
+ * <FFTFwd_CToC_SC16_Sfs> and <FFTInv_CToC_SC16_Sfs>.
+ *
+ * Input Arguments:
+ *
+ * order - base-2 logarithm of the desired block length; valid in the range
+ * [0,12]
+ *
+ * Output Arguments:
+ *
+ * pSize - pointer to the number of bytes required for the specification
+ * structure
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments; returned if one or more of the
+ * following is true:
+ * - pSize is NULL
+ * - order < 0 or order > 12
+ *
+ */
+OMXResult omxSP_FFTGetBufSize_C_SC16 (
+ OMX_INT order,
+ OMX_INT *pSize
+);
+
+
+
+/**
+ * Function: omxSP_FFTGetBufSize_C_SC32 (2.2.4.1.6)
+ *
+ * Description:
+ * These functions compute the size of the specification structure
+ * required for the length 2^order complex FFT and IFFT functions. The function
+ * <FFTGetBufSize_C_SC32> is used in conjunction with the 32-bit functions
+ * <FFTFwd_CToC_SC32_Sfs> and <FFTInv_CToC_SC32_Sfs>.
+ *
+ * Input Arguments:
+ *
+ * order - base-2 logarithm of the desired block length; valid in the range
+ * [0,12]
+ *
+ * Output Arguments:
+ *
+ * pSize - pointer to the number of bytes required for the specification
+ * structure
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments; returned if one or more of the
+ * following is true:
+ * - pSize is NULL
+ * - order < 0 or order > 12
+ *
+ */
+OMXResult omxSP_FFTGetBufSize_C_SC32 (
+ OMX_INT order,
+ OMX_INT *pSize
+);
+
+/**
+ * Function: omxSP_FFTGetBufSize_C_FC32
+ *
+ * Description:
+ * These functions compute the size of the specification structure
+ * required for the length 2^order complex FFT and IFFT functions. The function
+ * <FFTGetBufSize_C_FC32> is used in conjunction with the 32-bit functions
+ * <FFTFwd_CToC_FC32_Sfs> and <FFTInv_CToC_FC32_Sfs>.
+ *
+ * Input Arguments:
+ *
+ * order - base-2 logarithm of the desired block length; valid in the range
+ * [0,12]
+ *
+ * Output Arguments:
+ *
+ * pSize - pointer to the number of bytes required for the specification
+ * structure
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments; returned if one or more of the
+ * following is true:
+ * - pSize is NULL
+ * - order < 0 or order > 12
+ *
+ */
+OMXResult omxSP_FFTGetBufSize_C_FC32(
+ OMX_INT order,
+ OMX_INT* pSize
+);
+
+
+/**
+ * Function: omxSP_FFTGetBufSize_R_S16S32 (2.2.4.1.8)
+ *
+ * Description:
+ * order These functions compute the size of the specification structure
+ * required for the length 2^order real FFT and IFFT functions. The function
+ * <FFTGetBufSize_R_S16S32> is used in conjunction with the 16-bit functions
+ * <FFTFwd_RToCCS_S16S32_Sfs> and <FFTInv_CCSToR_S32S16_Sfs>.
+ *
+ * Input Arguments:
+ *
+ * order - base-2 logarithm of the length; valid in the range [0,12]
+ *
+ * Output Arguments:
+ *
+ * pSize - pointer to the number of bytes required for the specification
+ * structure
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments The function returns
+ * OMX_Sts_BadArgErr if one or more of the following is true:
+ * pSize is NULL
+ * order < 0 or order > 12
+ *
+ */
+OMXResult omxSP_FFTGetBufSize_R_S16S32(
+ OMX_INT order,
+ OMX_INT* pSize
+);
+
+
+
+/**
+ * Function: omxSP_FFTGetBufSize_R_S32 (2.2.4.1.8)
+ *
+ * Description:
+ * These functions compute the size of the specification structure
+ * required for the length 2^order real FFT and IFFT functions. The function
+ * <FFTGetBufSize_R_S32> is used in conjunction with the 32-bit functions
+ * <FFTFwd_RToCCS_S32_Sfs> and <FFTInv_CCSToR_S32_Sfs>.
+ *
+ * Input Arguments:
+ *
+ * order - base-2 logarithm of the length; valid in the range [0,12]
+ *
+ * Output Arguments:
+ *
+ * pSize - pointer to the number of bytes required for the specification
+ * structure
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments The function returns
+ * OMX_Sts_BadArgErr if one or more of the following is true:
+ * pSize is NULL
+ * order < 0 or order > 12
+ *
+ */
+OMXResult omxSP_FFTGetBufSize_R_S32 (
+ OMX_INT order,
+ OMX_INT *pSize
+);
+
+/**
+ * Function: omxSP_FFTGetBufSize_R_F32
+ *
+ * Description:
+ * These functions compute the size of the specification structure
+ * required for the length 2^order real FFT and IFFT functions. The function
+ * <FFTGetBufSize_R_F32> is used in conjunction with the 32-bit functions
+ * <FFTFwd_RToCCS_F32_Sfs> and <FFTInv_CCSToR_F32_Sfs>.
+ *
+ * Input Arguments:
+ *
+ * order - base-2 logarithm of the length; valid in the range [0,12]
+ *
+ * Output Arguments:
+ *
+ * pSize - pointer to the number of bytes required for the specification
+ * structure
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments The function returns
+ * OMX_Sts_BadArgErr if one or more of the following is true:
+ * pSize is NULL
+ * order < 0 or order > 12
+ *
+ */
+OMXResult omxSP_FFTGetBufSize_R_F32(
+ OMX_INT order,
+ OMX_INT* pSize
+);
+
+
+
+/**
+ * Function: omxSP_FFTFwd_CToC_SC16_Sfs (2.2.4.2.2)
+ *
+ * Description:
+ * Compute an FFT for a complex signal of length of 2^order,
+ * where 0 <= order <= 12.
+ * Transform length is determined by the specification structure, which
+ * must be initialized prior to calling the FFT function using the appropriate
+ * helper, i.e., <FFTInit_C_sc32> or <FFTInit_C_SC16>. The relationship
+ * between the input and output sequences can be expressed in terms of the
+ * DFT, i.e.,
+ *
+ * X[k] = 2^(-scaleFactor) . SUM[n=0...N-1]x[n].e^(-jnk.2.pi/N)
+ * k = 0,1,2,..., N-1
+ * N = 2^order
+ *
+ * Input Arguments:
+ * pSrc - pointer to the input signal, a complex-valued vector of length 2^order;
+ * must be aligned on a 32 byte boundary.
+ * pFFTSpec - pointer to the preallocated and initialized specification
+ * structure
+ * scaleFactor - output scale factor; the range for is [0,16]
+ *
+ * Output Arguments:
+ * pDst - pointer to the complex-valued output vector, of length 2^order;
+ * must be aligned on an 32-byte boundary.
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - returned if one or more of the following conditions
+ * is true:
+ * - one or more of the following pointers is NULL: pSrc, pDst, or
+ * pFFTSpec.
+ * - pSrc or pDst is not 32-byte aligned
+ * - scaleFactor<0 or scaleFactor>16
+ *
+ */
+
+OMXResult omxSP_FFTFwd_CToC_SC16_Sfs (
+ const OMX_SC16 *pSrc,
+ OMX_SC16 *pDst,
+ const OMXFFTSpec_C_SC16 *pFFTSpec,
+ OMX_INT scaleFactor
+);
+
+OMXResult omxSP_FFTFwd_CToC_SC16_Sfs_neon (
+ const OMX_SC16 *pSrc,
+ OMX_SC16 *pDst,
+ const OMXFFTSpec_C_SC16 *pFFTSpec,
+ OMX_INT scaleFactor
+);
+
+/**
+ * Function: omxSP_FFTFwd_CToC_SC32_Sfs (2.2.4.2.2)
+ *
+ * Description:
+ * Compute an FFT for a complex signal of length of 2^order,
+ * where 0 <= order <= 12.
+ * Transform length is determined by the specification structure, which
+ * must be initialized prior to calling the FFT function using the appropriate
+ * helper, i.e., <FFTInit_C_sc32> or <FFTInit_C_SC16>. The relationship
+ * between the input and output sequences can be expressed in terms of the
+ * DFT, i.e.,
+ *
+ * X[k] = 2^(-scaleFactor) . SUM[n=0...N-1]x[n].e^(-jnk.2.pi/N)
+ * k = 0,1,2,..., N-1
+ * N = 2^order
+ *
+ * Input Arguments:
+ * pSrc - pointer to the input signal, a complex-valued vector of length 2^order;
+ * must be aligned on a 32 byte boundary.
+ * pFFTSpec - pointer to the preallocated and initialized specification
+ * structure
+ * scaleFactor - output scale factor; the range is [0,32]
+ *
+ * Output Arguments:
+ * pDst - pointer to the complex-valued output vector, of length 2^order; must be
+ * aligned on an 32-byte boundary.
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - returned if one or more of the following conditions
+ * is true:
+ * - one or more of the following pointers is NULL: pSrc, pDst, or
+ * pFFTSpec.
+ * - pSrc or pDst is not 32-byte aligned
+ * - scaleFactor<0 or scaleFactor >32
+ *
+ */
+OMXResult omxSP_FFTFwd_CToC_SC32_Sfs (
+ const OMX_SC32 *pSrc,
+ OMX_SC32 *pDst,
+ const OMXFFTSpec_C_SC32 *pFFTSpec,
+ OMX_INT scaleFactor
+);
+
+
+
+/**
+ * Function: omxSP_FFTInv_CToC_SC16_Sfs (2.2.4.2.4)
+ *
+ * Description:
+ * These functions compute an inverse FFT for a complex signal of length
+ * of 2^order, where 0 <= order <= 12. Transform length is determined by the
+ * specification structure, which must be initialized prior to calling the FFT
+ * function using the appropriate helper, i.e., <FFTInit_C_sc32> or
+ * <FFTInit_C_SC16>. The relationship between the input and output sequences
+ * can be expressed in terms of the IDFT, i.e.:
+ *
+ * x[n] = (2^(-scalefactor)/N) . SUM[k=0,...,N-1] X[k].e^(jnk.2.pi/N)
+ * n=0,1,2,...N-1
+ * N=2^order.
+ *
+ * Input Arguments:
+ * pSrc - pointer to the complex-valued input signal, of length 2^order ;
+ * must be aligned on a 32-byte boundary.
+ * pFFTSpec - pointer to the preallocated and initialized specification
+ * structure
+ * scaleFactor - scale factor of the output. Valid value is 0
+ * only.
+ *
+ * Output Arguments:
+ * order
+ * pDst - pointer to the complex-valued output signal, of length 2^order;
+ * must be aligned on a 32-byte boundary.
+ *
+ * Return Value:
+ *
+ * Positive value - the shift scale that was performed inside
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - returned if one or more of the following conditions
+ * is true:
+ * - one or more of the following pointers is NULL: pSrc, pDst, or
+ * pFFTSpec.
+ * - pSrc or pDst is not 32-byte aligned
+ * - scaleFactor<0 or scaleFactor>16
+ *
+ */
+OMXResult omxSP_FFTInv_CToC_SC16_Sfs (
+ const OMX_SC16 *pSrc,
+ OMX_SC16 *pDst,
+ const OMXFFTSpec_C_SC16 *pFFTSpec,
+ OMX_INT scaleFactor
+);
+
+OMXResult omxSP_FFTInv_CToC_SC16_Sfs_neon (
+ const OMX_SC16 *pSrc,
+ OMX_SC16 *pDst,
+ const OMXFFTSpec_C_SC16 *pFFTSpec,
+ OMX_INT scaleFactor
+);
+
+
+
+
+/**
+ * Function: omxSP_FFTInv_CToC_SC32_Sfs (2.2.4.2.4)
+ *
+ * Description:
+ * These functions compute an inverse FFT for a complex signal of length
+ * of 2^order, where 0 <= order <= 12. Transform length is determined by the
+ * specification structure, which must be initialized prior to calling the FFT
+ * function using the appropriate helper, i.e., <FFTInit_C_sc32> or
+ * <FFTInit_C_SC16>. The relationship between the input and output sequences
+ * can be expressed in terms of the IDFT, i.e.:
+ *
+ * x[n] = (2^(-scalefactor)/N) . SUM[k=0,...,N-1] X[k].e^(jnk.2.pi/N)
+ * n=0,1,2,...N-1
+ * N=2^order.
+ *
+ * Input Arguments:
+ * pSrc - pointer to the complex-valued input signal, of length 2^order ;
+ * must be aligned on a 32-byte boundary.
+ * pFFTSpec - pointer to the preallocated and initialized specification
+ * structure
+ * scaleFactor - scale factor of the output. Valid range is [0,32].
+ *
+ * Output Arguments:
+ * order
+ * pDst - pointer to the complex-valued output signal, of length 2^order;
+ * must be aligned on a 32-byte boundary.
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - returned if one or more of the following conditions
+ * is true:
+ * - one or more of the following pointers is NULL: pSrc, pDst, or
+ * pFFTSpec.
+ * - pSrc or pDst is not 32-byte aligned
+ * - scaleFactor<0 or scaleFactor>32
+ *
+ */
+OMXResult omxSP_FFTInv_CToC_SC32_Sfs (
+ const OMX_SC32 *pSrc,
+ OMX_SC32 *pDst,
+ const OMXFFTSpec_C_SC32 *pFFTSpec,
+ OMX_INT scaleFactor
+);
+
+
+
+/**
+ * Function: omxSP_FFTFwd_RToCCS_S16S32_Sfs (2.2.4.4.2)
+ *
+ * Description:
+ * These functions compute an FFT for a real-valued signal of length of 2^order,
+ * where 0 <= order <= 12. Transform length is determined by the
+ * specification structure, which must be initialized prior to calling the FFT
+ * function using the appropriate helper, i.e., <FFTInit_R_S16S32>.
+ * The relationship between the input and output sequences
+ * can be expressed in terms of the DFT, i.e.:
+ *
+ * x[n] = (2^(-scalefactor)/N) . SUM[k=0,...,N-1] X[k].e^(jnk.2.pi/N)
+ * n=0,1,2,...N-1
+ * N=2^order.
+ *
+ * The conjugate-symmetric output sequence is represented using a CCS vector,
+ * which is of length N+2, and is organized as follows:
+ *
+ * Index: 0 1 2 3 4 5 . . . N-2 N-1 N N+1
+ * Component: R0 0 R1 I1 R2 I2 . . . R[N/2-1] I[N/2-1] R[N/2] 0
+ *
+ * where R[n] and I[n], respectively, denote the real and imaginary components
+ * for FFT bin 'n'. Bins are numbered from 0 to N/2, where N is the FFT length.
+ * Bin index 0 corresponds to the DC component, and bin index N/2 corresponds to the
+ * foldover frequency.
+ *
+ * Input Arguments:
+ * pSrc - pointer to the real-valued input sequence, of length 2^order;
+ * must be aligned on a 32-byte boundary.
+ * pFFTSpec - pointer to the preallocated and initialized specification
+ * structure
+ * scaleFactor - output scale factor; valid range is [0, 32]
+ *
+ * Output Arguments:
+ * pDst - pointer to output sequence, represented using CCS format, of
+ * length (2^order)+2; must be aligned on a 32-byte boundary.
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments, if one or more of the following is true:
+ * - one of the pointers pSrc, pDst, or pFFTSpec is NULL
+ * - pSrc or pDst is not aligned on a 32-byte boundary
+ * - scaleFactor<0 or scaleFactor >32
+ *
+ */
+OMXResult omxSP_FFTFwd_RToCCS_S16S32_Sfs (
+ const OMX_S16 *pSrc,
+ OMX_S32 *pDst,
+ const OMXFFTSpec_R_S16S32 *pFFTSpec,
+ OMX_INT scaleFactor
+);
+
+
+
+/**
+ * Function: omxSP_FFTFwd_RToCCS_S32_Sfs (2.2.4.4.2)
+ *
+ * Description:
+ * These functions compute an FFT for a real-valued signal of length of 2^order,
+ * where 0 <= order <= 12. Transform length is determined by the
+ * specification structure, which must be initialized prior to calling the FFT
+ * function using the appropriate helper, i.e., <FFTInit_R_S32>.
+ * The relationship between the input and output sequences
+ * can be expressed in terms of the DFT, i.e.:
+ *
+ * x[n] = (2^(-scalefactor)/N) . SUM[k=0,...,N-1] X[k].e^(jnk.2.pi/N)
+ * n=0,1,2,...N-1
+ * N=2^order.
+ *
+ * The conjugate-symmetric output sequence is represented using a CCS vector,
+ * which is of length N+2, and is organized as follows:
+ *
+ * Index: 0 1 2 3 4 5 . . . N-2 N-1 N N+1
+ * Component: R0 0 R1 I1 R2 I2 . . . R[N/2-1] I[N/2-1] R[N/2] 0
+ *
+ * where R[n] and I[n], respectively, denote the real and imaginary components
+ * for FFT bin 'n'. Bins are numbered from 0 to N/2, where N is the FFT length.
+ * Bin index 0 corresponds to the DC component, and bin index N/2 corresponds to the
+ * foldover frequency.
+ *
+ * Input Arguments:
+ * pSrc - pointer to the real-valued input sequence, of length 2^order;
+ * must be aligned on a 32-byte boundary.
+ * pFFTSpec - pointer to the preallocated and initialized specification
+ * structure
+ * scaleFactor - output scale factor; valid range is [0, 32]
+ *
+ * Output Arguments:
+ * pDst - pointer to output sequence, represented using CCS format, of
+ * length (2^order)+2; must be aligned on a 32-byte boundary.
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments, if one or more of the following is true:
+ * - one of the pointers pSrc, pDst, or pFFTSpec is NULL
+ * - pSrc or pDst is not aligned on a 32-byte boundary
+ * - scaleFactor<0 or scaleFactor >32
+ *
+ */
+OMXResult omxSP_FFTFwd_RToCCS_S32_Sfs (
+ const OMX_S32 *pSrc,
+ OMX_S32 *pDst,
+ const OMXFFTSpec_R_S32 *pFFTSpec,
+ OMX_INT scaleFactor
+);
+
+/**
+ * Function: omxSP_FFTFwd_RToCCS_F32_Sfs
+ *
+ * Description:
+ * These functions compute an FFT for a real-valued signal of length
+ * of 2^order, where 0 <= order <= 12. Transform length is determined
+ * by the specification structure, which must be initialized prior to
+ * calling the FFT function using the appropriate helper, i.e.,
+ * <FFTInit_R_F32>. The relationship between the input and output
+ * sequences can be expressed in terms of the DFT, i.e.:
+ *
+ * x[n] = (2^(-scalefactor)/N) . SUM[k=0,...,N-1] X[k].e^(jnk.2.pi/N)
+ * n=0,1,2,...N-1
+ * N=2^order.
+ *
+ * The conjugate-symmetric output sequence is represented using a CCS vector,
+ * which is of length N+2, and is organized as follows:
+ *
+ * Index: 0 1 2 3 4 5 . . . N-2 N-1 N N+1
+ * Component: R0 0 R1 I1 R2 I2 . . . R[N/2-1] I[N/2-1] R[N/2] 0
+ *
+ * where R[n] and I[n], respectively, denote the real and imaginary
+ * components for FFT bin 'n'. Bins are numbered from 0 to N/2, where
+ * N is the FFT length. Bin index 0 corresponds to the DC component,
+ * and bin index N/2 corresponds to the foldover frequency.
+ *
+ * Input Arguments:
+ * pSrc - pointer to the real-valued input sequence, of length 2^order;
+ * must be aligned on a 32-byte boundary.
+ * pFFTSpec - pointer to the preallocated and initialized specification
+ * structure
+ *
+ * Output Arguments:
+ * pDst - pointer to output sequence, represented using CCS format, of
+ * length (2^order)+2; must be aligned on a 32-byte boundary.
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+
+ * OMX_Sts_BadArgErr - bad arguments, if one or more of the
+ * following is true: - one of the pointers pSrc, pDst, or pFFTSpec
+ * is NULL - pSrc or pDst is not aligned on a 32-byte boundary
+ *
+ */
+OMXResult omxSP_FFTFwd_RToCCS_F32_Sfs(
+ const OMX_F32* pSrc,
+ OMX_F32* pDst,
+ const OMXFFTSpec_R_F32* pFFTSpec
+);
+
+
+
+/**
+ * Function: omxSP_FFTInv_CCSToR_S32S16_Sfs (2.2.4.4.4)
+ *
+ * Description:
+ * These functions compute the inverse FFT for a conjugate-symmetric input
+ * sequence. Transform length is determined by the specification structure,
+ * which must be initialized prior to calling the FFT function using
+ * <FFTInit_R_S16S32>. For a transform of length M, the input sequence is
+ * represented using a packed CCS vector of length M+2, and is organized
+ * as follows:
+ *
+ * Index: 0 1 2 3 4 5 . . . M-2 M-1 M M+1
+ * Component R[0] 0 R[1] I[1] R[2] I[2] . . . R[M/2-1] I[M/2-1] R[M/2] 0
+ *
+ * where R[n] and I[n], respectively, denote the real and imaginary components for FFT bin n.
+ * Bins are numbered from 0 to M/2, where M is the FFT length. Bin index 0
+ * corresponds to the DC component, and bin index M/2 corresponds to the
+ * foldover frequency.
+ *
+ * Input Arguments:
+ * pSrc - pointer to the complex-valued input sequence represented using
+ * CCS format, of length (2^order) + 2; must be aligned on a 32-byte
+ * boundary.
+ * pFFTSpec - pointer to the preallocated and initialized specification
+ * structure
+ * scaleFactor - output scalefactor; range is [0,16]
+ *
+ * Output Arguments:
+ * pDst - pointer to the real-valued output sequence, of length 2^order ; must be
+ * aligned on a 32-byte boundary.
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments if one or more of the following is true:
+ * - pSrc, pDst, or pFFTSpec is NULL
+ * - pSrc or pDst is not aligned on a 32-byte boundary
+ * - scaleFactor<0 or scaleFactor >16
+ *
+ */
+OMXResult omxSP_FFTInv_CCSToR_S32S16_Sfs (
+ const OMX_S32 *pSrc,
+ OMX_S16 *pDst,
+ const OMXFFTSpec_R_S16S32 *pFFTSpec,
+ OMX_INT scaleFactor
+);
+
+
+
+/**
+ * Function: omxSP_FFTInv_CCSToR_S32_Sfs (2.2.4.4.4)
+ *
+ * Description:
+ * These functions compute the inverse FFT for a conjugate-symmetric input
+ * sequence. Transform length is determined by the specification structure,
+ * which must be initialized prior to calling the FFT function using
+ * <FFTInit_R_S32>. For a transform of length M, the input sequence is
+ * represented using a packed CCS vector of length M+2, and is organized
+ * as follows:
+ *
+ * Index: 0 1 2 3 4 5 . . . M-2 M-1 M M+1
+ * Component R[0] 0 R[1] I[1] R[2] I[2] . . . R[M/2-1] I[M/2-1] R[M/2] 0
+ *
+ * where R[n] and I[n], respectively, denote the real and imaginary components for FFT bin n.
+ * Bins are numbered from 0 to M/2, where M is the FFT length. Bin index 0
+ * corresponds to the DC component, and bin index M/2 corresponds to the
+ * foldover frequency.
+ *
+ * Input Arguments:
+ * pSrc - pointer to the complex-valued input sequence represented using
+ * CCS format, of length (2^order) + 2; must be aligned on a 32-byte
+ * boundary.
+ * pFFTSpec - pointer to the preallocated and initialized specification
+ * structure
+ * scaleFactor - output scalefactor; range is [0,32]
+ *
+ * Output Arguments:
+ * pDst - pointer to the real-valued output sequence, of length 2^order ; must be
+ * aligned on a 32-byte boundary.
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ * OMX_Sts_BadArgErr - bad arguments if one or more of the following is true:
+ * - pSrc, pDst, or pFFTSpec is NULL
+ * - pSrc or pDst is not aligned on a 32-byte boundary
+ * - scaleFactor<0 or scaleFactor >32
+ *
+ */
+OMXResult omxSP_FFTInv_CCSToR_S32_Sfs (
+ const OMX_S32 *pSrc,
+ OMX_S32 *pDst,
+ const OMXFFTSpec_R_S32 *pFFTSpec,
+ OMX_INT scaleFactor
+);
+
+/**
+ * Function: omxSP_FFTInv_CCSToR_F32_Sfs
+ *
+ * Description:
+ * These functions compute the inverse FFT for a conjugate-symmetric input
+ * sequence. Transform length is determined by the specification structure,
+ * which must be initialized prior to calling the FFT function using
+ * <FFTInit_R_F32>. For a transform of length M, the input sequence is
+ * represented using a packed CCS vector of length M+2, and is organized
+ * as follows:
+ *
+ * Index: 0 1 2 3 4 5 . . . M-2 M-1 M M+1
+ * Comp: R[0] 0 R[1] I[1] R[2] I[2] . . . R[M/2-1] I[M/2-1] R[M/2] 0
+ *
+ * where R[n] and I[n], respectively, denote the real and imaginary
+ * components for FFT bin n. Bins are numbered from 0 to M/2, where M
+ * is the FFT length. Bin index 0 corresponds to the DC component,
+ * and bin index M/2 corresponds to the foldover frequency.
+ *
+ * Input Arguments:
+ * pSrc - pointer to the complex-valued input sequence represented
+ * using CCS format, of length (2^order) + 2; must be aligned on a
+ * 32-byte boundary.
+ * pFFTSpec - pointer to the preallocated and initialized
+ * specification structure
+ *
+ * Output Arguments:
+ * pDst - pointer to the real-valued output sequence, of length
+ * 2^order ; must be aligned on a 32-byte boundary.
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+
+ * OMX_Sts_BadArgErr - bad arguments if one or more of the
+ * following is true:
+ * - pSrc, pDst, or pFFTSpec is NULL
+ * - pSrc or pDst is not aligned on a 32-byte boundary
+ * - scaleFactor<0 or scaleFactor >32
+ *
+ */
+OMXResult omxSP_FFTInv_CCSToR_F32_Sfs(
+ const OMX_F32* pSrc,
+ OMX_F32* pDst,
+ const OMXFFTSpec_R_F32* pFFTSpec
+);
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /** end of #define _OMXSP_H_ */
+
+/** EOF */
+
diff --git a/dl/omxSP_FFTFwd_CToC_FC32_Sfs_s.S b/dl/omxSP_FFTFwd_CToC_FC32_Sfs_s.S
new file mode 100644
index 0000000..65c1653
--- /dev/null
+++ b/dl/omxSP_FFTFwd_CToC_FC32_Sfs_s.S
@@ -0,0 +1,192 @@
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@// This is a modification of omxSP_FFTFwd_CToC_SC32_Sfs_s.s
+@// to support float instead of SC32.
+@//
+
+@//
+@// Description:
+@// Compute an inverse FFT for a complex signal
+@//
+@//
+
+
+@// Include standard headers
+
+#include "omxtypes_s.h"
+#include "armCOMM_s.h"
+
+@// Import symbols required from other files
+@// (For example tables)
+
+ .extern armSP_FFTFwd_CToC_FC32_Radix2_fs_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_FC32_Radix4_fs_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_FC32_Radix8_fs_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_FC32_Radix4_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_FC32_Radix2_OutOfPlace_unsafe
+
+@// Set debugging level
+@//DEBUG_ON SETL {TRUE}
+
+
+
+@// Guarding implementation by the processor name
+
+
+
+ @// Guarding implementation by the processor name
+
+@// Import symbols required from other files
+@// (For example tables)
+ .extern armSP_FFTFwd_CToC_FC32_Radix2_ls_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_FC32_Sfs_Radix2_ls_OutOfPlace_unsafe
+
+
+@//Input Registers
+
+#define pSrc r0
+#define pDst r1
+#define pFFTSpec r2
+
+
+@// Output registers
+#define result r0
+
+@//Local Scratch Registers
+
+#define argTwiddle r1
+#define argDst r2
+#define argScale r4
+#define tmpOrder r4
+#define pTwiddle r4
+#define pOut r5
+#define subFFTSize r7
+#define subFFTNum r6
+#define N r6
+#define order r14
+#define diff r9
+@// Total num of radix stages required to comple the FFT
+#define count r8
+#define x0r r4
+#define x0i r5
+#define diffMinusOne r2
+
+@// Neon registers
+
+#define dX0 D0.F32
+
+
+ @// Allocate stack memory required by the function
+
+ @// Write function header
+ M_START omxSP_FFTFwd_CToC_FC32_Sfs,r11,d15
+
+@ Structure offsets for the FFTSpec
+ .set ARMsFFTSpec_N, 0
+ .set ARMsFFTSpec_pBitRev, 4
+ .set ARMsFFTSpec_pTwiddle, 8
+ .set ARMsFFTSpec_pBuf, 12
+
+ @// Define stack arguments
+
+ @// Read the size from structure and take log
+ LDR N, [pFFTSpec, #ARMsFFTSpec_N]
+
+ @// Read other structure parameters
+ LDR pTwiddle, [pFFTSpec, #ARMsFFTSpec_pTwiddle]
+ LDR pOut, [pFFTSpec, #ARMsFFTSpec_pBuf]
+
+ CLZ order,N @// N = 2^order
+ RSB order,order,#31
+ MOV subFFTSize,#1
+ @//MOV subFFTNum,N
+
+ CMP order,#3
+ BGT orderGreaterthan3 @// order > 3
+
+ CMP order,#1
+ BGE orderGreaterthan0 @// order > 0
+ VLD1 dX0,[pSrc]
+ VST1 dX0,[pDst]
+ MOV pSrc,pDst
+ BLT FFTEnd
+
+orderGreaterthan0:
+ @// set the buffers appropriately for various orders
+ CMP order,#2
+ MOVNE argDst,pDst
+ MOVEQ argDst,pOut
+ @// Pass the first stage destination in RN5
+ MOVEQ pOut,pDst
+ MOV argTwiddle,pTwiddle
+
+ CMP order,#1
+ BGT orderGreaterthan1
+ @// order = 1
+ BL armSP_FFTFwd_CToC_FC32_Radix2_fs_OutOfPlace_unsafe
+ B FFTEnd
+
+orderGreaterthan1:
+ CMP order,#2
+ BGT orderGreaterthan2
+ @// order = 2
+ BL armSP_FFTFwd_CToC_FC32_Radix2_fs_OutOfPlace_unsafe
+ BL armSP_FFTFwd_CToC_FC32_Radix2_ls_OutOfPlace_unsafe
+ B FFTEnd
+
+orderGreaterthan2: @// order =3
+ BL armSP_FFTFwd_CToC_FC32_Radix2_fs_OutOfPlace_unsafe
+ BL armSP_FFTFwd_CToC_FC32_Radix2_OutOfPlace_unsafe
+ BL armSP_FFTFwd_CToC_FC32_Radix2_ls_OutOfPlace_unsafe
+ B FFTEnd
+
+orderGreaterthan3:
+ @// Set input args to fft stages
+ TST order, #2
+ MOVNE argDst,pDst
+ MOVEQ argDst,pOut
+ @// Pass the first stage destination in RN5
+ MOVEQ pOut,pDst
+ MOV argTwiddle,pTwiddle
+
+ @//check for even or odd order
+ @// NOTE: The following combination of BL's would work fine even though
+ @// the first BL would corrupt the flags. This is because the end of
+ @// the "grpZeroSetLoop" loop inside
+ @// armSP_FFTFwd_CToC_FC32_Radix4_fs_OutOfPlace_unsafe sets the Z flag
+ @// to EQ
+
+ TST order,#0x00000001
+ BLEQ armSP_FFTFwd_CToC_FC32_Radix4_fs_OutOfPlace_unsafe
+ BLNE armSP_FFTFwd_CToC_FC32_Radix8_fs_OutOfPlace_unsafe
+
+ CMP subFFTNum,#4
+ BLT FFTEnd
+
+
+unscaledRadix4Loop:
+ BEQ lastStageUnscaledRadix4
+ BL armSP_FFTFwd_CToC_FC32_Radix4_OutOfPlace_unsafe
+ CMP subFFTNum,#4
+ B unscaledRadix4Loop
+
+lastStageUnscaledRadix4:
+ BL armSP_FFTFwd_CToC_FC32_Radix4_ls_OutOfPlace_unsafe
+ B FFTEnd
+
+FFTEnd:
+
+ @// Set return value
+ MOV result, #OMX_Sts_NoErr
+
+ @// Write function tail
+ M_END
+
+ .end
diff --git a/dl/omxSP_FFTFwd_CToC_SC32_Sfs_s.S b/dl/omxSP_FFTFwd_CToC_SC32_Sfs_s.S
new file mode 100644
index 0000000..17287ec
--- /dev/null
+++ b/dl/omxSP_FFTFwd_CToC_SC32_Sfs_s.S
@@ -0,0 +1,335 @@
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@// This file was originally licensed as follows. It has been
+@// relicensed with permission from the copyright holders.
+@//
+@//
+@// File Name: omxSP_FFTFwd_CToC_SC32_Sfs_s.s
+@// OpenMAX DL: v1.0.2
+@// Last Modified Revision: 6684
+@// Last Modified Date: Mon, 09 Jul 2007
+@//
+@// (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+@//
+@//
+@//
+@// Description:
+@// Compute an inverse FFT for a complex signal
+@//
+
+
+@// Include standard headers
+
+#include "omxtypes_s.h"
+#include "armCOMM_s.h"
+
+@// Import symbols required from other files
+@// (For example tables)
+
+ .extern armSP_FFTFwd_CToC_SC32_Sfs_Radix2_fs_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_SC32_Radix2_fs_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_SC32_Radix4_fs_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_SC32_Radix8_fs_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_SC32_Radix4_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_SC32_Sfs_Radix4_fs_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_SC32_Sfs_Radix8_fs_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_SC32_Sfs_Radix4_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_SC32_Sfs_Radix2_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_SC32_Radix2_OutOfPlace_unsafe
+
+@// Set debugging level
+@//DEBUG_ON SETL {TRUE}
+
+
+
+@// Guarding implementation by the processor name
+
+
+
+ @// Guarding implementation by the processor name
+
+@// Import symbols required from other files
+@// (For example tables)
+ .extern armSP_FFTFwd_CToC_SC32_Radix4_ls_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_SC32_Radix2_ls_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_SC32_Sfs_Radix4_ls_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_SC32_Sfs_Radix2_ls_OutOfPlace_unsafe
+
+
+@//Input Registers
+
+#define pSrc r0
+#define pDst r1
+#define pFFTSpec r2
+#define scale r3
+
+
+@// Output registers
+#define result r0
+
+@//Local Scratch Registers
+
+#define argTwiddle r1
+#define argDst r2
+#define argScale r4
+#define tmpOrder r4
+#define pTwiddle r4
+#define pOut r5
+#define subFFTSize r7
+#define subFFTNum r6
+#define N r6
+#define order r14
+#define diff r9
+@// Total num of radix stages required to comple the FFT
+#define count r8
+#define x0r r4
+#define x0i r5
+#define diffMinusOne r2
+#define round r3
+
+@// Neon registers
+
+#define dX0 D0.S32
+#define dShift D1.S32
+
+
+
+ @// Allocate stack memory required by the function
+ M_ALLOC4 diffOnStack, 4
+
+ @// Write function header
+ M_START omxSP_FFTFwd_CToC_SC32_Sfs,r11,d15
+
+@ Structure offsets for the FFTSpec
+ .set ARMsFFTSpec_N, 0
+ .set ARMsFFTSpec_pBitRev, 4
+ .set ARMsFFTSpec_pTwiddle, 8
+ .set ARMsFFTSpec_pBuf, 12
+
+ @// Define stack arguments
+
+ @// Read the size from structure and take log
+ LDR N, [pFFTSpec, #ARMsFFTSpec_N]
+
+ @// Read other structure parameters
+ LDR pTwiddle, [pFFTSpec, #ARMsFFTSpec_pTwiddle]
+ LDR pOut, [pFFTSpec, #ARMsFFTSpec_pBuf]
+
+ CLZ order,N @// N = 2^order
+ RSB order,order,#31
+ MOV subFFTSize,#1
+ @//MOV subFFTNum,N
+
+ CMP order,#3
+ BGT orderGreaterthan3 @// order > 3
+
+ CMP order,#1
+ BGE orderGreaterthan0 @// order > 0
+ M_STR scale, diffOnStack,LT @// order = 0
+ VLD1 dX0,[pSrc]
+ VST1 dX0,[pDst]
+ MOV pSrc,pDst
+ BLT FFTEnd
+
+orderGreaterthan0:
+ @// set the buffers appropriately for various orders
+ CMP order,#2
+ MOVNE argDst,pDst
+ MOVEQ argDst,pOut
+ MOVEQ pOut,pDst @// Pass the first stage destination in RN5
+ MOV argTwiddle,pTwiddle
+
+ SUBS diff,scale,order
+ M_STR diff,diffOnStack
+ MOVGT scale,order
+ @// Now scale <= order
+
+ CMP order,#1
+ BGT orderGreaterthan1
+ SUBS scale,scale,#1
+ BLEQ armSP_FFTFwd_CToC_SC32_Sfs_Radix2_fs_OutOfPlace_unsafe @// order = 1
+ BLLT armSP_FFTFwd_CToC_SC32_Radix2_fs_OutOfPlace_unsafe @// order = 1
+ B FFTEnd
+
+orderGreaterthan1:
+ CMP order,#2
+ MOV argScale,scale
+ BGT orderGreaterthan2
+ SUBS argScale,argScale,#1
+ BLGE armSP_FFTFwd_CToC_SC32_Sfs_Radix2_fs_OutOfPlace_unsafe @// order =2
+ BLLT armSP_FFTFwd_CToC_SC32_Radix2_fs_OutOfPlace_unsafe
+ SUBS argScale,argScale,#1
+ BLEQ armSP_FFTFwd_CToC_SC32_Sfs_Radix2_ls_OutOfPlace_unsafe
+ BLLT armSP_FFTFwd_CToC_SC32_Radix2_ls_OutOfPlace_unsafe
+ B FFTEnd
+
+orderGreaterthan2: @// order =3
+ SUBS argScale,argScale,#1
+ BLGE armSP_FFTFwd_CToC_SC32_Sfs_Radix2_fs_OutOfPlace_unsafe // "fs" means first stage
+ BLLT armSP_FFTFwd_CToC_SC32_Radix2_fs_OutOfPlace_unsafe
+ SUBS argScale,argScale,#1
+ BLGE armSP_FFTFwd_CToC_SC32_Sfs_Radix2_OutOfPlace_unsafe
+ BLLT armSP_FFTFwd_CToC_SC32_Radix2_OutOfPlace_unsafe
+ SUBS argScale,argScale,#1
+ BLEQ armSP_FFTFwd_CToC_SC32_Sfs_Radix2_ls_OutOfPlace_unsafe // "ls" means last stage
+ BLLT armSP_FFTFwd_CToC_SC32_Radix2_ls_OutOfPlace_unsafe
+ B FFTEnd
+
+
+
+orderGreaterthan3:
+ @// check scale = 0 or scale = order
+ SUBS diff, scale, order @// scale > order
+ MOVGT scale,order
+ BGE specialScaleCase @// scale = 0 or scale = order
+ CMP scale,#0
+ BEQ specialScaleCase
+ B generalScaleCase
+
+specialScaleCase: @// scale = 0 or scale = order and order >= 2
+
+ TST order, #2 @// Set input args to fft stages
+ MOVNE argDst,pDst
+ MOVEQ argDst,pOut
+ MOVEQ pOut,pDst @// Pass the first stage destination in RN5
+ MOV argTwiddle,pTwiddle
+
+ CMP diff,#0
+ M_STR diff, diffOnStack
+ BGE scaleEqualsOrder
+
+ @//check for even or odd order
+ @// NOTE: The following combination of BL's would work fine eventhough the first
+ @// BL would corrupt the flags. This is because the end of the "grpZeroSetLoop" loop inside
+ @// armSP_FFTFwd_CToC_SC32_Radix4_fs_OutOfPlace_unsafe sets the Z flag to EQ
+
+ TST order,#0x00000001
+ BLEQ armSP_FFTFwd_CToC_SC32_Radix4_fs_OutOfPlace_unsafe
+ BLNE armSP_FFTFwd_CToC_SC32_Radix8_fs_OutOfPlace_unsafe
+
+ CMP subFFTNum,#4
+ BLT FFTEnd
+
+
+unscaledRadix4Loop:
+ BEQ lastStageUnscaledRadix4
+ BL armSP_FFTFwd_CToC_SC32_Radix4_OutOfPlace_unsafe
+ CMP subFFTNum,#4
+ B unscaledRadix4Loop
+
+lastStageUnscaledRadix4:
+ BL armSP_FFTFwd_CToC_SC32_Radix4_ls_OutOfPlace_unsafe
+ B FFTEnd
+
+
+scaleEqualsOrder:
+ @//check for even or odd order
+ @// NOTE: The following combination of BL's would work fine eventhough the first
+ @// BL would corrupt the flags. This is because the end of the "grpZeroSetLoop" loop inside
+ @// armSP_FFTFwd_CToC_SC32_Radix4_fs_OutOfPlace_unsafe sets the Z flag to EQ
+
+ TST order,#0x00000001
+ BLEQ armSP_FFTFwd_CToC_SC32_Sfs_Radix4_fs_OutOfPlace_unsafe
+ BLNE armSP_FFTFwd_CToC_SC32_Sfs_Radix8_fs_OutOfPlace_unsafe
+
+ CMP subFFTNum,#4
+ BLT FFTEnd
+
+
+scaledRadix4Loop:
+ BEQ lastStageScaledRadix4
+ BL armSP_FFTFwd_CToC_SC32_Sfs_Radix4_OutOfPlace_unsafe
+ CMP subFFTNum,#4
+ B scaledRadix4Loop
+
+lastStageScaledRadix4:
+ BL armSP_FFTFwd_CToC_SC32_Sfs_Radix4_ls_OutOfPlace_unsafe
+ B FFTEnd
+
+generalScaleCase: @// 0 < scale < order and order >= 2
+ @// Determine the correct destination buffer
+ SUB diff,order,scale
+ TST diff,#0x01
+ ADDEQ count,scale,diff,LSR #1 @// count = scale + (order - scale)/2
+ MOVNE count,order
+ TST count,#0x01 @// Is count even or odd ?
+
+ MOVNE argDst,pDst @// Set input args to fft stages
+ MOVEQ argDst,pOut
+ MOVEQ pOut,pDst @// Pass the first stage destination in RN5
+ MOV argTwiddle,pTwiddle
+
+ M_STR diff, diffOnStack
+
+ MOV argScale,scale @// Put scale in RN4 so as to save and restore
+ BL armSP_FFTFwd_CToC_SC32_Sfs_Radix2_fs_OutOfPlace_unsafe @// scaled first stage
+ SUBS argScale,argScale,#1
+
+scaledRadix2Loop:
+ BLGT armSP_FFTFwd_CToC_SC32_Sfs_Radix2_OutOfPlace_unsafe
+ SUBS argScale,argScale,#1 @// save and restore scale (RN4) in the scaled stages
+ BGT scaledRadix2Loop
+
+
+ M_LDR diff, diffOnStack
+ @//check for even or odd order
+ TST diff,#0x00000001
+ BEQ generalUnscaledRadix4Loop
+ B unscaledRadix2Loop
+
+generalUnscaledRadix4Loop:
+ CMP subFFTNum,#4
+ BEQ generalLastStageUnscaledRadix4
+ BL armSP_FFTFwd_CToC_SC32_Radix4_OutOfPlace_unsafe
+ B generalUnscaledRadix4Loop
+
+generalLastStageUnscaledRadix4:
+ BL armSP_FFTFwd_CToC_SC32_Radix4_ls_OutOfPlace_unsafe
+ B End
+
+
+unscaledRadix2Loop:
+ CMP subFFTNum,#2
+ BEQ generalLastStageUnscaledRadix2
+ BL armSP_FFTFwd_CToC_SC32_Radix2_OutOfPlace_unsafe
+ B unscaledRadix2Loop
+
+generalLastStageUnscaledRadix2:
+ BL armSP_FFTFwd_CToC_SC32_Radix2_ls_OutOfPlace_unsafe
+ B End
+
+
+FFTEnd: @// Does only the scaling
+
+ M_LDR diff, diffOnStack
+ CMP diff,#0
+ BLE End
+
+ RSB diff,diff,#0 @// to use VRSHL for right shift by a variable
+ VDUP dShift,diff
+
+scaleFFTData: @// N = subFFTSize ; dataptr = pDst ; scale = diff
+ VLD1 {dX0},[pSrc] @// pSrc contains pDst pointer
+ SUBS subFFTSize,subFFTSize,#1
+ VRSHL dX0,dShift
+ VST1 {dX0},[pSrc]!
+
+ BGT scaleFFTData
+
+
+
+End:
+ @// Set return value
+ MOV result, #OMX_Sts_NoErr
+
+ @// Write function tail
+ M_END
+
+ .end
diff --git a/dl/omxSP_FFTFwd_RToCCS_F32_Sfs_s.S b/dl/omxSP_FFTFwd_RToCCS_F32_Sfs_s.S
new file mode 100644
index 0000000..850fa9c
--- /dev/null
+++ b/dl/omxSP_FFTFwd_RToCCS_F32_Sfs_s.S
@@ -0,0 +1,406 @@
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@// This is a modification of omxSP_FFTFwd_RToCCS_S32_Sfs_s.s
+@// to support float instead of SC32.
+@//
+
+@//
+@// Description:
+@// Compute FFT for a real signal
+@//
+@//
+
+
+@// Include standard headers
+
+#include "omxtypes_s.h"
+#include "armCOMM_s.h"
+
+
+@// Import symbols required from other files
+@// (For example tables)
+
+ .extern armSP_FFTFwd_CToC_FC32_Radix2_fs_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_FC32_Radix4_fs_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_FC32_Radix8_fs_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_FC32_Radix4_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_FC32_Radix4_fs_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_FC32_Radix8_fs_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_FC32_Radix2_OutOfPlace_unsafe
+
+@// Set debugging level
+@//DEBUG_ON SETL {TRUE}
+
+
+
+@// Guarding implementation by the processor name
+
+
+
+ @// Guarding implementation by the processor name
+
+@// Import symbols required from other files
+@// (For example tables)
+ .extern armSP_FFTFwd_CToC_FC32_Radix4_ls_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_FC32_Radix2_ls_OutOfPlace_unsafe
+
+
+@//Input Registers
+
+#define pSrc r0
+#define pDst r1
+#define pFFTSpec r2
+#define scale r3
+
+
+@// Output registers
+#define result r0
+
+@//Local Scratch Registers
+
+#define argTwiddle r1
+#define argDst r2
+#define argScale r4
+#define tmpOrder r4
+#define pTwiddle r4
+#define pOut r5
+#define subFFTSize r7
+#define subFFTNum r6
+#define N r6
+#define order r14
+#define diff r9
+@// Total num of radix stages required to comple the FFT
+#define count r8
+#define x0r r4
+#define x0i r5
+#define diffMinusOne r2
+#define subFFTSizeTmp r6
+#define step r3
+#define step1 r4
+#define twStep r8
+#define zero r9
+#define pTwiddleTmp r5
+#define t0 r10
+
+@// Neon registers
+
+#define dX0 d0.f32
+#define dzero d1.f32
+#define dZero d2.f32
+#define dShift d3.f32
+#define dX0r d2.f32
+#define dX0i d3.f32
+#define dX1r d4.f32
+#define dX1i d5.f32
+#define dT0 d6.f32
+#define dT1 d7.f32
+#define dT2 d8.f32
+#define dT3 d9.f32
+#define qT0 d10.f32
+#define qT1 d12.f32
+#define dW0r d14.f32
+#define dW0i d15.f32
+#define dW1r d16.f32
+#define dW1i d17.f32
+#define dY0r d14.f32
+#define dY0i d15.f32
+#define dY1r d16.f32
+#define dY1i d17.f32
+#define dY0rS64 d14.s64
+#define dY0iS64 d15.s64
+#define qT2 d18.f32
+#define qT3 d20.f32
+@// lastThreeelements
+#define dX1 d3.f32
+#define dW0 d4.f32
+#define dW1 d5.f32
+#define dY0 d10.f32
+#define dY1 d11.f32
+#define dY2 d12.f32
+#define dY3 d13.f32
+
+#define half d0.f32
+
+HALF: .float 0.5
+
+ @// Allocate stack memory required by the function
+
+ @// Write function header
+ M_START omxSP_FFTFwd_RToCCS_F32_Sfs,r11,d15
+
+@ Structure offsets for the FFTSpec
+ .set ARMsFFTSpec_N, 0
+ .set ARMsFFTSpec_pBitRev, 4
+ .set ARMsFFTSpec_pTwiddle, 8
+ .set ARMsFFTSpec_pBuf, 12
+
+ @// Define stack arguments
+
+ @// Read the size from structure and take log
+ LDR N, [pFFTSpec, #ARMsFFTSpec_N]
+
+ @// Read other structure parameters
+ LDR pTwiddle, [pFFTSpec, #ARMsFFTSpec_pTwiddle]
+ LDR pOut, [pFFTSpec, #ARMsFFTSpec_pBuf]
+
+ @// N=1 Treat seperately
+ CMP N,#1
+ BGT sizeGreaterThanOne
+ VLD1 dX0[0],[pSrc]
+ MOV zero,#0
+ VMOV dzero[0],zero
+ VMOV dZero[0],zero
+ VST3 {dX0[0],dzero[0],dZero[0]},[pDst]
+
+ B End
+
+
+
+sizeGreaterThanOne:
+ @// Do a N/2 point complex FFT including the scaling
+
+ MOV N,N,ASR #1 @// N/2 point complex FFT
+
+ CLZ order,N @// N = 2^order
+ RSB order,order,#31
+ MOV subFFTSize,#1
+ @//MOV subFFTNum,N
+
+ CMP order,#3
+ BGT orderGreaterthan3 @// order > 3
+
+ CMP order,#1
+ BGE orderGreaterthan0 @// order > 0
+ VLD1 dX0,[pSrc]
+ VST1 dX0,[pOut]
+ MOV pSrc,pOut
+ MOV argDst,pDst
+ BLT FFTEnd
+
+orderGreaterthan0:
+ @// set the buffers appropriately for various orders
+ CMP order,#2
+ MOVEQ argDst,pDst
+ MOVNE argDst,pOut
+ @// Pass the first stage destination in RN5
+ MOVNE pOut,pDst
+ MOV argTwiddle,pTwiddle
+
+ CMP order,#1
+ BGT orderGreaterthan1
+ @// order = 1
+ BL armSP_FFTFwd_CToC_FC32_Radix2_fs_OutOfPlace_unsafe
+ B FFTEnd
+
+orderGreaterthan1:
+ CMP order,#2
+ BGT orderGreaterthan2
+ @// order =2
+ BL armSP_FFTFwd_CToC_FC32_Radix2_fs_OutOfPlace_unsafe
+ BL armSP_FFTFwd_CToC_FC32_Radix2_ls_OutOfPlace_unsafe
+ B FFTEnd
+
+orderGreaterthan2:@// order =3
+ BL armSP_FFTFwd_CToC_FC32_Radix2_fs_OutOfPlace_unsafe
+ BL armSP_FFTFwd_CToC_FC32_Radix2_OutOfPlace_unsafe
+ BL armSP_FFTFwd_CToC_FC32_Radix2_ls_OutOfPlace_unsafe
+
+ B FFTEnd
+
+
+
+orderGreaterthan3:
+specialScaleCase:
+
+ @// Set input args to fft stages
+ TST order, #2
+ MOVEQ argDst,pDst
+ MOVNE argDst,pOut
+ @// Pass the first stage destination in RN5
+ MOVNE pOut,pDst
+ MOV argTwiddle,pTwiddle
+
+ @//check for even or odd order
+ @// NOTE: The following combination of BL's would work fine even though
+ @// the first BL would corrupt the flags. This is because the end of
+ @// the "grpZeroSetLoop" loop inside
+ @// armSP_FFTFwd_CToC_FC32_Radix4_fs_OutOfPlace_unsafe sets the Z flag
+ @// to EQ
+
+ TST order,#0x00000001
+ BLEQ armSP_FFTFwd_CToC_FC32_Radix4_fs_OutOfPlace_unsafe
+ BLNE armSP_FFTFwd_CToC_FC32_Radix8_fs_OutOfPlace_unsafe
+
+ CMP subFFTNum,#4
+ BLT FFTEnd
+
+
+unscaledRadix4Loop:
+ BEQ lastStageUnscaledRadix4
+ BL armSP_FFTFwd_CToC_FC32_Radix4_OutOfPlace_unsafe
+ CMP subFFTNum,#4
+ B unscaledRadix4Loop
+
+lastStageUnscaledRadix4:
+ BL armSP_FFTFwd_CToC_FC32_Radix4_ls_OutOfPlace_unsafe
+ B FFTEnd
+
+
+FFTEnd:
+finalComplexToRealFixup:
+
+
+ @// F(0) = 1/2[Z(0) + Z'(0)] - j [Z(0) - Z'(0)]
+ @// 1/2[(a+jb) + (a-jb)] - j [(a+jb) - (a-jb)]
+ @// 1/2[2a+j0] - j [0+j2b]
+ @// (a+b, 0)
+
+ @// F(N/2) = 1/2[Z(0) + Z'(0)] + j [Z(0) - Z'(0)]
+ @// 1/2[(a+jb) + (a-jb)] + j [(a+jb) - (a-jb)]
+ @// 1/2[2a+j0] + j [0+j2b]
+ @// (a-b, 0)
+
+ @// F(0) and F(N/2)
+ VLD2 {dX0r[0],dX0i[0]},[pSrc]!
+ MOV zero,#0
+ VMOV dX0r[1],zero
+ MOV step,subFFTSize,LSL #3 @// step = N/2 * 8 bytes
+ VMOV dX0i[1],zero
+ @// twStep = 3N/8 * 8 bytes pointing to W^1
+ SUB twStep,step,subFFTSize,LSL #1
+
+ VADD dY0r,dX0r,dX0i @// F(0) = ((Z0.r+Z0.i) , 0)
+ MOV step1,subFFTSize,LSL #2 @// step1 = N/2 * 4 bytes
+ VSUB dY0i,dX0r,dX0i @// F(N/2) = ((Z0.r-Z0.i) , 0)
+ SUBS subFFTSize,subFFTSize,#2
+
+ VST1 dY0r,[argDst],step
+ ADD pTwiddleTmp,argTwiddle,#8 @// W^2
+ VST1 dY0i,[argDst]!
+ ADD argTwiddle,argTwiddle,twStep @// W^1
+
+ VDUP dzero,zero
+ SUB argDst,argDst,step
+
+ BLT End
+ BEQ lastElement
+ SUB step,step,#24
+ SUB step1,step1,#8 @// (N/4-1)*8 bytes
+
+ @// F(k) = 1/2[Z(k) + Z'(N/2-k)] -j*W^(k) [Z(k) - Z'(N/2-k)]
+ @// Note: W^k is stored as negative values in the table
+ @// Process 4 elements at a time. E.g: F(1),F(2) and F(N/2-2),F(N/2-1)
+ @// since both of them require Z(1),Z(2) and Z(N/2-2),Z(N/2-1)
+
+
+ LDR t0, =HALF
+ VLD1 half[0], [t0]
+
+evenOddButterflyLoop:
+
+
+ VLD1 dW0r,[argTwiddle],step1
+ VLD1 dW1r,[argTwiddle]!
+
+ VLD2 {dX0r,dX0i},[pSrc],step
+ SUB argTwiddle,argTwiddle,step1
+ VLD2 {dX1r,dX1i},[pSrc]!
+
+
+
+ SUB step1,step1,#8 @// (N/4-2)*8 bytes
+ VLD1 dW0i,[pTwiddleTmp],step1
+ VLD1 dW1i,[pTwiddleTmp]!
+ SUB pSrc,pSrc,step
+
+ SUB pTwiddleTmp,pTwiddleTmp,step1
+ VREV64 dX1r,dX1r
+ VREV64 dX1i,dX1i
+ SUBS subFFTSize,subFFTSize,#4
+
+
+
+ VSUB dT2,dX0r,dX1r @// a-c
+ SUB step1,step1,#8
+ VADD dT0,dX0r,dX1r @// a+c
+ VSUB dT1,dX0i,dX1i @// b-d
+ VADD dT3,dX0i,dX1i @// b+d
+ VMUL dT0,dT0,half[0]
+ VMUL dT1,dT1,half[0]
+ VZIP dW1r,dW1i
+ VZIP dW0r,dW0i
+
+
+ VMUL qT0,dW1r,dT2
+ VMUL qT1,dW1r,dT3
+ VMUL qT2,dW0r,dT2
+ VMUL qT3,dW0r,dT3
+
+ VMLA qT0,dW1i,dT3
+ VMLS qT1,dW1i,dT2
+
+ VMLS qT2,dW0i,dT3
+ VMLA qT3,dW0i,dT2
+
+
+ VMUL dX1r,qT0,half[0]
+ VMUL dX1i,qT1,half[0]
+
+ VSUB dY1r,dT0,dX1i @// F(N/2 -1)
+ VADD dY1i,dT1,dX1r
+ VNEG dY1i,dY1i
+
+ VREV64 dY1r,dY1r
+ VREV64 dY1i,dY1i
+
+
+ VMUL dX0r,qT2,half[0]
+ VMUL dX0i,qT3,half[0]
+
+ VSUB dY0r,dT0,dX0i @// F(1)
+ VADD dY0i,dT1,dX0r
+
+
+ VST2 {dY0r,dY0i},[argDst],step
+ VST2 {dY1r,dY1i},[argDst]!
+ SUB argDst,argDst,step
+ SUB step,step,#32 @// (N/2-4)*8 bytes
+
+
+ BGT evenOddButterflyLoop
+
+ @// set both the ptrs to the last element
+ SUB pSrc,pSrc,#8
+ SUB argDst,argDst,#8
+
+
+
+ @// Last element can be expanded as follows
+ @// 1/2[Z(k) + Z'(k)] + j w^k [Z(k) - Z'(k)]
+ @// 1/2[(a+jb) + (a-jb)] + j w^k [(a+jb) - (a-jb)]
+ @// 1/2[2a+j0] + j (c+jd) [0+j2b]
+ @// (a-bc, -bd)
+ @// Since (c,d) = (0,1) for the last element, result is just (a,-b)
+
+lastElement:
+ VLD1 dX0r,[pSrc]
+
+ VST1 dX0r[0],[argDst]!
+ VNEG dX0r,dX0r
+ VST1 dX0r[1],[argDst]!
+
+End:
+ @// Set return value
+ MOV result, #OMX_Sts_NoErr
+
+ @// Write function tail
+ M_END
+
+ .end
diff --git a/dl/omxSP_FFTFwd_RToCCS_S16S32_Sfs_s.S b/dl/omxSP_FFTFwd_RToCCS_S16S32_Sfs_s.S
new file mode 100644
index 0000000..73b02d0
--- /dev/null
+++ b/dl/omxSP_FFTFwd_RToCCS_S16S32_Sfs_s.S
@@ -0,0 +1,158 @@
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@// This file was originally licensed as follows. It has been
+@// relicensed with permission from the copyright holders.
+@//
+
+@//
+@// File Name: omxSP_FFTFwd_RToCCS_S16S32_Sfs_s.s
+@// OpenMAX DL: v1.0.2
+@// Last Modified Revision: 7403
+@// Last Modified Date: Mon, 17 Sep 2007
+@//
+@// (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+@//
+@//
+@//
+@// Description:
+@// Compute FFT for a real signal
+@//
+
+
+@// Include standard headers
+
+#include "omxtypes_s.h"
+#include "armCOMM_s.h"
+
+
+@// Import symbols required from other files
+@// (For example tables)
+ .extern omxSP_FFTFwd_RToCCS_S32_Sfs
+
+
+@// Set debugging level
+@//DEBUG_ON SETL {TRUE}
+
+
+
+@// Guarding implementation by the processor name
+
+
+
+ @// Guarding implementation by the processor name
+
+@// Import symbols required from other files
+@// (For example tables)
+
+
+@//Input Registers
+
+#define pSrc r0
+#define pDst r1
+#define pFFTSpec r2
+#define scale r3
+
+@// Output registers
+#define result r0
+
+#define pTmpDst r4
+#define pTmpSrc r5
+#define N r6
+#define order r7
+#define pOut r8
+
+@// Neon registers
+
+#define dX0 D0.S16
+#define qY0 Q1.S32
+#define dY0S32 D2.S32
+#define qX0 Q1.S32
+#define dY1S32 D3.S32
+#define dX0S32 D0.S32
+
+
+
+
+ @// Allocate stack memory required by the function
+
+ @// Write function header
+ M_START omxSP_FFTFwd_RToCCS_S16S32_Sfs,r11,d15
+
+@ Structure offsets for the FFTSpec
+ .set ARMsFFTSpec_N, 0
+ .set ARMsFFTSpec_pBitRev, 4
+ .set ARMsFFTSpec_pTwiddle, 8
+ .set ARMsFFTSpec_pBuf, 12
+
+ @// Define stack arguments
+
+ @// Read the size from structure and take log
+ LDR N, [pFFTSpec, #ARMsFFTSpec_N]
+
+ @// Read other structure parameters
+ @//LDR pTwiddle, [pFFTSpec, #ARMsFFTSpec_pTwiddle]
+ LDR pOut, [pFFTSpec, #ARMsFFTSpec_pBuf]
+
+
+ @// N=1 Treat seperately
+ CMP N,#1
+ BGT sizeGreaterThanOne
+ VLD1 dX0[0],[pSrc]
+ VMOVL qY0,dX0
+ VST1 dY0S32[0],[pDst]
+
+ MOV pSrc,pDst
+ B realS32FFT
+
+sizeGreaterThanOne:
+ MOV N,N,ASR #1
+
+ CLZ order,N @// N = 2^order
+ RSB order,order,#31
+
+ TST order,#1
+ MOVEQ pTmpDst,pOut
+ MOVNE pTmpDst,pDst
+ MOV pTmpSrc,pTmpDst
+
+ CMP N,#1
+ BGT copyS16ToS32
+ VLD1 dX0S32[0],[pSrc]
+ VMOVL qX0,dX0
+ VST1 dY0S32,[pTmpDst]
+ B setpSrc
+
+
+copyS16ToS32:
+
+ VLD1 dX0,[pSrc]!
+ SUBS N,N,#2
+ VMOVL qX0,dX0
+ VST1 {dY0S32,dY1S32},[pTmpDst]!
+ BGT copyS16ToS32
+
+setpSrc:
+ MOV pSrc,pTmpSrc
+
+
+
+realS32FFT:
+ BL omxSP_FFTFwd_RToCCS_S32_Sfs
+
+
+
+End:
+ @// Set return value
+ MOV result, #OMX_Sts_NoErr
+
+ @// Write function tail
+ M_END
+ .end
+
diff --git a/dl/omxSP_FFTFwd_RToCCS_S32_Sfs_s.S b/dl/omxSP_FFTFwd_RToCCS_S32_Sfs_s.S
new file mode 100644
index 0000000..eaef25e
--- /dev/null
+++ b/dl/omxSP_FFTFwd_RToCCS_S32_Sfs_s.S
@@ -0,0 +1,549 @@
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@// This file was originally licensed as follows. It has been
+@// relicensed with permission from the copyright holders.
+@//
+
+@//
+@// File Name: omxSP_FFTFwd_RToCCS_S32_Sfs_s.s
+@// OpenMAX DL: v1.0.2
+@// Last Modified Revision: 7810
+@// Last Modified Date: Thu, 04 Oct 2007
+@//
+@// (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+@//
+@//
+@//
+@// Description:
+@// Compute FFT for a real signal
+@//
+
+
+
+@// Include standard headers
+
+#include "omxtypes_s.h"
+#include "armCOMM_s.h"
+
+
+@// Import symbols required from other files
+@// (For example tables)
+
+ .extern armSP_FFTFwd_CToC_SC32_Sfs_Radix2_fs_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_SC32_Radix2_fs_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_SC32_Radix4_fs_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_SC32_Radix8_fs_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_SC32_Radix4_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_SC32_Sfs_Radix4_fs_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_SC32_Sfs_Radix8_fs_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_SC32_Sfs_Radix4_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_SC32_Sfs_Radix2_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_SC32_Radix2_OutOfPlace_unsafe
+
+@// Set debugging level
+@//DEBUG_ON SETL {TRUE}
+
+
+
+@// Guarding implementation by the processor name
+
+
+
+ @// Guarding implementation by the processor name
+
+@// Import symbols required from other files
+@// (For example tables)
+ .extern armSP_FFTFwd_CToC_SC32_Radix4_ls_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_SC32_Radix2_ls_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_SC32_Sfs_Radix4_ls_OutOfPlace_unsafe
+ .extern armSP_FFTFwd_CToC_SC32_Sfs_Radix2_ls_OutOfPlace_unsafe
+
+
+@//Input Registers
+
+#define pSrc r0
+#define pDst r1
+#define pFFTSpec r2
+#define scale r3
+
+
+@// Output registers
+#define result r0
+
+@//Local Scratch Registers
+
+#define argTwiddle r1
+#define argDst r2
+#define argScale r4
+#define tmpOrder r4
+#define pTwiddle r4
+#define pOut r5
+#define subFFTSize r7
+#define subFFTNum r6
+#define N r6
+#define order r14
+#define diff r9
+@// Total num of radix stages required to comple the FFT
+#define count r8
+#define x0r r4
+#define x0i r5
+#define diffMinusOne r2
+#define subFFTSizeTmp r6
+#define step r3
+#define step1 r4
+#define twStep r8
+#define zero r9
+#define pTwiddleTmp r5
+#define t0 r10
+
+@// Neon registers
+
+#define dX0 d0.s32
+#define dzero d1.s32
+#define dZero d2.s32
+#define dShift d3.s32
+#define dX0r d2.s32
+#define dX0i d3.s32
+#define dX1r d4.s32
+#define dX1i d5.s32
+#define dT0 d6.s32
+#define dT1 d7.s32
+#define dT2 d8.s32
+#define dT3 d9.s32
+#define qT0 q5.s64
+#define qT1 q6.s64
+#define dW0r d14.s32
+#define dW0i d15.s32
+#define dW1r d16.s32
+#define dW1i d17.s32
+#define dY0r d14.s32
+#define dY0i d15.s32
+#define dY1r d16.s32
+#define dY1i d17.s32
+#define dY0rS64 d14.s64
+#define dY0iS64 d15.s64
+#define qT2 q9.s64
+#define qT3 q10.s64
+@// lastThreeelements
+#define dX1 d3.s32
+#define dW0 d4.s32
+#define dW1 d5.s32
+#define dY0 d10.s32
+#define dY1 d11.s32
+#define dY2 d12.s32
+#define dY3 d13.s32
+
+ @// Allocate stack memory required by the function
+
+ M_ALLOC4 diffOnStack, 4
+
+ @// Write function header
+ M_START omxSP_FFTFwd_RToCCS_S32_Sfs,r11,d15
+
+@ Structure offsets for the FFTSpec
+ .set ARMsFFTSpec_N, 0
+ .set ARMsFFTSpec_pBitRev, 4
+ .set ARMsFFTSpec_pTwiddle, 8
+ .set ARMsFFTSpec_pBuf, 12
+
+ @// Define stack arguments
+
+ @// Read the size from structure and take log
+ LDR N, [pFFTSpec, #ARMsFFTSpec_N]
+
+ @// Read other structure parameters
+ LDR pTwiddle, [pFFTSpec, #ARMsFFTSpec_pTwiddle]
+ LDR pOut, [pFFTSpec, #ARMsFFTSpec_pBuf]
+
+ @// N=1 Treat seperately
+ CMP N,#1
+ BGT sizeGreaterThanOne
+ VLD1 dX0[0],[pSrc]
+ RSB scale,scale,#0 @// to use VRSHL for right shift by a variable
+ MOV zero,#0
+ VMOV dShift[0],scale
+ VMOV dzero[0],zero
+ VRSHL dX0,dShift
+ VMOV dZero[0],zero
+ VST3 {dX0[0],dzero[0],dZero[0]},[pDst]
+
+ B End
+
+
+
+sizeGreaterThanOne:
+ @// Do a N/2 point complex FFT including the scaling
+
+ MOV N,N,ASR #1 @// N/2 point complex FFT
+
+ CLZ order,N @// N = 2^order
+ RSB order,order,#31
+ MOV subFFTSize,#1
+ @//MOV subFFTNum,N
+
+ CMP order,#3
+ BGT orderGreaterthan3 @// order > 3
+
+ CMP order,#1
+ BGE orderGreaterthan0 @// order > 0
+ M_STR scale, diffOnStack,LT @// order = 0
+ VLD1 dX0,[pSrc]
+ VST1 dX0,[pOut]
+ MOV pSrc,pOut
+ MOV argDst,pDst
+ BLT FFTEnd
+
+orderGreaterthan0:
+ @// set the buffers appropriately for various orders
+ CMP order,#2
+ MOVEQ argDst,pDst
+ MOVNE argDst,pOut
+ MOVNE pOut,pDst @// Pass the first stage destination in RN5
+ MOV argTwiddle,pTwiddle
+
+ SUBS diff,scale,order
+ M_STR diff,diffOnStack
+ MOVGT scale,order
+ @// Now scale <= order
+
+ CMP order,#1
+ BGT orderGreaterthan1
+ SUBS scale,scale,#1
+ BLEQ armSP_FFTFwd_CToC_SC32_Sfs_Radix2_fs_OutOfPlace_unsafe @// order = 1
+ BLLT armSP_FFTFwd_CToC_SC32_Radix2_fs_OutOfPlace_unsafe @// order = 1
+ B FFTEnd
+
+orderGreaterthan1:
+ CMP order,#2
+ MOV argScale,scale
+ BGT orderGreaterthan2
+ SUBS argScale,argScale,#1
+ BLGE armSP_FFTFwd_CToC_SC32_Sfs_Radix2_fs_OutOfPlace_unsafe @// order =2
+ BLLT armSP_FFTFwd_CToC_SC32_Radix2_fs_OutOfPlace_unsafe
+ SUBS argScale,argScale,#1
+ BLEQ armSP_FFTFwd_CToC_SC32_Sfs_Radix2_ls_OutOfPlace_unsafe
+ BLLT armSP_FFTFwd_CToC_SC32_Radix2_ls_OutOfPlace_unsafe
+ B FFTEnd
+
+orderGreaterthan2:@// order =3
+ SUBS argScale,argScale,#1
+ BLGE armSP_FFTFwd_CToC_SC32_Sfs_Radix2_fs_OutOfPlace_unsafe
+ BLLT armSP_FFTFwd_CToC_SC32_Radix2_fs_OutOfPlace_unsafe
+ SUBS argScale,argScale,#1
+ BLGE armSP_FFTFwd_CToC_SC32_Sfs_Radix2_OutOfPlace_unsafe
+ BLLT armSP_FFTFwd_CToC_SC32_Radix2_OutOfPlace_unsafe
+ SUBS argScale,argScale,#1
+ BLEQ armSP_FFTFwd_CToC_SC32_Sfs_Radix2_ls_OutOfPlace_unsafe
+ BLLT armSP_FFTFwd_CToC_SC32_Radix2_ls_OutOfPlace_unsafe
+ B FFTEnd
+
+
+
+orderGreaterthan3:
+ @// check scale = 0 or scale = order
+ SUBS diff, scale, order @// scale > order
+ MOVGT scale,order
+ BGE specialScaleCase @// scale = 0 or scale = order
+ CMP scale,#0
+ BEQ specialScaleCase
+ B generalScaleCase
+
+specialScaleCase:@// scale = 0 or scale = order and order >= 2
+
+ TST order, #2 @// Set input args to fft stages
+ MOVEQ argDst,pDst
+ MOVNE argDst,pOut
+ MOVNE pOut,pDst @// Pass the first stage destination in RN5
+ MOV argTwiddle,pTwiddle
+
+ CMP diff,#0
+ M_STR diff, diffOnStack
+ BGE scaleEqualsOrder
+
+ @//check for even or odd order
+ @// NOTE: The following combination of BL's would work fine eventhough the first
+ @// BL would corrupt the flags. This is because the end of the "grpZeroSetLoop" loop inside
+ @// armSP_FFTFwd_CToC_SC32_Radix4_fs_OutOfPlace_unsafe sets the Z flag to EQ
+
+ TST order,#0x00000001
+ BLEQ armSP_FFTFwd_CToC_SC32_Radix4_fs_OutOfPlace_unsafe
+ BLNE armSP_FFTFwd_CToC_SC32_Radix8_fs_OutOfPlace_unsafe
+
+ CMP subFFTNum,#4
+ BLT FFTEnd
+
+
+unscaledRadix4Loop:
+ BEQ lastStageUnscaledRadix4
+ BL armSP_FFTFwd_CToC_SC32_Radix4_OutOfPlace_unsafe
+ CMP subFFTNum,#4
+ B unscaledRadix4Loop
+
+lastStageUnscaledRadix4:
+ BL armSP_FFTFwd_CToC_SC32_Radix4_ls_OutOfPlace_unsafe
+ B FFTEnd
+
+
+scaleEqualsOrder:
+ @//check for even or odd order
+ @// NOTE: The following combination of BL's would work fine eventhough the first
+ @// BL would corrupt the flags. This is because the end of the "grpZeroSetLoop" loop inside
+ @// armSP_FFTFwd_CToC_SC32_Radix4_fs_OutOfPlace_unsafe sets the Z flag to EQ
+
+ TST order,#0x00000001
+ BLEQ armSP_FFTFwd_CToC_SC32_Sfs_Radix4_fs_OutOfPlace_unsafe
+ BLNE armSP_FFTFwd_CToC_SC32_Sfs_Radix8_fs_OutOfPlace_unsafe
+
+ CMP subFFTNum,#4
+ BLT FFTEnd
+
+
+scaledRadix4Loop:
+ BEQ lastStageScaledRadix4
+ BL armSP_FFTFwd_CToC_SC32_Sfs_Radix4_OutOfPlace_unsafe
+ CMP subFFTNum,#4
+ B scaledRadix4Loop
+
+lastStageScaledRadix4:
+ BL armSP_FFTFwd_CToC_SC32_Sfs_Radix4_ls_OutOfPlace_unsafe
+ B FFTEnd
+
+generalScaleCase:@// 0 < scale < order and order >= 2
+ @// Determine the correct destination buffer
+ SUB diff,order,scale
+ TST diff,#0x01
+ ADDEQ count, scale,diff,lsr #1 @// count = scale + (order - scale)/2
+ MOVNE count, order
+ TST count, #0x01 @// Is count even or odd ?
+
+ MOVEQ argDst,pDst @// Set input args to fft stages
+ MOVNE argDst,pOut
+ MOVNE pOut,pDst @// Pass the first stage destination in RN5
+ MOV argTwiddle,pTwiddle
+
+ M_STR diff, diffOnStack
+
+ MOV argScale,scale @// Put scale in RN4 so as to save and restore
+ BL armSP_FFTFwd_CToC_SC32_Sfs_Radix2_fs_OutOfPlace_unsafe @// scaled first stage
+ SUBS argScale,argScale,#1
+
+scaledRadix2Loop:
+ BLGT armSP_FFTFwd_CToC_SC32_Sfs_Radix2_OutOfPlace_unsafe
+ SUBS argScale,argScale,#1 @// save and restore scale (RN4) in the scaled stages
+ BGT scaledRadix2Loop
+
+
+ M_LDR diff, diffOnStack
+ @//check for even or odd order
+ TST diff,#0x00000001
+ BEQ generalUnscaledRadix4Loop
+ B unscaledRadix2Loop
+
+generalUnscaledRadix4Loop:
+ CMP subFFTNum,#4
+ BEQ generalLastStageUnscaledRadix4
+ BL armSP_FFTFwd_CToC_SC32_Radix4_OutOfPlace_unsafe
+ B generalUnscaledRadix4Loop
+
+generalLastStageUnscaledRadix4:
+ BL armSP_FFTFwd_CToC_SC32_Radix4_ls_OutOfPlace_unsafe
+ B finalComplexToRealFixup
+
+
+unscaledRadix2Loop:
+ CMP subFFTNum,#2
+ BEQ generalLastStageUnscaledRadix2
+ BL armSP_FFTFwd_CToC_SC32_Radix2_OutOfPlace_unsafe
+ B unscaledRadix2Loop
+
+generalLastStageUnscaledRadix2:
+ BL armSP_FFTFwd_CToC_SC32_Radix2_ls_OutOfPlace_unsafe
+ B finalComplexToRealFixup
+
+
+FFTEnd:@// Does only the scaling
+
+ M_LDR diff, diffOnStack
+ CMP diff,#0
+ BLE finalComplexToRealFixup
+
+ RSB diff,diff,#0 @// to use VRSHL for right shift by a variable
+ VDUP dShift,diff
+
+ @// save subFFTSize and use tmpsubfftsize in the folowwing loop
+ MOV subFFTSizeTmp,subFFTSize @// subFFTSizeTmp same reg as subFFTNum
+
+scaleFFTData:@// N = subFFTSize ; dataptr = pDst ; scale = diff
+ VLD1 {dX0},[pSrc] @// pSrc contains pDst pointer
+ SUBS subFFTSizeTmp,subFFTSizeTmp,#1
+ VRSHL dX0,dShift
+ VST1 {dX0},[pSrc]!
+
+ BGT scaleFFTData
+
+ SUB pSrc,pSrc,subFFTSize,LSL #3 @// reset pSrc for final fixup
+
+ @// change the logic so that output after scaling is in pOut and not in pDst
+ @// finally store from pOut to pDst
+ @// change branch "End" to branch "finalComplexToRealFixup" in the above
+ @// chk the code below for multiplication by j factor
+
+finalComplexToRealFixup:
+
+
+ @// F(0) = 1/2[Z(0) + Z'(0)] - j [Z(0) - Z'(0)]
+ @// 1/2[(a+jb) + (a-jb)] - j [(a+jb) - (a-jb)]
+ @// 1/2[2a+j0] - j [0+j2b]
+ @// (a+b, 0)
+
+ @// F(N/2) = 1/2[Z(0) + Z'(0)] + j [Z(0) - Z'(0)]
+ @// 1/2[(a+jb) + (a-jb)] + j [(a+jb) - (a-jb)]
+ @// 1/2[2a+j0] + j [0+j2b]
+ @// (a-b, 0)
+
+ @// F(0) and F(N/2)
+ VLD2 {dX0r[0],dX0i[0]},[pSrc]!
+ MOV zero,#0
+ VMOV dX0r[1],zero
+ MOV step,subFFTSize,LSL #3 @// step = N/2 * 8 bytes
+ VMOV dX0i[1],zero
+ SUB twStep,step,subFFTSize,LSL #1 @// twStep = 3N/8 * 8 bytes pointing to W^1
+
+ VADD dY0r,dX0r,dX0i @// F(0) = ((Z0.r+Z0.i) , 0)
+ MOV step1,subFFTSize,LSL #2 @// step1 = N/2 * 4 bytes
+ VSUB dY0i,dX0r,dX0i @// F(N/2) = ((Z0.r-Z0.i) , 0)
+ SUBS subFFTSize,subFFTSize,#2
+
+ VST1 dY0r,[argDst],step
+ ADD pTwiddleTmp,argTwiddle,#8 @// W^2
+ VST1 dY0i,[argDst]!
+ ADD argTwiddle,argTwiddle,twStep @// W^1
+
+ VDUP dzero,zero
+ SUB argDst,argDst,step
+
+ BLT End
+ BEQ lastElement
+ SUB step,step,#24
+ SUB step1,step1,#8 @// (N/4-1)*8 bytes
+
+ @// F(k) = 1/2[Z(k) + Z'(N/2-k)] -j*W^(k) [Z(k) - Z'(N/2-k)]
+ @// Note: W^k is stored as negative values in the table
+ @// Process 4 elements at a time. E.g: F(1),F(2) and F(N/2-2),F(N/2-1) since both of them
+ @// require Z(1),Z(2) and Z(N/2-2),Z(N/2-1)
+
+
+evenOddButterflyLoop:
+
+
+ VLD1 dW0r,[argTwiddle],step1
+ VLD1 dW1r,[argTwiddle]!
+
+ VLD2 {dX0r,dX0i},[pSrc],step
+ SUB argTwiddle,argTwiddle,step1
+ VLD2 {dX1r,dX1i},[pSrc]!
+
+
+
+ SUB step1,step1,#8 @// (N/4-2)*8 bytes
+ VLD1 dW0i,[pTwiddleTmp],step1
+ VLD1 dW1i,[pTwiddleTmp]!
+ SUB pSrc,pSrc,step
+
+ SUB pTwiddleTmp,pTwiddleTmp,step1
+ VREV64 dX1r,dX1r
+ VREV64 dX1i,dX1i
+ SUBS subFFTSize,subFFTSize,#4
+
+
+
+ VSUB dT2,dX0r,dX1r @// a-c
+ SUB step1,step1,#8
+ VADD dT3,dX0i,dX1i @// b+d
+ VADD dT0,dX0r,dX1r @// a+c
+ VSUB dT1,dX0i,dX1i @// b-d
+ VHADD dT0,dT0,dzero
+ VHADD dT1,dT1,dzero
+
+ VZIP dW1r,dW1i
+ vzip dW0r,dW0i
+
+
+ VMULL qT0,dW1r,dT2
+ VMLAL qT0,dW1i,dT3
+ VMULL qT1,dW1r,dT3
+ VMLSL qT1,dW1i,dT2
+
+ VMULL qT2,dW0r,dT2
+ VMLSL qT2,dW0i,dT3
+ VMULL qT3,dW0r,dT3
+ VMLAL qT3,dW0i,dT2
+
+
+ VRSHRN dX1r,qT0,#32
+ VRSHRN dX1i,qT1,#32
+
+ VSUB dY1r,dT0,dX1i @// F(N/2 -1)
+ VADD dY1i,dT1,dX1r
+ VNEG dY1i,dY1i
+
+ VREV64 dY1r,dY1r
+ VREV64 dY1i,dY1i
+
+
+ VRSHRN dX0r,qT2,#32
+ VRSHRN dX0i,qT3,#32
+
+
+ VSUB dY0r,dT0,dX0i @// F(1)
+ VADD dY0i,dT1,dX0r
+
+
+ VST2 {dY0r,dY0i},[argDst],step
+ VST2 {dY1r,dY1i},[argDst]!
+ SUB argDst,argDst,step
+ SUB step,step,#32 @// (N/2-4)*8 bytes
+
+
+ BGT evenOddButterflyLoop
+
+ SUB pSrc,pSrc,#8 @// set both the ptrs to the last element
+ SUB argDst,argDst,#8
+
+
+
+ @// Last element can be expanded as follows
+ @// 1/2[Z(k) + Z'(k)] + j w^k [Z(k) - Z'(k)]
+ @// 1/2[(a+jb) + (a-jb)] + j w^k [(a+jb) - (a-jb)]
+ @// 1/2[2a+j0] + j (c+jd) [0+j2b]
+ @// (a-bc, -bd)
+ @// Since (c,d) = (0,1) for the last element, result is just (a,-b)
+
+lastElement:
+ VLD1 dX0r,[pSrc]
+
+ VST1 dX0r[0],[argDst]!
+ VNEG dX0r,dX0r
+ VST1 dX0r[1],[argDst]!
+
+
+
+
+
+
+End:
+ @// Set return value
+ MOV result, #OMX_Sts_NoErr
+
+ @// Write function tail
+ M_END
+
+ .end
+
diff --git a/dl/omxSP_FFTGetBufSize_C_FC32.c b/dl/omxSP_FFTGetBufSize_C_FC32.c
new file mode 100644
index 0000000..3d43686
--- /dev/null
+++ b/dl/omxSP_FFTGetBufSize_C_FC32.c
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ */
+
+#include "armOMX.h"
+#include "armSP.h"
+#include "omxSP.h"
+#include "omxtypes.h"
+
+
+/**
+ * Function: omxSP_FFTGetBufSize_C_FC32
+ *
+ * Description:
+ * These functions compute the size of the specification structure
+ * required for the length 2^order complex FFT and IFFT functions. The function
+ * <FFTGetBufSize_C_FC32> is used in conjunction with the 32-bit functions
+ * <FFTFwd_CToC_FC32_Sfs> and <FFTInv_CToC_FC32_Sfs>.
+ *
+ * Input Arguments:
+ *
+ * order - base-2 logarithm of the desired block length; valid in the range
+ * [0,12] ([0,15] if BIG_FFT_TABLE is defined.)
+ *
+ * Output Arguments:
+ *
+ * pSize - pointer to the number of bytes required for the specification
+ * structure
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ *
+ *
+ */
+
+OMXResult omxSP_FFTGetBufSize_C_FC32(OMX_INT order, OMX_INT *pSize) {
+ if (!pSize || (order < 0) || (order > TWIDDLE_TABLE_ORDER))
+ return OMX_Sts_BadArgErr;
+ /*
+ * The required size is the same as for C_SC32, because the
+ * elements are the same size and because ARMsFFTSpec_SC32 is
+ * the same size as ARMsFFTSpec_FC32.
+ */
+ return omxSP_FFTGetBufSize_C_SC32(order, pSize);
+}
diff --git a/dl/omxSP_FFTGetBufSize_C_SC16.c b/dl/omxSP_FFTGetBufSize_C_SC16.c
new file mode 100644
index 0000000..7a19848
--- /dev/null
+++ b/dl/omxSP_FFTGetBufSize_C_SC16.c
@@ -0,0 +1,98 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ *
+ * This file was originally licensed as follows. It has been
+ * relicensed with permission from the copyright holders.
+ */
+
+/**
+ *
+ * File Name: omxSP_FFTGetBufSize_C_SC16.c
+ * OpenMAX DL: v1.0.2
+ * Last Modified Revision: 9468
+ * Last Modified Date: Thu, 03 Jan 2008
+ *
+ * (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+ *
+ *
+ * Description:
+ * Compute the size of the specification structure required
+ */
+
+#include "omxtypes.h"
+#include "armOMX.h"
+#include "omxSP.h"
+
+#include "armCOMM.h"
+#include "armSP.h"
+
+
+/**
+ * Function: omxSP_FFTGetBufSize_C_SC16 (2.2.4.1.6)
+ *
+ * Description:
+ * These functions compute the size of the specification structure
+ * required for the length 2^order complex FFT and IFFT functions. The function
+ * <FFTGetBufSize_C_SC16> is used in conjunction with the 16-bit functions
+ * <FFTFwd_CToC_SC16_Sfs> and <FFTInv_CToC_SC16_Sfs>.
+ *
+ * Input Arguments:
+ *
+ * order - base-2 logarithm of the desired block length; valid in the range
+ * [0,12]
+ *
+ * Output Arguments:
+ *
+ * pSize - pointer to the number of bytes required for the specification
+ * structure
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ *
+ *
+ */
+
+
+
+OMXResult omxSP_FFTGetBufSize_C_SC16(
+ OMX_INT order,
+ OMX_INT *pSize)
+{
+
+ OMX_INT N,twiddleSize;
+
+ /* Check for order zero */
+ if (order == 0)
+ {
+ *pSize = sizeof(ARMsFFTSpec_SC16);
+ return OMX_Sts_NoErr;
+ }
+
+
+ N = 1 << order;
+
+ /*The max size of the twiddle table needed is 3N/4 for a radix-4 stage*/
+ twiddleSize = 3*N/4;
+
+ /* 2 pointers to store bitreversed array and twiddle factor array */
+ *pSize = sizeof(ARMsFFTSpec_SC16)
+ /* Twiddle factors */
+ + sizeof(OMX_SC16) * twiddleSize
+ /* Ping Pong buffer */
+ + sizeof(OMX_SC16) * N
+ + 62 ; /* Extra bytes to get 32 byte alignment of ptwiddle and pBuf */
+
+ return OMX_Sts_NoErr;
+}
+
+/*****************************************************************************
+ * END OF FILE
+ *****************************************************************************/
+
diff --git a/dl/omxSP_FFTGetBufSize_C_SC32.c b/dl/omxSP_FFTGetBufSize_C_SC32.c
new file mode 100644
index 0000000..c7ef65b
--- /dev/null
+++ b/dl/omxSP_FFTGetBufSize_C_SC32.c
@@ -0,0 +1,94 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ *
+ * This file was originally licensed as follows. It has been
+ * relicensed with permission from the copyright holders.
+ */
+
+/**
+ *
+ * File Name: omxSP_FFTGetBufSize_C_SC32.c
+ * OpenMAX DL: v1.0.2
+ * Last Modified Revision: 9468
+ * Last Modified Date: Thu, 03 Jan 2008
+ *
+ * (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+ *
+ *
+ * Description:
+ * Compute the size of the specification structure required
+ */
+
+#include "omxtypes.h"
+#include "armOMX.h"
+#include "omxSP.h"
+
+#include "armSP.h"
+
+/**
+ * Function: omxSP_FFTGetBufSize_C_SC32 (2.2.4.1.6)
+ *
+ * Description:
+ * These functions compute the size of the specification structure
+ * required for the length 2^order complex FFT and IFFT functions. The function
+ * <FFTGetBufSize_C_SC32> is used in conjunction with the 32-bit functions
+ * <FFTFwd_CToC_SC32_Sfs> and <FFTInv_CToC_SC32_Sfs>.
+ *
+ * Input Arguments:
+ *
+ * order - base-2 logarithm of the desired block length; valid in the range
+ * [0,12]
+ *
+ * Output Arguments:
+ *
+ * pSize - pointer to the number of bytes required for the specification
+ * structure
+ *
+ * Return Value:
+ *
+ * OMX_Sts_NoErr - no error
+ *
+ *
+ */
+
+
+OMXResult omxSP_FFTGetBufSize_C_SC32(
+ OMX_INT order,
+ OMX_INT *pSize)
+{
+
+ OMX_INT N,twiddleSize;
+
+ /* Check for order zero */
+ if (order == 0)
+ {
+ *pSize = sizeof(ARMsFFTSpec_SC32);
+ return OMX_Sts_NoErr;
+ }
+
+
+ N = 1 << order;
+
+ /*The max size of the twiddle table needed is 3N/4 for a radix-4 stage*/
+ twiddleSize = 3*N/4;
+
+ *pSize = sizeof(ARMsFFTSpec_SC32)
+ /* N Twiddle factors */
+ + sizeof(OMX_SC32) * twiddleSize
+ /* Ping Pong buffer */
+ + sizeof(OMX_SC32) * N
+ + 62 ; /* Extra bytes to get 32 byte alignment of ptwiddle and pBuf */
+
+ return OMX_Sts_NoErr;
+}
+
+/*****************************************************************************
+ * END OF FILE
+ *****************************************************************************/
+
diff --git a/dl/omxSP_FFTGetBufSize_R_F32.c b/dl/omxSP_FFTGetBufSize_R_F32.c
new file mode 100644
index 0000000..9f2787b
--- /dev/null
+++ b/dl/omxSP_FFTGetBufSize_R_F32.c
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ *
+ */
+
+#include "armCOMM.h"
+#include "armOMX.h"
+#include "armSP.h"
+#include "omxSP.h"
+#include "omxtypes.h"
+
+/**
+ * Function: omxSP_FFTGetBufSize_R_F32
+ *
+ * Description:
+ * Computes the size of the specification structure required for the length
+ * 2^order real FFT and IFFT functions.
+ *
+ * Remarks:
+ * This function is used in conjunction with the 32-bit functions
+ * <FFTFwd_RToCCS_F32_Sfs> and <FFTInv_CCSToR_F32_Sfs>.
+ *
+ * Parameters:
+ * [in] order base-2 logarithm of the length; valid in the range
+ * [0,12]. ([0,15] if BIG_FFT_TABLE is defined.)
+ * [out] pSize pointer to the number of bytes required for the
+ * specification structure.
+ *
+ * Return Value:
+ * Standard omxError result. See enumeration for possible result codes.
+ *
+ */
+
+OMXResult omxSP_FFTGetBufSize_R_F32(OMX_INT order, OMX_INT *pSize) {
+ if (!pSize || (order < 0) || (order > TWIDDLE_TABLE_ORDER))
+ return OMX_Sts_BadArgErr;
+
+ /*
+ * The required size is the same as for R_S32, because the
+ * elements are the same size and because ARMsFFTSpec_R_SC32 is
+ * the same size as ARMsFFTSpec_R_FC32.
+ */
+ return omxSP_FFTGetBufSize_R_S32(order, pSize);
+}
diff --git a/dl/omxSP_FFTGetBufSize_R_S16S32.c b/dl/omxSP_FFTGetBufSize_R_S16S32.c
new file mode 100644
index 0000000..26f1f31
--- /dev/null
+++ b/dl/omxSP_FFTGetBufSize_R_S16S32.c
@@ -0,0 +1,92 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ *
+ * This file was originally licensed as follows. It has been
+ * relicensed with permission from the copyright holders.
+ */
+
+/**
+ *
+ * File Name: omxSP_FFTGetBufSize_R_S16S32.c
+ * OpenMAX DL: v1.0.2
+ * Last Modified Revision: 7777
+ * Last Modified Date: Thu, 27 Sep 2007
+ *
+ * (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+ *
+ *
+ * Description:
+ * Computes the size of the specification structure required.
+ */
+
+#include "omxtypes.h"
+#include "armOMX.h"
+#include "omxSP.h"
+#include "armCOMM.h"
+#include "armSP.h"
+
+/**
+ * Function: omxSP_FFTGetBufSize_R_S16S32
+ *
+ * Description:
+ * Computes the size of the specification structure required for the length
+ * 2^order real FFT and IFFT functions.
+ *
+ * Remarks:
+ * This function is used in conjunction with the 16-bit functions
+ * <FFTFwd_RToCCS_S16_S32_Sfs> and <FFTInv_CCSToR_S32_S16_Sfs>.
+ *
+ * Parameters:
+ * [in] order base-2 logarithm of the length; valid in the range
+ * [0,12].
+ * [out] pSize pointer to the number of bytes required for the
+ * specification structure.
+ *
+ * Return Value:
+ * Standard omxError result. See enumeration for possible result codes.
+ *
+ */
+
+OMXResult omxSP_FFTGetBufSize_R_S16S32(
+ OMX_INT order,
+ OMX_INT *pSize
+ )
+{
+ OMX_INT NBy2,N,twiddleSize;
+
+
+ /* Check for order zero */
+ if (order == 0)
+ {
+ *pSize = sizeof(ARMsFFTSpec_R_SC32)
+ + sizeof(OMX_S32) * (2); /* Extra size 'N' is used in FFTInv_CCSToR_S32S16_Sfs as a temporary buf */
+
+ return OMX_Sts_NoErr;
+ }
+
+ NBy2 = 1 << (order - 1);
+ N = NBy2<<1;
+ twiddleSize = 5*N/8; /* 3/4(N/2) + N/4 */
+
+ /* 2 pointers to store bitreversed array and twiddle factor array */
+ *pSize = sizeof(ARMsFFTSpec_R_SC32)
+ /* Twiddle factors */
+ + sizeof(OMX_SC32) * twiddleSize
+ /* Ping Pong buffer for doing the N/2 point complex FFT */
+ + sizeof(OMX_S32) * (N<<1) /* Extra size 'N' is used in FFTInv_CCSToR_S32S16_Sfs as a temporary buf */
+ + 62 ; /* Extra bytes to get 32 byte alignment of ptwiddle and pBuf */
+
+
+ return OMX_Sts_NoErr;
+}
+
+/*****************************************************************************
+ * END OF FILE
+ *****************************************************************************/
+
diff --git a/dl/omxSP_FFTGetBufSize_R_S32.c b/dl/omxSP_FFTGetBufSize_R_S32.c
new file mode 100644
index 0000000..0be596e
--- /dev/null
+++ b/dl/omxSP_FFTGetBufSize_R_S32.c
@@ -0,0 +1,92 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ *
+ * This file was originally licensed as follows. It has been
+ * relicensed with permission from the copyright holders.
+ */
+
+/**
+ *
+ * File Name: omxSP_FFTGetBufSize_R_S32.c
+ * OpenMAX DL: v1.0.2
+ * Last Modified Revision: 7777
+ * Last Modified Date: Thu, 27 Sep 2007
+ *
+ * (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+ *
+ *
+ * Description:
+ * Computes the size of the specification structure required.
+ */
+
+#include "omxtypes.h"
+#include "armOMX.h"
+#include "omxSP.h"
+#include "armCOMM.h"
+#include "armSP.h"
+
+/**
+ * Function: omxSP_FFTGetBufSize_R_S32
+ *
+ * Description:
+ * Computes the size of the specification structure required for the length
+ * 2^order real FFT and IFFT functions.
+ *
+ * Remarks:
+ * This function is used in conjunction with the 32-bit functions
+ * <FFTFwd_RToCCS_S32_Sfs> and <FFTInv_CCSToR_S32_Sfs>.
+ *
+ * Parameters:
+ * [in] order base-2 logarithm of the length; valid in the range
+ * [0,12].
+ * [out] pSize pointer to the number of bytes required for the
+ * specification structure.
+ *
+ * Return Value:
+ * Standard omxError result. See enumeration for possible result codes.
+ *
+ */
+
+OMXResult omxSP_FFTGetBufSize_R_S32(
+ OMX_INT order,
+ OMX_INT *pSize
+ )
+{
+ OMX_INT NBy2,N,twiddleSize;
+
+
+ /* Check for order zero */
+ if (order == 0)
+ {
+ *pSize = sizeof(ARMsFFTSpec_R_SC32)
+ + sizeof(OMX_S32) * (2); /* Extra size 'N' is used in FFTInv_CCSToR_S32S16_Sfs as a temporary buf */
+
+ return OMX_Sts_NoErr;
+ }
+
+ NBy2 = 1 << (order - 1);
+ N = NBy2<<1;
+ twiddleSize = 5*N/8; /* 3/4(N/2) + N/4 */
+
+ /* 2 pointers to store bitreversed array and twiddle factor array */
+ *pSize = sizeof(ARMsFFTSpec_R_SC32)
+ /* Twiddle factors */
+ + sizeof(OMX_SC32) * twiddleSize
+ /* Ping Pong buffer for doing the N/2 point complex FFT */
+ + sizeof(OMX_S32) * (N<<1) /* Extra size 'N' is used in FFTInv_CCSToR_S32_Sfs as a temporary buf */
+ + 62 ; /* Extra bytes to get 32 byte alignment of ptwiddle and pBuf */
+
+
+ return OMX_Sts_NoErr;
+}
+
+/*****************************************************************************
+ * END OF FILE
+ *****************************************************************************/
+
diff --git a/dl/omxSP_FFTInit_C_FC32.c b/dl/omxSP_FFTInit_C_FC32.c
new file mode 100644
index 0000000..7cb15ed
--- /dev/null
+++ b/dl/omxSP_FFTInit_C_FC32.c
@@ -0,0 +1,168 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ *
+ * This is a modification of omxSP_FFTInit_C_SC32.c to support
+ * complex float instead of SC32.
+ */
+
+#include "armCOMM.h"
+#include "armOMX.h"
+#include "armSP.h"
+#include "omxSP.h"
+#include "omxtypes.h"
+
+
+/**
+ * Function: omxSP_FFTInit_C_FC32
+ *
+ * Description:
+ * Initializes the specification structures required for the
+ * complex FFT and IFFT functions.
+ *
+ * Remarks:
+ * Desired block length is specified as an input. The function is used to
+ * initialize the specification structures for functions <FFTFwd_CToC_FC32_Sfs>
+ * and <FFTInv_CToC_FC32_Sfs>. Memory for the specification structure *pFFTSpec
+ * must be allocated prior to calling this function. The space required for
+ * *pFFTSpec, in bytes, can be determined using <FFTGetBufSize_C_FC32>.
+ *
+ * Parameters:
+ * [in] order base-2 logarithm of the desired block length;
+ * valid in the range [0,12].
+ * [out] pFFTSpec pointer to initialized specification structure.
+ *
+ * Return Value:
+ * Standard omxError result. See enumeration for possible result codes.
+ *
+ */
+
+OMXResult omxSP_FFTInit_C_FC32(OMXFFTSpec_C_FC32* pFFTSpec, OMX_INT order) {
+ OMX_INT i;
+ OMX_INT j;
+ OMX_FC32* pTwiddle;
+ OMX_FC32* pBuf;
+ OMX_U16* pBitRev;
+ OMX_U32 pTmp;
+ OMX_INT Nby2;
+ OMX_INT N;
+ OMX_INT M;
+ OMX_INT diff;
+ OMX_INT step;
+ ARMsFFTSpec_FC32* pFFTStruct = 0;
+ OMX_F32 x;
+ OMX_F32 y;
+ OMX_F32 xNeg;
+
+ pFFTStruct = (ARMsFFTSpec_FC32 *) pFFTSpec;
+
+ /* if order zero no init is needed */
+ if (order == 0) {
+ pFFTStruct->N = 1;
+ return OMX_Sts_NoErr;
+ }
+
+ /* Validate args */
+ if (!pFFTSpec || (order < 0) || (order > TWIDDLE_TABLE_ORDER))
+ return OMX_Sts_BadArgErr;
+
+ /* Do the initializations */
+ Nby2 = 1 << (order - 1);
+ N = Nby2 << 1;
+ M = N >> 3;
+
+ /* optimized implementations don't use bitreversal */
+ pBitRev = NULL;
+
+ pTwiddle = (OMX_FC32 *) (sizeof(ARMsFFTSpec_FC32) + (OMX_S8*) pFFTSpec);
+
+ /* Align to 32 byte boundary */
+ pTmp = ((OMX_U32) pTwiddle) & 31;
+ if (pTmp)
+ pTwiddle = (OMX_FC32*) ((OMX_S8*)pTwiddle + (32 - pTmp));
+
+ pBuf = (OMX_FC32*) (sizeof(OMX_FC32) * (3 * N / 4) + (OMX_S8*) pTwiddle);
+
+ /* Align to 32 byte boundary */
+ pTmp = ((OMX_U32)pBuf) & 31;
+ if (pTmp)
+ pBuf = (OMX_FC32*) ((OMX_S8*)pBuf + (32 - pTmp));
+
+ /*
+ * Filling Twiddle factors :
+ *
+ * The original twiddle table "armSP_FFT_S32TwiddleTable" is of size
+ * (MaxSize/8 + 1) Rest of the values i.e., upto MaxSize are
+ * calculated using the symmetries of sin and cos The max size of
+ * the twiddle table needed is 3N/4 for a radix-4 stage
+ *
+ * W = (-2 * PI) / N
+ * N = 1 << order
+ * W = -PI >> (order - 1)
+ */
+
+ diff = TWIDDLE_TABLE_ORDER - order;
+ /* step into the twiddle table for the current order */
+ step = 1 << diff;
+
+ x = armSP_FFT_F32TwiddleTable[0];
+ y = armSP_FFT_F32TwiddleTable[1];
+ xNeg = 1;
+
+ if (order >= 3) {
+ /* i = 0 case */
+ pTwiddle[0].Re = x;
+ pTwiddle[0].Im = y;
+ pTwiddle[2 * M].Re = -y;
+ pTwiddle[2 * M].Im = xNeg;
+ pTwiddle[4 * M].Re = xNeg;
+ pTwiddle[4 * M].Im = y;
+
+ for (i = 1; i <= M; i++) {
+ j = i * step;
+
+ x = armSP_FFT_F32TwiddleTable[2 * j];
+ y = armSP_FFT_F32TwiddleTable[2 * j + 1];
+
+ pTwiddle[i].Re = x;
+ pTwiddle[i].Im = y;
+ pTwiddle[2 * M - i].Re = -y;
+ pTwiddle[2 * M - i].Im = -x;
+ pTwiddle[2 * M + i].Re = y;
+ pTwiddle[2 * M + i].Im = -x;
+ pTwiddle[4 * M - i].Re = -x;
+ pTwiddle[4 * M - i].Im = y;
+ pTwiddle[4 * M + i].Re = -x;
+ pTwiddle[4 * M + i].Im = -y;
+ pTwiddle[6 * M - i].Re = y;
+ pTwiddle[6 * M - i].Im = x;
+ }
+ } else if (order == 2) {
+ pTwiddle[0].Re = x;
+ pTwiddle[0].Im = y;
+ pTwiddle[1].Re = -y;
+ pTwiddle[1].Im = xNeg;
+ pTwiddle[2].Re = xNeg;
+ pTwiddle[2].Im = y;
+ } else if (order == 1) {
+ pTwiddle[0].Re = x;
+ pTwiddle[0].Im = y;
+ }
+
+ /* Update the structure */
+ pFFTStruct->N = N;
+ pFFTStruct->pTwiddle = pTwiddle;
+ pFFTStruct->pBitRev = pBitRev;
+ pFFTStruct->pBuf = pBuf;
+
+ return OMX_Sts_NoErr;
+}
+
+/*****************************************************************************
+ * END OF FILE
+ *****************************************************************************/
diff --git a/dl/omxSP_FFTInit_C_SC16.c b/dl/omxSP_FFTInit_C_SC16.c
new file mode 100644
index 0000000..95b2eee
--- /dev/null
+++ b/dl/omxSP_FFTInit_C_SC16.c
@@ -0,0 +1,203 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ *
+ * This file was originally licensed as follows. It has been
+ * relicensed with permission from the copyright holders.
+ */
+
+/**
+ *
+ * File Name: omxSP_FFTInit_C_SC16.c
+ * OpenMAX DL: v1.0.2
+ * Last Modified Revision: 15322
+ * Last Modified Date: Wed, 15 Oct 2008
+ *
+ * (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+ *
+ *
+ * Description:
+ * Initializes the specification structures required
+ */
+
+#include "omxtypes.h"
+#include "armOMX.h"
+#include "omxSP.h"
+
+#include "armCOMM.h"
+#include "armSP.h"
+
+
+/**
+ * Function: omxSP_FFTInit_C_SC16
+ *
+ * Description:
+ * These functions initialize the specification structures required for the
+ * complex FFT and IFFT functions.
+ *
+ * Remarks:
+ * Desired block length is specified as an input. The function is used to
+ * initialize the specification structures for functions <FFTFwd_CToC_SC16_Sfs>
+ * and <FFTInv_CToC_SC16_Sfs>. Memory for the specification structure *pFFTSpec
+ * must be allocated prior to calling this function. The space required for
+ * *pFFTSpec, in bytes, can be determined using <FFTGetBufSize_C_SC16>.
+ *
+ * Parameters:
+ * [in] order base-2 logarithm of the desired block length;
+ * valid in the range [0,12].
+ * [out] pFFTSpec pointer to initialized specification structure.
+ *
+ * Return Value:
+ * Standard omxError result. See enumeration for possible result codes.
+ *
+ */
+
+OMXResult omxSP_FFTInit_C_SC16(
+ OMXFFTSpec_C_SC16* pFFTSpec,
+ OMX_INT order
+ )
+ {
+ OMX_INT i,j;
+ OMX_SC16 *pTwiddle, *pBuf;
+ OMX_U16 *pBitRev;
+ OMX_INT Nby2,N,M,diff,step;
+ OMX_U32 pTmp;
+ ARMsFFTSpec_SC16 *pFFTStruct = 0;
+ OMX_S16 x,y,xNeg;
+ OMX_S32 xS32,yS32;
+
+
+ pFFTStruct = (ARMsFFTSpec_SC16 *) pFFTSpec;
+
+ /* if order zero no init is needed */
+ if (order == 0)
+ {
+ pFFTStruct->N = 1;
+ return OMX_Sts_NoErr;
+ }
+
+ /* Do the initializations */
+ Nby2 = 1 << (order - 1);
+ N = Nby2 << 1;
+ M = N>>3;
+
+ pBitRev = NULL ;
+
+ pTwiddle = (OMX_SC16 *)
+ (sizeof(ARMsFFTSpec_SC16) + (OMX_S8*) pFFTSpec);
+
+ /* Align to 32 byte boundary */
+ pTmp = ((OMX_U32)pTwiddle)&31; /* (OMX_U32)pTwiddle % 32 */
+ if(pTmp != 0)
+ pTwiddle = (OMX_SC16*) ((OMX_S8*)pTwiddle + (32-pTmp));
+
+ pBuf = (OMX_SC16 *)
+ (sizeof(OMX_SC16) * (3*N/4) + (OMX_S8*) pTwiddle);
+
+ /* Align to 32 byte boundary */
+ pTmp = ((OMX_U32)pBuf)&31; /* (OMX_U32)pBuf % 32 */
+ if(pTmp != 0)
+ pBuf = (OMX_SC16*) ((OMX_S8*)pBuf + (32-pTmp));
+
+
+
+ /*
+ * Filling Twiddle factors :
+ * The original twiddle table "armSP_FFT_S16TwiddleTable" is of size (MaxSize/8 + 1)
+ * Rest of the values i.e., upto MaxSize are calculated using the symmetries of sin and cos
+ * The max size of the twiddle table needed is 3N/4 for a radix-4 stage
+ *
+ * W = (-2 * PI) / N
+ * N = 1 << order
+ * W = -PI >> (order - 1)
+ */
+
+
+
+ diff = 12 - order;
+ step = 1<<diff; /* step into the twiddle table for the current order */
+
+ xS32 = armSP_FFT_S32TwiddleTable[0];
+ yS32 = armSP_FFT_S32TwiddleTable[1];
+ x = (xS32+0x8000)>>16;
+ y = (yS32+0x8000)>>16;
+
+ xNeg = 0x7FFF;
+
+ if(order >=3)
+ {
+ /* i = 0 case */
+ pTwiddle[0].Re = x;
+ pTwiddle[0].Im = y;
+ pTwiddle[2*M].Re = -y;
+ pTwiddle[2*M].Im = xNeg;
+ pTwiddle[4*M].Re = xNeg;
+ pTwiddle[4*M].Im = y;
+
+
+ for (i=1; i<=M; i++)
+ {
+ j = i*step;
+
+ xS32 = armSP_FFT_S32TwiddleTable[2*j];
+ yS32 = armSP_FFT_S32TwiddleTable[2*j+1];
+ x = (xS32+0x8000)>>16;
+ y = (yS32+0x8000)>>16;
+
+ pTwiddle[i].Re = x;
+ pTwiddle[i].Im = y;
+ pTwiddle[2*M-i].Re = -y;
+ pTwiddle[2*M-i].Im = -x;
+ pTwiddle[2*M+i].Re = y;
+ pTwiddle[2*M+i].Im = -x;
+ pTwiddle[4*M-i].Re = -x;
+ pTwiddle[4*M-i].Im = y;
+ pTwiddle[4*M+i].Re = -x;
+ pTwiddle[4*M+i].Im = -y;
+ pTwiddle[6*M-i].Re = y;
+ pTwiddle[6*M-i].Im = x;
+ }
+
+
+ }
+ else
+ {
+ if (order == 2)
+ {
+ pTwiddle[0].Re = x;
+ pTwiddle[0].Im = y;
+ pTwiddle[1].Re = -y;
+ pTwiddle[1].Im = xNeg;
+ pTwiddle[2].Re = xNeg;
+ pTwiddle[2].Im = y;
+
+ }
+ if (order == 1)
+ {
+ pTwiddle[0].Re = x;
+ pTwiddle[0].Im = y;
+
+ }
+
+
+ }
+
+
+ /* Update the structure */
+ pFFTStruct->N = N;
+ pFFTStruct->pTwiddle = pTwiddle;
+ pFFTStruct->pBitRev = pBitRev;
+ pFFTStruct->pBuf = pBuf;
+
+ return OMX_Sts_NoErr;
+}
+
+/*****************************************************************************
+ * END OF FILE
+ *****************************************************************************/
+
diff --git a/dl/omxSP_FFTInit_C_SC32.c b/dl/omxSP_FFTInit_C_SC32.c
new file mode 100644
index 0000000..fc7f745
--- /dev/null
+++ b/dl/omxSP_FFTInit_C_SC32.c
@@ -0,0 +1,198 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ *
+ * This file was originally licensed as follows. It has been
+ * relicensed with permission from the copyright holders.
+ */
+
+/**
+ *
+ * File Name: omxSP_FFTInit_C_SC32.c
+ * OpenMAX DL: v1.0.2
+ * Last Modified Revision: 7769
+ * Last Modified Date: Thu, 27 Sep 2007
+ *
+ * (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+ *
+ *
+ * Description:
+ * Initializes the specification structures required
+ */
+
+#include "omxtypes.h"
+#include "armOMX.h"
+#include "omxSP.h"
+
+#include "armCOMM.h"
+#include "armSP.h"
+
+
+/**
+ * Function: omxSP_FFTInit_C_SC32
+ *
+ * Description:
+ * Initializes the specification structures required for the
+ * complex FFT and IFFT functions.
+ *
+ * Remarks:
+ * Desired block length is specified as an input. The function is used to
+ * initialize the specification structures for functions <FFTFwd_CToC_SC32_Sfs>
+ * and <FFTInv_CToC_SC32_Sfs>. Memory for the specification structure *pFFTSpec
+ * must be allocated prior to calling this function. The space required for
+ * *pFFTSpec, in bytes, can be determined using <FFTGetBufSize_C_SC32>.
+ *
+ * Parameters:
+ * [in] order base-2 logarithm of the desired block length;
+ * valid in the range [0,12].
+ * [out] pFFTSpec pointer to initialized specification structure.
+ *
+ * Return Value:
+ * Standard omxError result. See enumeration for possible result codes.
+ *
+ */
+
+OMXResult omxSP_FFTInit_C_SC32(
+ OMXFFTSpec_C_SC32* pFFTSpec,
+ OMX_INT order
+ )
+{
+ OMX_INT i,j;
+ OMX_SC32 *pTwiddle, *pBuf;
+ OMX_U16 *pBitRev;
+ OMX_U32 pTmp;
+ OMX_INT Nby2,N,M,diff, step;
+ ARMsFFTSpec_SC32 *pFFTStruct = 0;
+ OMX_S32 x,y,xNeg;
+
+ pFFTStruct = (ARMsFFTSpec_SC32 *) pFFTSpec;
+
+ /* if order zero no init is needed */
+ if (order == 0)
+ {
+ pFFTStruct->N = 1;
+ return OMX_Sts_NoErr;
+ }
+
+ /* Do the initializations */
+ Nby2 = 1 << (order - 1);
+ N = Nby2 << 1;
+ M = N>>3;
+
+
+ pBitRev = NULL ; /* optimized implementations don't use bitreversal */
+
+ pTwiddle = (OMX_SC32 *)
+ (sizeof(ARMsFFTSpec_SC32) + (OMX_S8*) pFFTSpec);
+
+ /* Align to 32 byte boundary */
+ pTmp = ((OMX_U32)pTwiddle)&31; /* (OMX_U32)pTwiddle % 32 */
+ if(pTmp != 0)
+ pTwiddle = (OMX_SC32*) ((OMX_S8*)pTwiddle + (32-pTmp));
+
+ pBuf = (OMX_SC32*)
+ (sizeof(OMX_SC32) * (3*N/4) + (OMX_S8*) pTwiddle);
+
+ /* Align to 32 byte boundary */
+ pTmp = ((OMX_U32)pBuf)&31; /* (OMX_U32)pBuf % 32 */
+ if(pTmp != 0)
+ pBuf = (OMX_SC32*) ((OMX_S8*)pBuf + (32-pTmp));
+
+
+
+
+ /*
+ * Filling Twiddle factors :
+ * The original twiddle table "armSP_FFT_S32TwiddleTable" is of size (MaxSize/8 + 1)
+ * Rest of the values i.e., upto MaxSize are calculated using the symmetries of sin and cos
+ * The max size of the twiddle table needed is 3N/4 for a radix-4 stage
+ *
+ * W = (-2 * PI) / N
+ * N = 1 << order
+ * W = -PI >> (order - 1)
+ */
+
+
+ diff = 12 - order;
+ step = 1<<diff; /* step into the twiddle table for the current order */
+
+ x = armSP_FFT_S32TwiddleTable[0];
+ y = armSP_FFT_S32TwiddleTable[1];
+ xNeg = 0x7FFFFFFF;
+
+ if(order >=3)
+ {
+ /* i = 0 case */
+ pTwiddle[0].Re = x;
+ pTwiddle[0].Im = y;
+ pTwiddle[2*M].Re = -y;
+ pTwiddle[2*M].Im = xNeg;
+ pTwiddle[4*M].Re = xNeg;
+ pTwiddle[4*M].Im = y;
+
+
+ for (i=1; i<=M; i++)
+ {
+ j = i*step;
+
+ x = armSP_FFT_S32TwiddleTable[2*j];
+ y = armSP_FFT_S32TwiddleTable[2*j+1];
+
+ pTwiddle[i].Re = x;
+ pTwiddle[i].Im = y;
+ pTwiddle[2*M-i].Re = -y;
+ pTwiddle[2*M-i].Im = -x;
+ pTwiddle[2*M+i].Re = y;
+ pTwiddle[2*M+i].Im = -x;
+ pTwiddle[4*M-i].Re = -x;
+ pTwiddle[4*M-i].Im = y;
+ pTwiddle[4*M+i].Re = -x;
+ pTwiddle[4*M+i].Im = -y;
+ pTwiddle[6*M-i].Re = y;
+ pTwiddle[6*M-i].Im = x;
+ }
+
+
+ }
+ else
+ {
+ if (order == 2)
+ {
+ pTwiddle[0].Re = x;
+ pTwiddle[0].Im = y;
+ pTwiddle[1].Re = -y;
+ pTwiddle[1].Im = xNeg;
+ pTwiddle[2].Re = xNeg;
+ pTwiddle[2].Im = y;
+
+ }
+ if (order == 1)
+ {
+ pTwiddle[0].Re = x;
+ pTwiddle[0].Im = y;
+
+ }
+
+
+ }
+
+
+
+ /* Update the structure */
+ pFFTStruct->N = N;
+ pFFTStruct->pTwiddle = pTwiddle;
+ pFFTStruct->pBitRev = pBitRev;
+ pFFTStruct->pBuf = pBuf;
+
+ return OMX_Sts_NoErr;
+}
+
+/*****************************************************************************
+ * END OF FILE
+ *****************************************************************************/
+
diff --git a/dl/omxSP_FFTInit_R_F32.c b/dl/omxSP_FFTInit_R_F32.c
new file mode 100644
index 0000000..7a2fe9f
--- /dev/null
+++ b/dl/omxSP_FFTInit_R_F32.c
@@ -0,0 +1,220 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ *
+ * This is a modification of omxSP_FFTInit_R_S32.c to support float
+ * instead of S32.
+ */
+
+#include "armCOMM.h"
+#include "armOMX.h"
+#include "armSP.h"
+#include "omxSP.h"
+#include "omxtypes.h"
+
+/**
+ * Function: omxSP_FFTInit_R_F32
+ *
+ * Description:
+ * Initialize the real forward-FFT specification information struct.
+ *
+ * Remarks:
+ * This function is used to initialize the specification structures
+ * for functions <ippsFFTFwd_RToCCS_F32_Sfs> and
+ * <ippsFFTInv_CCSToR_F32_Sfs>. Memory for *pFFTSpec must be
+ * allocated prior to calling this function. The number of bytes
+ * required for *pFFTSpec can be determined using
+ * <FFTGetBufSize_R_F32>.
+ *
+ * Parameters:
+ * [in] order base-2 logarithm of the desired block length;
+ * valid in the range [0,12].
+ * [out] pFFTFwdSpec pointer to the initialized specification structure.
+ *
+ * Return Value:
+ * Standard omxError result. See enumeration for possible result codes.
+ *
+ */
+OMXResult omxSP_FFTInit_R_F32(OMXFFTSpec_R_F32* pFFTSpec, OMX_INT order) {
+ OMX_INT i;
+ OMX_INT j;
+ OMX_FC32* pTwiddle;
+ OMX_FC32* pTwiddle1;
+ OMX_FC32* pTwiddle2;
+ OMX_FC32* pTwiddle3;
+ OMX_FC32* pTwiddle4;
+ OMX_F32* pBuf;
+ OMX_U16* pBitRev;
+ OMX_U32 pTmp;
+ OMX_INT Nby2;
+ OMX_INT N;
+ OMX_INT M;
+ OMX_INT diff;
+ OMX_INT step;
+ OMX_F32 x;
+ OMX_F32 y;
+ OMX_F32 xNeg;
+ ARMsFFTSpec_R_FC32* pFFTStruct = 0;
+
+ pFFTStruct = (ARMsFFTSpec_R_FC32 *) pFFTSpec;
+
+ /* if order zero no init is needed */
+ if (order == 0) {
+ pFFTStruct->N = 1;
+ pFFTStruct->pTwiddle = NULL;
+ pFFTStruct->pBuf = (OMX_F32 *)
+ (sizeof(ARMsFFTSpec_R_SC32) + (OMX_S8*) pFFTSpec);
+
+ return OMX_Sts_NoErr;
+ }
+
+ /* Validate args */
+ if (!pFFTSpec || (order < 0) || (order > TWIDDLE_TABLE_ORDER))
+ return OMX_Sts_BadArgErr;
+
+ /* Do the initializations */
+ Nby2 = 1 << (order - 1);
+ N = Nby2 << 1;
+
+ /* optimized implementations don't use bitreversal */
+ pBitRev = NULL;
+
+ pTwiddle = (OMX_FC32 *) (sizeof(ARMsFFTSpec_R_SC32) + (OMX_S8*) pFFTSpec);
+
+ /* Align to 32 byte boundary */
+ pTmp = ((OMX_U32)pTwiddle) & 31;
+ if (pTmp)
+ pTwiddle = (OMX_FC32*) ((OMX_S8*)pTwiddle + (32 - pTmp));
+
+ pBuf = (OMX_F32*) (sizeof(OMX_FC32)*(5*N/8) + (OMX_S8*) pTwiddle);
+
+ /* Align to 32 byte boundary */
+ pTmp = ((OMX_U32)pBuf)&31; /* (OMX_U32)pBuf % 32 */
+ if (pTmp)
+ pBuf = (OMX_F32*) ((OMX_S8*)pBuf + (32 - pTmp));
+
+ /*
+ * Filling Twiddle factors :
+ *
+ * exp^(-j*2*PI*k/ (N/2) ) ; k=0,1,2,...,3/4(N/2)
+ *
+ * N/2 point complex FFT is used to compute N point real FFT The
+ * original twiddle table "armSP_FFT_F32TwiddleTable" is of size
+ * (MaxSize/8 + 1) Rest of the values i.e., upto MaxSize are
+ * calculated using the symmetries of sin and cos The max size of
+ * the twiddle table needed is 3/4(N/2) for a radix-4 stage
+ *
+ * W = (-2 * PI) / N
+ * N = 1 << order
+ * W = -PI >> (order - 1)
+ */
+
+ M = Nby2 >> 3;
+ diff = TWIDDLE_TABLE_ORDER - (order - 1);
+ /* step into the twiddle table for the current order */
+ step = 1 << diff;
+
+ x = armSP_FFT_F32TwiddleTable[0];
+ y = armSP_FFT_F32TwiddleTable[1];
+ xNeg = 1;
+
+ if ((order - 1) >= 3) {
+ /* i = 0 case */
+ pTwiddle[0].Re = x;
+ pTwiddle[0].Im = y;
+ pTwiddle[2*M].Re = -y;
+ pTwiddle[2*M].Im = xNeg;
+ pTwiddle[4*M].Re = xNeg;
+ pTwiddle[4*M].Im = y;
+
+ for (i = 1; i <= M; i++) {
+ j = i*step;
+
+ x = armSP_FFT_F32TwiddleTable[2*j];
+ y = armSP_FFT_F32TwiddleTable[2*j+1];
+
+ pTwiddle[i].Re = x;
+ pTwiddle[i].Im = y;
+ pTwiddle[2*M-i].Re = -y;
+ pTwiddle[2*M-i].Im = -x;
+ pTwiddle[2*M+i].Re = y;
+ pTwiddle[2*M+i].Im = -x;
+ pTwiddle[4*M-i].Re = -x;
+ pTwiddle[4*M-i].Im = y;
+ pTwiddle[4*M+i].Re = -x;
+ pTwiddle[4*M+i].Im = -y;
+ pTwiddle[6*M-i].Re = y;
+ pTwiddle[6*M-i].Im = x;
+ }
+ } else if ((order - 1) == 2) {
+ pTwiddle[0].Re = x;
+ pTwiddle[0].Im = y;
+ pTwiddle[1].Re = -y;
+ pTwiddle[1].Im = xNeg;
+ pTwiddle[2].Re = xNeg;
+ pTwiddle[2].Im = y;
+ } else if ((order-1) == 1) {
+ pTwiddle[0].Re = x;
+ pTwiddle[0].Im = y;
+ }
+
+ /*
+ * Now fill the last N/4 values : exp^(-j*2*PI*k/N) ;
+ * k=1,3,5,...,N/2-1 These are used for the final twiddle fix-up for
+ * converting complex to real FFT
+ */
+
+ M = N >> 3;
+ diff = TWIDDLE_TABLE_ORDER - order;
+ step = 1 << diff;
+
+ pTwiddle1 = pTwiddle + 3*N/8;
+ pTwiddle4 = pTwiddle1 + (N/4 - 1);
+ pTwiddle3 = pTwiddle1 + N/8;
+ pTwiddle2 = pTwiddle1 + (N/8 - 1);
+
+ x = armSP_FFT_F32TwiddleTable[0];
+ y = armSP_FFT_F32TwiddleTable[1];
+ xNeg = 1;
+
+ if (order >=3) {
+ for (i = 1; i <= M; i += 2) {
+ j = i*step;
+
+ x = armSP_FFT_F32TwiddleTable[2*j];
+ y = armSP_FFT_F32TwiddleTable[2*j+1];
+
+ pTwiddle1[0].Re = x;
+ pTwiddle1[0].Im = y;
+ pTwiddle1 += 1;
+ pTwiddle2[0].Re = -y;
+ pTwiddle2[0].Im = -x;
+ pTwiddle2 -= 1;
+ pTwiddle3[0].Re = y;
+ pTwiddle3[0].Im = -x;
+ pTwiddle3 += 1;
+ pTwiddle4[0].Re = -x;
+ pTwiddle4[0].Im = y;
+ pTwiddle4 -= 1;
+ }
+ } else {
+ if (order == 2) {
+ pTwiddle1[0].Re = -y;
+ pTwiddle1[0].Im = xNeg;
+ }
+ }
+
+
+ /* Update the structure */
+ pFFTStruct->N = N;
+ pFFTStruct->pTwiddle = pTwiddle;
+ pFFTStruct->pBitRev = pBitRev;
+ pFFTStruct->pBuf = pBuf;
+
+ return OMX_Sts_NoErr;
+}
diff --git a/dl/omxSP_FFTInit_R_S16S32.c b/dl/omxSP_FFTInit_R_S16S32.c
new file mode 100644
index 0000000..d2210e0
--- /dev/null
+++ b/dl/omxSP_FFTInit_R_S16S32.c
@@ -0,0 +1,264 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ *
+ * This file was originally licensed as follows. It has been
+ * relicensed with permission from the copyright holders.
+ */
+
+/**
+ *
+ * File Name: omxSP_FFTInit_R_S16S32.c
+ * OpenMAX DL: v1.0.2
+ * Last Modified Revision: 7777
+ * Last Modified Date: Thu, 27 Sep 2007
+ *
+ * (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+ *
+ *
+ * Description:
+ * Initialize the real forward-FFT specification information struct.
+ */
+
+#include "omxtypes.h"
+#include "armOMX.h"
+#include "omxSP.h"
+#include "armCOMM.h"
+#include "armSP.h"
+
+
+
+/**
+ * Function: omxSP_FFTInit_R_S16_S32
+ *
+ * Description:
+ * Initialize the real forward-FFT specification information struct.
+ *
+ * Remarks:
+ * This function is used to initialize the specification structures
+ * for functions <ippsFFTFwd_RToCCS_S16_S32_Sfs> and
+ * <ippsFFTInv_CCSToR_S32_S16_Sfs>. Memory for *pFFTSpec must be
+ * allocated prior to calling this function. The number of bytes
+ * required for *pFFTSpec can be determined using
+ * <FFTGetBufSize_R_S16_S32>.
+ *
+ * Parameters:
+ * [in] order base-2 logarithm of the desired block length;
+ * valid in the range [0,12].
+ * [out] pFFTFwdSpec pointer to the initialized specification structure.
+ *
+ * Return Value:
+ * Standard omxError result. See enumeration for possible result codes.
+ *
+ */
+
+OMXResult omxSP_FFTInit_R_S16S32(
+ OMXFFTSpec_R_S16S32* pFFTSpec,
+ OMX_INT order
+)
+{
+ OMX_INT i,j;
+ OMX_SC32 *pTwiddle,*pTwiddle1,*pTwiddle2,*pTwiddle3,*pTwiddle4;
+ OMX_S32 *pBuf;
+ OMX_U16 *pBitRev;
+ OMX_U32 pTmp;
+ OMX_INT Nby2,N,M,diff, step;
+ OMX_S32 x,y,xNeg;
+ ARMsFFTSpec_R_SC32 *pFFTStruct = 0;
+
+
+ pFFTStruct = (ARMsFFTSpec_R_SC32 *) pFFTSpec;
+
+ /* if order zero no init is needed */
+ if (order == 0)
+ {
+ pFFTStruct->N = 1;
+ pFFTStruct->pTwiddle = NULL;
+ pFFTStruct->pBuf = (OMX_S32 *)
+ (sizeof(ARMsFFTSpec_R_SC32) + (OMX_S8*) pFFTSpec);
+
+ return OMX_Sts_NoErr;
+ }
+
+ /* Do the initializations */
+ Nby2 = 1 << (order - 1);
+ N = Nby2 << 1;
+
+
+
+ pBitRev = NULL ; /* optimized implementations don't use bitreversal */
+
+ pTwiddle = (OMX_SC32 *)
+ (sizeof(ARMsFFTSpec_R_SC32) + (OMX_S8*) pFFTSpec);
+
+ /* Align to 32 byte boundary */
+ pTmp = ((OMX_U32)pTwiddle)&31; /* (OMX_U32)pTwiddle % 32 */
+ if(pTmp != 0)
+ pTwiddle = (OMX_SC32*) ((OMX_S8*)pTwiddle + (32-pTmp));
+
+
+ pBuf = (OMX_S32*)
+ (sizeof(OMX_SC32) * (5*N/8) + (OMX_S8*) pTwiddle);
+
+ /* Align to 32 byte boundary */
+ pTmp = ((OMX_U32)pBuf)&31; /* (OMX_U32)pBuf % 32 */
+ if(pTmp != 0)
+ pBuf = (OMX_S32*) ((OMX_S8*)pBuf + (32-pTmp));
+
+
+
+
+ /*
+ * Filling Twiddle factors : exp^(-j*2*PI*k/ (N/2) ) ; k=0,1,2,...,3/4(N/2)
+ * N/2 point complex FFT is used to compute N point real FFT
+ * The original twiddle table "armSP_FFT_S32TwiddleTable" is of size (MaxSize/8 + 1)
+ * Rest of the values i.e., upto MaxSize are calculated using the symmetries of sin and cos
+ * The max size of the twiddle table needed is 3/4(N/2) for a radix-4 stage
+ *
+ * W = (-2 * PI) / N
+ * N = 1 << order
+ * W = -PI >> (order - 1)
+ */
+
+ M = Nby2>>3;
+ diff = 12 - (order-1);
+ step = 1<<diff; /* step into the twiddle table for the current order */
+
+ x = armSP_FFT_S32TwiddleTable[0];
+ y = armSP_FFT_S32TwiddleTable[1];
+ xNeg = 0x7FFFFFFF;
+
+ if((order-1) >=3)
+ {
+ /* i = 0 case */
+ pTwiddle[0].Re = x;
+ pTwiddle[0].Im = y;
+ pTwiddle[2*M].Re = -y;
+ pTwiddle[2*M].Im = xNeg;
+ pTwiddle[4*M].Re = xNeg;
+ pTwiddle[4*M].Im = y;
+
+
+ for (i=1; i<=M; i++)
+ {
+ j = i*step;
+
+ x = armSP_FFT_S32TwiddleTable[2*j];
+ y = armSP_FFT_S32TwiddleTable[2*j+1];
+
+ pTwiddle[i].Re = x;
+ pTwiddle[i].Im = y;
+ pTwiddle[2*M-i].Re = -y;
+ pTwiddle[2*M-i].Im = -x;
+ pTwiddle[2*M+i].Re = y;
+ pTwiddle[2*M+i].Im = -x;
+ pTwiddle[4*M-i].Re = -x;
+ pTwiddle[4*M-i].Im = y;
+ pTwiddle[4*M+i].Re = -x;
+ pTwiddle[4*M+i].Im = -y;
+ pTwiddle[6*M-i].Re = y;
+ pTwiddle[6*M-i].Im = x;
+ }
+
+
+ }
+ else
+ {
+ if ((order-1) == 2)
+ {
+ pTwiddle[0].Re = x;
+ pTwiddle[0].Im = y;
+ pTwiddle[1].Re = -y;
+ pTwiddle[1].Im = xNeg;
+ pTwiddle[2].Re = xNeg;
+ pTwiddle[2].Im = y;
+
+ }
+ if ((order-1) == 1)
+ {
+ pTwiddle[0].Re = x;
+ pTwiddle[0].Im = y;
+
+ }
+
+
+ }
+
+
+ /*
+ * Now fill the last N/4 values : exp^(-j*2*PI*k/N) ; k=1,3,5,...,N/2-1
+ * These are used for the final twiddle fix-up for converting complex to real FFT
+ */
+
+ M = N>>3;
+ diff = 12 - order;
+ step = 1<<diff;
+
+ pTwiddle1 = pTwiddle + 3*N/8;
+ pTwiddle4 = pTwiddle1 + (N/4-1);
+ pTwiddle3 = pTwiddle1 + N/8;
+ pTwiddle2 = pTwiddle1 + (N/8-1);
+
+ x = armSP_FFT_S32TwiddleTable[0];
+ y = armSP_FFT_S32TwiddleTable[1];
+ xNeg = 0x7FFFFFFF;
+
+ if((order) >=3)
+ {
+
+
+ for (i=1; i<=M; i+=2 )
+ {
+ j = i*step;
+
+ x = armSP_FFT_S32TwiddleTable[2*j];
+ y = armSP_FFT_S32TwiddleTable[2*j+1];
+
+ pTwiddle1[0].Re = x;
+ pTwiddle1[0].Im = y;
+ pTwiddle1 += 1;
+ pTwiddle2[0].Re = -y;
+ pTwiddle2[0].Im = -x;
+ pTwiddle2 -= 1;
+ pTwiddle3[0].Re = y;
+ pTwiddle3[0].Im = -x;
+ pTwiddle3 += 1;
+ pTwiddle4[0].Re = -x;
+ pTwiddle4[0].Im = y;
+ pTwiddle4 -= 1;
+
+ }
+
+
+ }
+ else
+ {
+ if (order == 2)
+ {
+
+ pTwiddle1[0].Re = -y;
+ pTwiddle1[0].Im = xNeg;
+
+ }
+
+
+ }
+
+
+ /* Update the structure */
+ pFFTStruct->N = N;
+ pFFTStruct->pTwiddle = pTwiddle;
+ pFFTStruct->pBitRev = pBitRev;
+ pFFTStruct->pBuf = pBuf;
+
+ return OMX_Sts_NoErr;
+}
+/*****************************************************************************
+ * END OF FILE
+ *****************************************************************************/
+
diff --git a/dl/omxSP_FFTInit_R_S32.c b/dl/omxSP_FFTInit_R_S32.c
new file mode 100644
index 0000000..7a1a225
--- /dev/null
+++ b/dl/omxSP_FFTInit_R_S32.c
@@ -0,0 +1,262 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ *
+ * This file was originally licensed as follows. It has been
+ * relicensed with permission from the copyright holders.
+ */
+
+/**
+ *
+ * File Name: omxSP_FFTInit_R_S32.c
+ * OpenMAX DL: v1.0.2
+ * Last Modified Revision: 7777
+ * Last Modified Date: Thu, 27 Sep 2007
+ *
+ * (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+ *
+ *
+ * Description:
+ * Initialize the real forward-FFT specification information struct.
+ */
+
+#include "omxtypes.h"
+#include "armOMX.h"
+#include "omxSP.h"
+#include "armCOMM.h"
+#include "armSP.h"
+
+
+
+/**
+ * Function: omxSP_FFTInit_R_S32
+ *
+ * Description:
+ * Initialize the real forward-FFT specification information struct.
+ *
+ * Remarks:
+ * This function is used to initialize the specification structures
+ * for functions <ippsFFTFwd_RToCCS_S32_Sfs> and
+ * <ippsFFTInv_CCSToR_S32_Sfs>. Memory for *pFFTSpec must be
+ * allocated prior to calling this function. The number of bytes
+ * required for *pFFTSpec can be determined using
+ * <FFTGetBufSize_R_S32>.
+ *
+ * Parameters:
+ * [in] order base-2 logarithm of the desired block length;
+ * valid in the range [0,12].
+ * [out] pFFTFwdSpec pointer to the initialized specification structure.
+ *
+ * Return Value:
+ * Standard omxError result. See enumeration for possible result codes.
+ *
+ */
+OMXResult omxSP_FFTInit_R_S32(
+ OMXFFTSpec_R_S32* pFFTSpec,
+ OMX_INT order
+)
+{
+ OMX_INT i,j;
+ OMX_SC32 *pTwiddle,*pTwiddle1,*pTwiddle2,*pTwiddle3,*pTwiddle4;
+ OMX_S32 *pBuf;
+ OMX_U16 *pBitRev;
+ OMX_U32 pTmp;
+ OMX_INT Nby2,N,M,diff, step;
+ OMX_S32 x,y,xNeg;
+ ARMsFFTSpec_R_SC32 *pFFTStruct = 0;
+
+
+ pFFTStruct = (ARMsFFTSpec_R_SC32 *) pFFTSpec;
+
+ /* if order zero no init is needed */
+ if (order == 0)
+ {
+ pFFTStruct->N = 1;
+ pFFTStruct->pTwiddle = NULL;
+ pFFTStruct->pBuf = (OMX_S32 *)
+ (sizeof(ARMsFFTSpec_R_SC32) + (OMX_S8*) pFFTSpec);
+
+ return OMX_Sts_NoErr;
+ }
+
+ /* Do the initializations */
+ Nby2 = 1 << (order - 1);
+ N = Nby2 << 1;
+
+
+
+ pBitRev = NULL ; /* optimized implementations don't use bitreversal */
+
+ pTwiddle = (OMX_SC32 *)
+ (sizeof(ARMsFFTSpec_R_SC32) + (OMX_S8*) pFFTSpec);
+
+ /* Align to 32 byte boundary */
+ pTmp = ((OMX_U32)pTwiddle)&31; /* (OMX_U32)pTwiddle % 32 */
+ if(pTmp != 0)
+ pTwiddle = (OMX_SC32*) ((OMX_S8*)pTwiddle + (32-pTmp));
+
+ pBuf = (OMX_S32*)
+ (sizeof(OMX_SC32) * (5*N/8) + (OMX_S8*) pTwiddle);
+
+ /* Align to 32 byte boundary */
+ pTmp = ((OMX_U32)pBuf)&31; /* (OMX_U32)pBuf % 32 */
+ if(pTmp != 0)
+ pBuf = (OMX_S32*) ((OMX_S8*)pBuf + (32-pTmp));
+
+
+
+
+ /*
+ * Filling Twiddle factors : exp^(-j*2*PI*k/ (N/2) ) ; k=0,1,2,...,3/4(N/2)
+ * N/2 point complex FFT is used to compute N point real FFT
+ * The original twiddle table "armSP_FFT_S32TwiddleTable" is of size (MaxSize/8 + 1)
+ * Rest of the values i.e., upto MaxSize are calculated using the symmetries of sin and cos
+ * The max size of the twiddle table needed is 3/4(N/2) for a radix-4 stage
+ *
+ * W = (-2 * PI) / N
+ * N = 1 << order
+ * W = -PI >> (order - 1)
+ */
+
+ M = Nby2>>3;
+ diff = 12 - (order-1);
+ step = 1<<diff; /* step into the twiddle table for the current order */
+
+ x = armSP_FFT_S32TwiddleTable[0];
+ y = armSP_FFT_S32TwiddleTable[1];
+ xNeg = 0x7FFFFFFF;
+
+ if((order-1) >=3)
+ {
+ /* i = 0 case */
+ pTwiddle[0].Re = x;
+ pTwiddle[0].Im = y;
+ pTwiddle[2*M].Re = -y;
+ pTwiddle[2*M].Im = xNeg;
+ pTwiddle[4*M].Re = xNeg;
+ pTwiddle[4*M].Im = y;
+
+
+ for (i=1; i<=M; i++)
+ {
+ j = i*step;
+
+ x = armSP_FFT_S32TwiddleTable[2*j];
+ y = armSP_FFT_S32TwiddleTable[2*j+1];
+
+ pTwiddle[i].Re = x;
+ pTwiddle[i].Im = y;
+ pTwiddle[2*M-i].Re = -y;
+ pTwiddle[2*M-i].Im = -x;
+ pTwiddle[2*M+i].Re = y;
+ pTwiddle[2*M+i].Im = -x;
+ pTwiddle[4*M-i].Re = -x;
+ pTwiddle[4*M-i].Im = y;
+ pTwiddle[4*M+i].Re = -x;
+ pTwiddle[4*M+i].Im = -y;
+ pTwiddle[6*M-i].Re = y;
+ pTwiddle[6*M-i].Im = x;
+ }
+
+
+ }
+ else
+ {
+ if ((order-1) == 2)
+ {
+ pTwiddle[0].Re = x;
+ pTwiddle[0].Im = y;
+ pTwiddle[1].Re = -y;
+ pTwiddle[1].Im = xNeg;
+ pTwiddle[2].Re = xNeg;
+ pTwiddle[2].Im = y;
+
+ }
+ if ((order-1) == 1)
+ {
+ pTwiddle[0].Re = x;
+ pTwiddle[0].Im = y;
+
+ }
+
+
+ }
+
+
+ /*
+ * Now fill the last N/4 values : exp^(-j*2*PI*k/N) ; k=1,3,5,...,N/2-1
+ * These are used for the final twiddle fix-up for converting complex to real FFT
+ */
+
+ M = N>>3;
+ diff = 12 - order;
+ step = 1<<diff;
+
+ pTwiddle1 = pTwiddle + 3*N/8;
+ pTwiddle4 = pTwiddle1 + (N/4-1);
+ pTwiddle3 = pTwiddle1 + N/8;
+ pTwiddle2 = pTwiddle1 + (N/8-1);
+
+ x = armSP_FFT_S32TwiddleTable[0];
+ y = armSP_FFT_S32TwiddleTable[1];
+ xNeg = 0x7FFFFFFF;
+
+ if((order) >=3)
+ {
+
+
+ for (i=1; i<=M; i+=2 )
+ {
+ j = i*step;
+
+ x = armSP_FFT_S32TwiddleTable[2*j];
+ y = armSP_FFT_S32TwiddleTable[2*j+1];
+
+ pTwiddle1[0].Re = x;
+ pTwiddle1[0].Im = y;
+ pTwiddle1 += 1;
+ pTwiddle2[0].Re = -y;
+ pTwiddle2[0].Im = -x;
+ pTwiddle2 -= 1;
+ pTwiddle3[0].Re = y;
+ pTwiddle3[0].Im = -x;
+ pTwiddle3 += 1;
+ pTwiddle4[0].Re = -x;
+ pTwiddle4[0].Im = y;
+ pTwiddle4 -= 1;
+
+ }
+
+
+ }
+ else
+ {
+ if (order == 2)
+ {
+
+ pTwiddle1[0].Re = -y;
+ pTwiddle1[0].Im = xNeg;
+
+ }
+
+
+ }
+
+
+ /* Update the structure */
+ pFFTStruct->N = N;
+ pFFTStruct->pTwiddle = pTwiddle;
+ pFFTStruct->pBitRev = pBitRev;
+ pFFTStruct->pBuf = pBuf;
+
+ return OMX_Sts_NoErr;
+}
+/*****************************************************************************
+ * END OF FILE
+ *****************************************************************************/
+
diff --git a/dl/omxSP_FFTInv_CCSToR_F32_Sfs_s.S b/dl/omxSP_FFTInv_CCSToR_F32_Sfs_s.S
new file mode 100644
index 0000000..19e5789
--- /dev/null
+++ b/dl/omxSP_FFTInv_CCSToR_F32_Sfs_s.S
@@ -0,0 +1,283 @@
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@// This is a modification of omxSP_FFTInv_CCSToR_S32_Sfs_s.s
+@// to support float instead of SC32.
+@//
+
+@//
+@// Description:
+@// Compute an inverse FFT for a complex signal
+@//
+@//
+
+
+@// Include standard headers
+
+#include "omxtypes_s.h"
+#include "armCOMM_s.h"
+
+
+@// Import symbols required from other files
+@// (For example tables)
+
+ .extern armSP_FFTInv_CToC_FC32_Radix2_fs_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_FC32_Radix4_fs_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_FC32_Radix8_fs_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_FC32_Radix4_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_FC32_Radix2_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_unsafe
+
+
+@// Set debugging level
+@//DEBUG_ON SETL {TRUE}
+
+
+
+@// Guarding implementation by the processor name
+
+
+
+ @// Guarding implementation by the processor name
+
+@// Import symbols required from other files
+@// (For example tables)
+ .extern armSP_FFTInv_CToC_FC32_Radix4_ls_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_FC32_Radix2_ls_OutOfPlace_unsafe
+
+
+@//Input Registers
+
+#define pSrc r0
+#define pDst r1
+#define pFFTSpec r2
+#define scale r3
+
+
+@// Output registers
+#define result r0
+
+@//Local Scratch Registers
+
+#define argTwiddle r1
+#define argDst r2
+#define argScale r4
+#define tmpOrder r4
+#define pTwiddle r4
+#define pOut r5
+#define subFFTSize r7
+#define subFFTNum r6
+#define N r6
+#define order r14
+#define diff r9
+@// Total num of radix stages required to comple the FFT
+#define count r8
+#define x0r r4
+#define x0i r5
+#define diffMinusOne r2
+#define round r3
+
+#define pOut1 r2
+#define size r7
+#define step r8
+#define step1 r9
+#define twStep r10
+#define pTwiddleTmp r11
+#define argTwiddle1 r12
+#define zero r14
+
+@// Neon registers
+
+#define dX0 D0.F32
+#define dShift D1.F32
+#define dX1 D1.F32
+#define dY0 D2.F32
+#define dY1 D3.F32
+#define dX0r D0.F32
+#define dX0i D1.F32
+#define dX1r D2.F32
+#define dX1i D3.F32
+#define dW0r D4.F32
+#define dW0i D5.F32
+#define dW1r D6.F32
+#define dW1i D7.F32
+#define dT0 D8.F32
+#define dT1 D9.F32
+#define dT2 D10.F32
+#define dT3 D11.F32
+#define qT0 d12.F32
+#define qT1 d14.F32
+#define qT2 d16.F32
+#define qT3 d18.F32
+#define dY0r D4.F32
+#define dY0i D5.F32
+#define dY1r D6.F32
+#define dY1i D7.F32
+#define dzero D20.F32
+
+#define dY2 D4.F32
+#define dY3 D5.F32
+#define dW0 D6.F32
+#define dW1 D7.F32
+#define dW0Tmp D10.F32
+#define dW1Neg D11.F32
+
+#define sN S0.S32
+#define fN S1.F32
+@// one must be the same as dScale[0]!
+#define dScale D2.F32
+#define one S4.F32
+
+
+ @// Allocate stack memory required by the function
+ M_ALLOC4 complexFFTSize, 4
+
+ @// Write function header
+ M_START omxSP_FFTInv_CCSToR_F32_Sfs,r11,d15
+
+@ Structure offsets for the FFTSpec
+ .set ARMsFFTSpec_N, 0
+ .set ARMsFFTSpec_pBitRev, 4
+ .set ARMsFFTSpec_pTwiddle, 8
+ .set ARMsFFTSpec_pBuf, 12
+
+ @// Define stack arguments
+
+ @// Read the size from structure and take log
+ LDR N, [pFFTSpec, #ARMsFFTSpec_N]
+
+ @// Read other structure parameters
+ LDR pTwiddle, [pFFTSpec, #ARMsFFTSpec_pTwiddle]
+ LDR pOut, [pFFTSpec, #ARMsFFTSpec_pBuf]
+
+ @// N=1 Treat seperately
+ CMP N,#1
+ BGT sizeGreaterThanOne
+ VLD1 dX0[0],[pSrc]
+ VST1 dX0[0],[pDst]
+
+ B End
+
+sizeGreaterThanOne:
+
+ @// Call the preTwiddle Radix2 stage before doing the compledIFFT
+
+
+ BL armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_unsafe
+
+
+complexIFFT:
+
+ ASR N,N,#1 @// N/2 point complex IFFT
+ M_STR N, complexFFTSize @ Save N for scaling later
+ ADD pSrc,pOut,N,LSL #3 @// set pSrc as pOut1
+
+ CLZ order,N @// N = 2^order
+ RSB order,order,#31
+ MOV subFFTSize,#1
+ @//MOV subFFTNum,N
+
+ CMP order,#3
+ BGT orderGreaterthan3 @// order > 3
+
+ CMP order,#1
+ BGE orderGreaterthan0 @// order > 0
+
+ VLD1 dX0,[pSrc]
+ VST1 dX0,[pDst]
+ MOV pSrc,pDst
+ BLT FFTEnd
+
+orderGreaterthan0:
+ @// set the buffers appropriately for various orders
+ CMP order,#2
+ MOVNE argDst,pDst
+ MOVEQ argDst,pOut
+ @// Pass the first stage destination in RN5
+ MOVEQ pOut,pDst
+ MOV argTwiddle,pTwiddle
+
+ BGE orderGreaterthan1
+ BLLT armSP_FFTInv_CToC_FC32_Radix2_fs_OutOfPlace_unsafe @// order = 1
+ B FFTEnd
+
+orderGreaterthan1:
+ MOV tmpOrder,order @// tmpOrder = RN 4
+ BL armSP_FFTInv_CToC_FC32_Radix2_fs_OutOfPlace_unsafe
+ CMP tmpOrder,#2
+ BLGT armSP_FFTInv_CToC_FC32_Radix2_OutOfPlace_unsafe
+ BL armSP_FFTInv_CToC_FC32_Radix2_ls_OutOfPlace_unsafe
+ B FFTEnd
+
+
+orderGreaterthan3:
+specialScaleCase:
+
+ @// Set input args to fft stages
+ TST order, #2
+ MOVNE argDst,pDst
+ MOVEQ argDst,pOut
+ @// Pass the first stage destination in RN5
+ MOVEQ pOut,pDst
+ MOV argTwiddle,pTwiddle
+
+ @//check for even or odd order
+ @// NOTE: The following combination of BL's would work fine even though
+ @// the first BL would corrupt the flags. This is because the end of
+ @// the "grpZeroSetLoop" loop inside
+ @// armSP_FFTInv_CToC_FC32_Radix4_fs_OutOfPlace_unsafe sets the Z flag
+ @// to EQ
+
+ TST order,#0x00000001
+ BLEQ armSP_FFTInv_CToC_FC32_Radix4_fs_OutOfPlace_unsafe
+ BLNE armSP_FFTInv_CToC_FC32_Radix8_fs_OutOfPlace_unsafe
+
+ CMP subFFTNum,#4
+ BLT FFTEnd
+
+
+unscaledRadix4Loop:
+ BEQ lastStageUnscaledRadix4
+ BL armSP_FFTInv_CToC_FC32_Radix4_OutOfPlace_unsafe
+ CMP subFFTNum,#4
+ B unscaledRadix4Loop
+
+lastStageUnscaledRadix4:
+ BL armSP_FFTInv_CToC_FC32_Radix4_ls_OutOfPlace_unsafe
+ B FFTEnd
+
+FFTEnd: @// Does only the scaling
+ @ Scale inverse FFT result by 1/N
+
+ M_LDR N, complexFFTSize
+ VMOV sN,N
+ VCVT fN, sN @ fn = fftSize, as a float
+ VMOV one, 1.0
+ VDIV one, one, fN @ one = dScale[0] = 1 / fftSize
+
+
+ @// N = subFFTSize ; dataptr = pDst
+scaleFFTData:
+ VLD1 {dX0},[pSrc] @// pSrc contains pDst pointer
+ SUBS subFFTSize,subFFTSize,#1
+ VMUL dX0, dX0, dScale[0]
+ VST1 {dX0},[pSrc]!
+
+ BGT scaleFFTData
+
+End:
+ @// Set return value
+ MOV result, #OMX_Sts_NoErr
+
+ @// Write function tail
+ M_END
+
+
+
+ .end
diff --git a/dl/omxSP_FFTInv_CCSToR_S32S16_Sfs_s.S b/dl/omxSP_FFTInv_CCSToR_S32S16_Sfs_s.S
new file mode 100644
index 0000000..5ab61fe
--- /dev/null
+++ b/dl/omxSP_FFTInv_CCSToR_S32S16_Sfs_s.S
@@ -0,0 +1,146 @@
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@// This file was originally licensed as follows. It has been
+@// relicensed with permission from the copyright holders.
+@//
+
+@//
+@// File Name: omxSP_FFTInv_CCSToR_S32S16_Sfs_s.s
+@// OpenMAX DL: v1.0.2
+@// Last Modified Revision: 7098
+@// Last Modified Date: Thu, 16 Aug 2007
+@//
+@// (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+@//
+@//
+@//
+@// Description:
+@// Compute an inverse FFT for a complex signal
+@//
+
+
+
+@// Include standard headers
+
+#include "omxtypes_s.h"
+#include "armCOMM_s.h"
+
+
+@// Import symbols required from other files
+@// (For example tables)
+
+ .extern omxSP_FFTInv_CCSToR_S32_Sfs
+
+
+@// Set debugging level
+@//DEBUG_ON SETL {TRUE}
+
+
+
+@// Guarding implementation by the processor name
+
+
+
+ @// Guarding implementation by the processor name
+
+
+@// Import symbols required from other files
+@// (For example tables)
+
+
+@//Input Registers
+
+#define pSrc r0
+#define pDst r1
+#define pFFTSpec r2
+#define scale r3
+
+
+@// Output registers
+#define result r0
+
+
+#define N r6
+#define pOut r5
+#define pTmpDst r4
+
+
+@// Neon registers
+
+#define dX0 D0.S32
+#define dX01 D1.S32
+#define qX0 Q0.S32
+#define dY0 D2.S16
+#define dY0S32 D2.S32
+
+
+
+ @// Allocate stack memory required by the function
+
+ @// Write function header
+ M_START omxSP_FFTInv_CCSToR_S32S16_Sfs,r11,d15
+
+ .set ARMsFFTSpec_N, 0
+ .set ARMsFFTSpec_pBitRev, 4
+ .set ARMsFFTSpec_pTwiddle, 8
+ .set ARMsFFTSpec_pBuf, 12
+
+ @// Define stack arguments
+
+ @// Read the size from structure and take log
+ LDR N, [pFFTSpec, #ARMsFFTSpec_N]
+
+ @// Read other structure parameters
+ @//LDR pTwiddle, [pFFTSpec, #ARMsFFTSpec_pTwiddle]
+ LDR pOut, [pFFTSpec, #ARMsFFTSpec_pBuf]
+
+
+ MOV pTmpDst,pDst
+ ADD pDst,pOut,N, LSL #2
+
+
+ BL omxSP_FFTInv_CCSToR_S32_Sfs
+
+ ADD pDst,pOut,N, LSL #2
+
+ CMP N,#2
+ BGT copyLoop
+ BEQ copyS32ToS16
+ VLD1 dX0[0],[pDst]
+ VQMOVN dY0,qX0
+ VST1 dY0[0],[pTmpDst]
+
+ B End
+
+copyS32ToS16:
+
+ VLD1 dX0,[pDst]
+ VQMOVN dY0,qX0
+ VST1 dY0S32[0],[pTmpDst]
+ B End
+
+copyLoop:
+
+ VLD1 {dX0,dX01},[pDst]!
+ SUBS N,N,#4
+ VQMOVN dY0,qX0
+ VST1 dY0,[pTmpDst]!
+
+ BGT copyLoop
+
+
+End:
+ @// Set return value
+ MOV result, #OMX_Sts_NoErr
+
+ @// Write function tail
+ M_END
+
+ .end
diff --git a/dl/omxSP_FFTInv_CCSToR_S32_Sfs_s.S b/dl/omxSP_FFTInv_CCSToR_S32_Sfs_s.S
new file mode 100644
index 0000000..e547f73
--- /dev/null
+++ b/dl/omxSP_FFTInv_CCSToR_S32_Sfs_s.S
@@ -0,0 +1,390 @@
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@// This file was originally licensed as follows. It has been
+@// relicensed with permission from the copyright holders.
+@//
+
+@//
+@// File Name: omxSP_FFTInv_CCSToR_S32_Sfs_s.s
+@// OpenMAX DL: v1.0.2
+@// Last Modified Revision: 7469
+@// Last Modified Date: Thu, 20 Sep 2007
+@//
+@// (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+@//
+@//
+@//
+@// Description:
+@// Compute an inverse FFT for a complex signal
+@//
+
+
+
+@// Include standard headers
+
+#include "omxtypes_s.h"
+#include "armCOMM_s.h"
+
+
+@// Import symbols required from other files
+@// (For example tables)
+
+ .extern armSP_FFTInv_CToC_SC32_Sfs_Radix2_fs_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_SC32_Radix2_fs_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_SC32_Radix4_fs_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_SC32_Radix8_fs_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_SC32_Radix4_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_SC32_Sfs_Radix4_fs_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_SC32_Sfs_Radix8_fs_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_SC32_Sfs_Radix4_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_SC32_Sfs_Radix2_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_SC32_Radix2_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CCSToR_S32_Sfs_preTwiddleRadix2_unsafe
+ .extern armSP_FFTInv_CCSToR_S32_preTwiddleRadix2_unsafe
+
+
+@// Set debugging level
+@//DEBUG_ON SETL {TRUE}
+
+
+
+@// Guarding implementation by the processor name
+
+
+
+ @// Guarding implementation by the processor name
+
+@// Import symbols required from other files
+@// (For example tables)
+ .extern armSP_FFTInv_CToC_SC32_Radix4_ls_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_SC32_Radix2_ls_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_SC32_Sfs_Radix2_ls_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_SC32_Sfs_Radix4_ls_OutOfPlace_unsafe
+
+
+@//Input Registers
+
+#define pSrc r0
+#define pDst r1
+#define pFFTSpec r2
+#define scale r3
+
+
+@// Output registers
+#define result r0
+
+@//Local Scratch Registers
+
+#define argTwiddle r1
+#define argDst r2
+#define argScale r4
+#define tmpOrder r4
+#define pTwiddle r4
+#define pOut r5
+#define subFFTSize r7
+#define subFFTNum r6
+#define N r6
+#define order r14
+#define diff r9
+@// Total num of radix stages required to comple the FFT
+#define count r8
+#define x0r r4
+#define x0i r5
+#define diffMinusOne r2
+#define round r3
+
+#define pOut1 r2
+#define size r7
+#define step r8
+#define step1 r9
+#define twStep r10
+#define pTwiddleTmp r11
+#define argTwiddle1 r12
+#define zero r14
+
+@// Neon registers
+
+#define dX0 D0.S32
+#define dShift D1.S32
+#define dX1 D1.S32
+#define dY0 D2.S32
+#define dY1 D3.S32
+#define dX0r D0.S32
+#define dX0i D1.S32
+#define dX1r D2.S32
+#define dX1i D3.S32
+#define dW0r D4.S32
+#define dW0i D5.S32
+#define dW1r D6.S32
+#define dW1i D7.S32
+#define dT0 D8.S32
+#define dT1 D9.S32
+#define dT2 D10.S32
+#define dT3 D11.S32
+#define qT0 Q6.S64
+#define qT1 Q7.S64
+#define qT2 Q8.S64
+#define qT3 Q9.S64
+#define dY0r D4.S32
+#define dY0i D5.S32
+#define dY1r D6.S32
+#define dY1i D7.S32
+#define dzero D20.S32
+
+#define dY2 D4.S32
+#define dY3 D5.S32
+#define dW0 D6.S32
+#define dW1 D7.S32
+#define dW0Tmp D10.S32
+#define dW1Neg D11.S32
+
+
+
+ @// Allocate stack memory required by the function
+ M_ALLOC4 diffOnStack, 4
+
+ @// Write function header
+ M_START omxSP_FFTInv_CCSToR_S32_Sfs,r11,d15
+
+@ Structure offsets for the FFTSpec
+ .set ARMsFFTSpec_N, 0
+ .set ARMsFFTSpec_pBitRev, 4
+ .set ARMsFFTSpec_pTwiddle, 8
+ .set ARMsFFTSpec_pBuf, 12
+
+ @// Define stack arguments
+
+ @// Read the size from structure and take log
+ LDR N, [pFFTSpec, #ARMsFFTSpec_N]
+
+ @// Read other structure parameters
+ LDR pTwiddle, [pFFTSpec, #ARMsFFTSpec_pTwiddle]
+ LDR pOut, [pFFTSpec, #ARMsFFTSpec_pBuf]
+
+ @// N=1 Treat seperately
+ CMP N,#1
+ BGT sizeGreaterThanOne
+ VLD1 dX0[0],[pSrc]
+ RSB scale,scale,#0 @// to use VRSHL for right shift by a variable
+ VMOV dShift[0],scale
+ VRSHL dX0,dShift
+ VST1 dX0[0],[pDst]
+
+ B End
+
+sizeGreaterThanOne:
+
+ @// Call the preTwiddle Radix2 stage before doing the compledIFFT
+
+ @// The following conditional BL combination would work since
+ @// evenOddButterflyLoop in the first call would set Z flag to zero
+
+ CMP scale,#0
+ BLEQ armSP_FFTInv_CCSToR_S32_preTwiddleRadix2_unsafe
+ BLGT armSP_FFTInv_CCSToR_S32_Sfs_preTwiddleRadix2_unsafe
+
+
+
+complexIFFT:
+
+ ASR N,N,#1 @// N/2 point complex IFFT
+ ADD pSrc,pOut,N,LSL #3 @// set pSrc as pOut1
+
+ CLZ order,N @// N = 2^order
+ RSB order,order,#31
+ MOV subFFTSize,#1
+ @//MOV subFFTNum,N
+
+ ADD scale,scale,order @// FFTInverse has a final scaling factor by N
+
+ CMP order,#3
+ BGT orderGreaterthan3 @// order > 3
+
+ CMP order,#1
+ BGE orderGreaterthan0 @// order > 0
+ M_STR scale, diffOnStack,LT @// order = 0
+ VLD1 dX0,[pSrc]
+ VST1 dX0,[pDst]
+ MOV pSrc,pDst
+ BLT FFTEnd
+
+orderGreaterthan0:
+ @// set the buffers appropriately for various orders
+ CMP order,#2
+ MOVNE argDst,pDst
+ MOVEQ argDst,pOut
+ MOVEQ pOut,pDst @// Pass the first stage destination in RN5
+ MOV argTwiddle,pTwiddle
+ @// Store the scale factor and scale at the end
+ SUB diff,scale,order
+ M_STR diff, diffOnStack
+ BGE orderGreaterthan1
+ BLLT armSP_FFTInv_CToC_SC32_Sfs_Radix2_fs_OutOfPlace_unsafe @// order = 1
+ B FFTEnd
+
+orderGreaterthan1:
+ MOV tmpOrder,order @// tmpOrder = RN 4
+ BL armSP_FFTInv_CToC_SC32_Sfs_Radix2_fs_OutOfPlace_unsafe
+ CMP tmpOrder,#2
+ BLGT armSP_FFTInv_CToC_SC32_Sfs_Radix2_OutOfPlace_unsafe
+ BL armSP_FFTInv_CToC_SC32_Sfs_Radix2_ls_OutOfPlace_unsafe
+ B FFTEnd
+
+
+orderGreaterthan3:
+ @// check scale = 0 or scale = order
+ SUBS diff, scale, order @// scale > order
+ MOVGT scale,order
+ BGE specialScaleCase @// scale = 0 or scale = order
+ CMP scale,#0
+ BEQ specialScaleCase
+ B generalScaleCase
+
+specialScaleCase: @// scale = 0 or scale = order and order >= 2
+
+ TST order, #2 @// Set input args to fft stages
+ MOVNE argDst,pDst
+ MOVEQ argDst,pOut
+ MOVEQ pOut,pDst @// Pass the first stage destination in RN5
+ MOV argTwiddle,pTwiddle
+
+ CMP diff,#0
+ M_STR diff, diffOnStack
+ BGE scaleEqualsOrder
+
+ @//check for even or odd order
+ @// NOTE: The following combination of BL's would work fine eventhough the first
+ @// BL would corrupt the flags. This is because the end of the "grpZeroSetLoop" loop inside
+ @// armSP_FFTInv_CToC_SC32_Radix4_fs_OutOfPlace_unsafe sets the Z flag to EQ
+
+ TST order,#0x00000001
+ BLEQ armSP_FFTInv_CToC_SC32_Radix4_fs_OutOfPlace_unsafe
+ BLNE armSP_FFTInv_CToC_SC32_Radix8_fs_OutOfPlace_unsafe
+
+ CMP subFFTNum,#4
+ BLT FFTEnd
+
+
+unscaledRadix4Loop:
+ BEQ lastStageUnscaledRadix4
+ BL armSP_FFTInv_CToC_SC32_Radix4_OutOfPlace_unsafe
+ CMP subFFTNum,#4
+ B unscaledRadix4Loop
+
+lastStageUnscaledRadix4:
+ BL armSP_FFTInv_CToC_SC32_Radix4_ls_OutOfPlace_unsafe
+ B FFTEnd
+
+
+scaleEqualsOrder:
+ @//check for even or odd order
+ @// NOTE: The following combination of BL's would work fine eventhough the first
+ @// BL would corrupt the flags. This is because the end of the "grpZeroSetLoop" loop inside
+ @// armSP_FFTInv_CToC_SC32_Radix4_fs_OutOfPlace_unsafe sets the Z flag to EQ
+
+ TST order,#0x00000001
+ BLEQ armSP_FFTInv_CToC_SC32_Sfs_Radix4_fs_OutOfPlace_unsafe
+ BLNE armSP_FFTInv_CToC_SC32_Sfs_Radix8_fs_OutOfPlace_unsafe
+
+ CMP subFFTNum,#4
+ BLT FFTEnd
+
+
+scaledRadix4Loop:
+ BEQ lastStageScaledRadix4
+ BL armSP_FFTInv_CToC_SC32_Sfs_Radix4_OutOfPlace_unsafe
+ CMP subFFTNum,#4
+ B scaledRadix4Loop
+
+lastStageScaledRadix4:
+ BL armSP_FFTInv_CToC_SC32_Sfs_Radix4_ls_OutOfPlace_unsafe
+ B FFTEnd
+
+generalScaleCase: @// 0 < scale < order and order >= 2
+ @// Determine the correct destination buffer
+ SUB diff,order,scale
+ TST diff,#0x01
+ ADDEQ count,scale,diff,LSR #1 @// count = scale + (order - scale)/2
+ MOVNE count,order
+ TST count,#0x01 @// Is count even or odd ?
+
+ MOVNE argDst,pDst @// Set input args to fft stages
+ MOVEQ argDst,pOut
+ MOVEQ pOut,pDst @// Pass the first stage destination in RN5
+ MOV argTwiddle,pTwiddle
+
+ M_STR diff, diffOnStack
+
+ MOV argScale,scale @// Put scale in RN4 so as to save and restore
+ BL armSP_FFTInv_CToC_SC32_Sfs_Radix2_fs_OutOfPlace_unsafe @// scaled first stage
+ SUBS argScale,argScale,#1
+
+scaledRadix2Loop:
+ BLGT armSP_FFTInv_CToC_SC32_Sfs_Radix2_OutOfPlace_unsafe
+ SUBS argScale,argScale,#1 @// save and restore scale (RN4) in the scaled stages
+ BGT scaledRadix2Loop
+
+
+ M_LDR diff, diffOnStack
+ @//check for even or odd order
+ TST diff,#0x00000001
+ BEQ generalUnscaledRadix4Loop
+ B unscaledRadix2Loop
+
+generalUnscaledRadix4Loop:
+ CMP subFFTNum,#4
+ BEQ generalLastStageUnscaledRadix4
+ BL armSP_FFTInv_CToC_SC32_Radix4_OutOfPlace_unsafe
+ B generalUnscaledRadix4Loop
+
+generalLastStageUnscaledRadix4:
+ BL armSP_FFTInv_CToC_SC32_Radix4_ls_OutOfPlace_unsafe
+ B End
+
+
+unscaledRadix2Loop:
+ CMP subFFTNum,#2
+ BEQ generalLastStageUnscaledRadix2
+ BL armSP_FFTInv_CToC_SC32_Radix2_OutOfPlace_unsafe
+ B unscaledRadix2Loop
+
+generalLastStageUnscaledRadix2:
+ BL armSP_FFTInv_CToC_SC32_Radix2_ls_OutOfPlace_unsafe
+ B End
+
+
+FFTEnd: @// Does only the scaling
+
+ M_LDR diff, diffOnStack
+ CMP diff,#0
+ BLE End
+
+ RSB diff,diff,#0 @// to use VRSHL for right shift by a variable
+ VDUP dShift,diff
+
+scaleFFTData: @// N = subFFTSize ; dataptr = pDst ; scale = diff
+ VLD1 {dX0},[pSrc] @// pSrc contains pDst pointer
+ SUBS subFFTSize,subFFTSize,#1
+ VRSHL dX0,dShift
+ VST1 {dX0},[pSrc]!
+
+ BGT scaleFFTData
+
+
+End:
+ @// Set return value
+ MOV result, #OMX_Sts_NoErr
+
+ @// Write function tail
+ M_END
+
+
+
+ .end
diff --git a/dl/omxSP_FFTInv_CToC_FC32_Sfs_s.S b/dl/omxSP_FFTInv_CToC_FC32_Sfs_s.S
new file mode 100644
index 0000000..5d5d3d8
--- /dev/null
+++ b/dl/omxSP_FFTInv_CToC_FC32_Sfs_s.S
@@ -0,0 +1,214 @@
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@// This is a modification of armSP_FFT_CToC_SC32_Radix2_fs_unsafe_s.s
+@// to support float instead of SC32.
+@//
+
+@//
+@// Description:
+@// Compute an inverse FFT for a complex signal
+@//
+@//
+
+
+@// Include standard headers
+
+#include "omxtypes_s.h"
+#include "armCOMM_s.h"
+
+@// Import symbols required from other files
+@// (For example tables)
+
+ .extern armSP_FFTInv_CToC_FC32_Radix2_fs_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_FC32_Radix4_fs_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_FC32_Radix8_fs_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_FC32_Radix4_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_FC32_Radix2_OutOfPlace_unsafe
+
+@// Set debugging level
+@//DEBUG_ON SETL {TRUE}
+
+
+
+@// Guarding implementation by the processor name
+
+
+
+ @// Guarding implementation by the processor name
+
+@// Import symbols required from other files
+@// (For example tables)
+ .extern armSP_FFTInv_CToC_FC32_Radix4_ls_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_FC32_Radix2_ls_OutOfPlace_unsafe
+
+
+@//Input Registers
+
+#define pSrc r0
+#define pDst r1
+#define pFFTSpec r2
+
+
+@// Output registers
+#define result r0
+
+@//Local Scratch Registers
+
+#define argTwiddle r1
+#define argDst r2
+#define argScale r4
+#define tmpOrder r4
+#define pTwiddle r4
+#define pOut r5
+#define subFFTSize r7
+#define subFFTNum r6
+#define N r6
+#define order r14
+#define diff r9
+@// Total num of radix stages required to comple the FFT
+#define count r8
+#define x0r r4
+#define x0i r5
+#define diffMinusOne r2
+
+@// Neon registers
+
+#define dX0 D0.F32
+#define qX0 Q0.F32
+#define sN S0.S32
+#define fN S1.F32
+@// one must be the same as dScale[0]!
+#define dScale D4.F32
+#define one S8.F32
+
+
+
+ @// Allocate stack memory required by the function
+ M_ALLOC4 fftSize, 4
+
+ @// Write function header
+ M_START omxSP_FFTInv_CToC_FC32_Sfs,r11,d15
+
+@ Structure offsets for the FFTSpec
+ .set ARMsFFTSpec_N, 0
+ .set ARMsFFTSpec_pBitRev, 4
+ .set ARMsFFTSpec_pTwiddle, 8
+ .set ARMsFFTSpec_pBuf, 12
+
+ @// Define stack arguments
+
+ @// Read the size from structure and take log
+ LDR N, [pFFTSpec, #ARMsFFTSpec_N]
+ M_STR N, fftSize
+
+ @// Read other structure parameters
+ LDR pTwiddle, [pFFTSpec, #ARMsFFTSpec_pTwiddle]
+ LDR pOut, [pFFTSpec, #ARMsFFTSpec_pBuf]
+
+ CLZ order,N @// N = 2^order
+ RSB order,order,#31
+ MOV subFFTSize,#1
+ @//MOV subFFTNum,N
+
+ CMP order,#3
+ BGT orderGreaterthan3 @// order > 3
+
+ CMP order,#1
+ BGE orderGreaterthan0 @// order > 0
+ VLD1 dX0,[pSrc]
+ VST1 dX0,[pDst]
+ MOV pSrc,pDst
+ BLT FFTEnd
+
+orderGreaterthan0:
+ @// set the buffers appropriately for various orders
+ CMP order,#2
+ MOVNE argDst,pDst
+ MOVEQ argDst,pOut
+ @// Pass the first stage destination in RN5
+ MOVEQ pOut,pDst
+ MOV argTwiddle,pTwiddle
+ BGE orderGreaterthan1
+ @// order = 1
+ BLLT armSP_FFTInv_CToC_FC32_Radix2_fs_OutOfPlace_unsafe
+ B FFTEnd
+
+orderGreaterthan1:
+ MOV tmpOrder,order @// tmpOrder = RN 4
+ BL armSP_FFTInv_CToC_FC32_Radix2_fs_OutOfPlace_unsafe
+ CMP tmpOrder,#2
+ BLGT armSP_FFTInv_CToC_FC32_Radix2_OutOfPlace_unsafe
+ BL armSP_FFTInv_CToC_FC32_Radix2_ls_OutOfPlace_unsafe
+ B FFTEnd
+
+
+orderGreaterthan3:
+
+ @// Set input args to fft stages
+ TST order, #2
+ MOVNE argDst,pDst
+ MOVEQ argDst,pOut
+ @// Pass the first stage destination in RN5
+ MOVEQ pOut,pDst
+ MOV argTwiddle,pTwiddle
+
+ @//check for even or odd order
+ @// NOTE: The following combination of BL's would work fine even though
+ @// the first BL would corrupt the flags. This is because the end of
+ @// the "grpZeroSetLoop" loop inside
+ @// armSP_FFTInv_CToC_SC32_Radix4_fs_OutOfPlace_unsafe sets the Z flag
+ @// to EQ
+
+ TST order,#0x00000001
+ BLEQ armSP_FFTInv_CToC_FC32_Radix4_fs_OutOfPlace_unsafe
+ BLNE armSP_FFTInv_CToC_FC32_Radix8_fs_OutOfPlace_unsafe
+
+ CMP subFFTNum,#4
+ BLT FFTEnd
+
+
+unscaledRadix4Loop:
+ BEQ lastStageUnscaledRadix4
+ BL armSP_FFTInv_CToC_FC32_Radix4_OutOfPlace_unsafe
+ CMP subFFTNum,#4
+ B unscaledRadix4Loop
+
+lastStageUnscaledRadix4:
+ BL armSP_FFTInv_CToC_FC32_Radix4_ls_OutOfPlace_unsafe
+ B FFTEnd
+
+FFTEnd: @// Does only the scaling
+
+ M_LDR N, fftSize
+
+ VMOV sN,N
+ VCVT fN, sN @ fn = fftSize, as a float
+ VMOV one, 1.0
+ VDIV one, one, fN @ one = dScale[0] = 1 / fftSize
+
+ @ Scale data, doing 2 complex values at a time (because N is
+ @ always even).
+
+ @// N = subFFTSize ; dataptr = pDst ; scale = diff
+scaleFFTData:
+ VLD1 {qX0},[pSrc :128] @// pSrc contains pDst pointer
+ SUBS subFFTSize,subFFTSize,#2
+ VMUL qX0, qX0, dScale[0]
+ VST1 {qX0},[pSrc :128]!
+
+ BGT scaleFFTData
+End:
+ @// Set return value
+ MOV result, #OMX_Sts_NoErr
+
+ @// Write function tail
+ M_END
+
+ .end
diff --git a/dl/omxSP_FFTInv_CToC_SC32_Sfs_s.S b/dl/omxSP_FFTInv_CToC_SC32_Sfs_s.S
new file mode 100644
index 0000000..e645fb8
--- /dev/null
+++ b/dl/omxSP_FFTInv_CToC_SC32_Sfs_s.S
@@ -0,0 +1,314 @@
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@// This file was originally licensed as follows. It has been
+@// relicensed with permission from the copyright holders.
+@//
+
+@//
+@// File Name: omxSP_FFTInv_CToC_SC32_Sfs_s.s
+@// OpenMAX DL: v1.0.2
+@// Last Modified Revision: 6675
+@// Last Modified Date: Fri, 06 Jul 2007
+@//
+@// (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+@//
+@//
+@//
+@// Description:
+@// Compute an inverse FFT for a complex signal
+@//
+
+
+@// Include standard headers
+
+#include "omxtypes_s.h"
+#include "armCOMM_s.h"
+
+@// Import symbols required from other files
+@// (For example tables)
+
+ .extern armSP_FFTInv_CToC_SC32_Sfs_Radix2_fs_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_SC32_Radix2_fs_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_SC32_Radix4_fs_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_SC32_Radix8_fs_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_SC32_Radix4_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_SC32_Sfs_Radix4_fs_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_SC32_Sfs_Radix8_fs_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_SC32_Sfs_Radix4_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_SC32_Sfs_Radix2_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_SC32_Radix2_OutOfPlace_unsafe
+
+@// Set debugging level
+@//DEBUG_ON SETL {TRUE}
+
+
+
+@// Guarding implementation by the processor name
+
+
+
+ @// Guarding implementation by the processor name
+
+@// Import symbols required from other files
+@// (For example tables)
+ .extern armSP_FFTInv_CToC_SC32_Radix4_ls_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_SC32_Radix2_ls_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_SC32_Sfs_Radix2_ls_OutOfPlace_unsafe
+ .extern armSP_FFTInv_CToC_SC32_Sfs_Radix4_ls_OutOfPlace_unsafe
+
+
+@//Input Registers
+
+#define pSrc r0
+#define pDst r1
+#define pFFTSpec r2
+#define scale r3
+
+
+@// Output registers
+#define result r0
+
+@//Local Scratch Registers
+
+#define argTwiddle r1
+#define argDst r2
+#define argScale r4
+#define tmpOrder r4
+#define pTwiddle r4
+#define pOut r5
+#define subFFTSize r7
+#define subFFTNum r6
+#define N r6
+#define order r14
+#define diff r9
+@// Total num of radix stages required to comple the FFT
+#define count r8
+#define x0r r4
+#define x0i r5
+#define diffMinusOne r2
+#define round r3
+
+@// Neon registers
+
+#define dX0 D0.S32
+#define dShift D1.S32
+
+
+
+ @// Allocate stack memory required by the function
+ M_ALLOC4 diffOnStack, 4
+
+ @// Write function header
+ M_START omxSP_FFTInv_CToC_SC32_Sfs,r11,d15
+
+@ Structure offsets for the FFTSpec
+ .set ARMsFFTSpec_N, 0
+ .set ARMsFFTSpec_pBitRev, 4
+ .set ARMsFFTSpec_pTwiddle, 8
+ .set ARMsFFTSpec_pBuf, 12
+
+ @// Define stack arguments
+
+ @// Read the size from structure and take log
+ LDR N, [pFFTSpec, #ARMsFFTSpec_N]
+
+ @// Read other structure parameters
+ LDR pTwiddle, [pFFTSpec, #ARMsFFTSpec_pTwiddle]
+ LDR pOut, [pFFTSpec, #ARMsFFTSpec_pBuf]
+
+ CLZ order,N @// N = 2^order
+ RSB order,order,#31
+ MOV subFFTSize,#1
+ @//MOV subFFTNum,N
+
+ ADD scale,scale,order @// FFTInverse has a final scaling factor by N
+
+ CMP order,#3
+ BGT orderGreaterthan3 @// order > 3
+
+ CMP order,#1
+ BGE orderGreaterthan0 @// order > 0
+ M_STR scale, diffOnStack,LT @// order = 0
+ VLD1 dX0,[pSrc]
+ VST1 dX0,[pDst]
+ MOV pSrc,pDst
+ BLT FFTEnd
+
+orderGreaterthan0:
+ @// set the buffers appropriately for various orders
+ CMP order,#2
+ MOVNE argDst,pDst
+ MOVEQ argDst,pOut
+ MOVEQ pOut,pDst @// Pass the first stage destination in RN5
+ MOV argTwiddle,pTwiddle
+ @// Store the scale factor and scale at the end
+ SUB diff,scale,order
+ M_STR diff, diffOnStack
+ BGE orderGreaterthan1
+ BLLT armSP_FFTInv_CToC_SC32_Sfs_Radix2_fs_OutOfPlace_unsafe @// order = 1
+ B FFTEnd
+
+orderGreaterthan1:
+ MOV tmpOrder,order @// tmpOrder = RN 4
+ BL armSP_FFTInv_CToC_SC32_Sfs_Radix2_fs_OutOfPlace_unsafe
+ CMP tmpOrder,#2
+ BLGT armSP_FFTInv_CToC_SC32_Sfs_Radix2_OutOfPlace_unsafe
+ BL armSP_FFTInv_CToC_SC32_Sfs_Radix2_ls_OutOfPlace_unsafe
+ B FFTEnd
+
+
+orderGreaterthan3:
+ @// check scale = 0 or scale = order
+ SUBS diff, scale, order @// scale > order
+ MOVGT scale,order
+ BGE specialScaleCase @// scale = 0 or scale = order
+ CMP scale,#0
+ BEQ specialScaleCase
+ B generalScaleCase
+
+specialScaleCase: @// scale = 0 or scale = order and order >= 2
+
+ TST order, #2 @// Set input args to fft stages
+ MOVNE argDst,pDst
+ MOVEQ argDst,pOut
+ MOVEQ pOut,pDst @// Pass the first stage destination in RN5
+ MOV argTwiddle,pTwiddle
+
+ CMP diff,#0
+ M_STR diff, diffOnStack
+ BGE scaleEqualsOrder
+
+ @//check for even or odd order
+ @// NOTE: The following combination of BL's would work fine eventhough the first
+ @// BL would corrupt the flags. This is because the end of the "grpZeroSetLoop" loop inside
+ @// armSP_FFTInv_CToC_SC32_Radix4_fs_OutOfPlace_unsafe sets the Z flag to EQ
+
+ TST order,#0x00000001
+ BLEQ armSP_FFTInv_CToC_SC32_Radix4_fs_OutOfPlace_unsafe
+ BLNE armSP_FFTInv_CToC_SC32_Radix8_fs_OutOfPlace_unsafe
+
+ CMP subFFTNum,#4
+ BLT FFTEnd
+
+
+unscaledRadix4Loop:
+ BEQ lastStageUnscaledRadix4
+ BL armSP_FFTInv_CToC_SC32_Radix4_OutOfPlace_unsafe
+ CMP subFFTNum,#4
+ B unscaledRadix4Loop
+
+lastStageUnscaledRadix4:
+ BL armSP_FFTInv_CToC_SC32_Radix4_ls_OutOfPlace_unsafe
+ B FFTEnd
+
+
+scaleEqualsOrder:
+ @//check for even or odd order
+ @// NOTE: The following combination of BL's would work fine eventhough the first
+ @// BL would corrupt the flags. This is because the end of the "grpZeroSetLoop" loop inside
+ @// armSP_FFTInv_CToC_SC32_Radix4_fs_OutOfPlace_unsafe sets the Z flag to EQ
+
+ TST order,#0x00000001
+ BLEQ armSP_FFTInv_CToC_SC32_Sfs_Radix4_fs_OutOfPlace_unsafe
+ BLNE armSP_FFTInv_CToC_SC32_Sfs_Radix8_fs_OutOfPlace_unsafe
+
+ CMP subFFTNum,#4
+ BLT FFTEnd
+
+
+scaledRadix4Loop:
+ BEQ lastStageScaledRadix4
+ BL armSP_FFTInv_CToC_SC32_Sfs_Radix4_OutOfPlace_unsafe
+ CMP subFFTNum,#4
+ B scaledRadix4Loop
+
+lastStageScaledRadix4:
+ BL armSP_FFTInv_CToC_SC32_Sfs_Radix4_ls_OutOfPlace_unsafe
+ B FFTEnd
+
+generalScaleCase: @// 0 < scale < order and order >= 2
+ @// Determine the correct destination buffer
+ SUB diff,order,scale
+ TST diff,#0x01
+ ADDEQ count,scale,diff,LSR #1 @// count = scale + (order - scale)/2
+ MOVNE count,order
+ TST count,#0x01 @// Is count even or odd ?
+
+ MOVNE argDst,pDst @// Set input args to fft stages
+ MOVEQ argDst,pOut
+ MOVEQ pOut,pDst @// Pass the first stage destination in RN5
+ MOV argTwiddle,pTwiddle
+
+ M_STR diff, diffOnStack
+
+ MOV argScale,scale @// Put scale in RN4 so as to save and restore
+ BL armSP_FFTInv_CToC_SC32_Sfs_Radix2_fs_OutOfPlace_unsafe @// scaled first stage
+ SUBS argScale,argScale,#1
+
+scaledRadix2Loop:
+ BLGT armSP_FFTInv_CToC_SC32_Sfs_Radix2_OutOfPlace_unsafe
+ SUBS argScale,argScale,#1 @// save and restore scale (RN4) in the scaled stages
+ BGT scaledRadix2Loop
+
+
+ M_LDR diff, diffOnStack
+ @//check for even or odd order
+ TST diff,#0x00000001
+ BEQ generalUnscaledRadix4Loop
+ B unscaledRadix2Loop
+
+generalUnscaledRadix4Loop:
+ CMP subFFTNum,#4
+ BEQ generalLastStageUnscaledRadix4
+ BL armSP_FFTInv_CToC_SC32_Radix4_OutOfPlace_unsafe
+ B generalUnscaledRadix4Loop
+
+generalLastStageUnscaledRadix4:
+ BL armSP_FFTInv_CToC_SC32_Radix4_ls_OutOfPlace_unsafe
+ B End
+
+
+unscaledRadix2Loop:
+ CMP subFFTNum,#2
+ BEQ generalLastStageUnscaledRadix2
+ BL armSP_FFTInv_CToC_SC32_Radix2_OutOfPlace_unsafe
+ B unscaledRadix2Loop
+
+generalLastStageUnscaledRadix2:
+ BL armSP_FFTInv_CToC_SC32_Radix2_ls_OutOfPlace_unsafe
+ B End
+
+
+FFTEnd: @// Does only the scaling
+
+ M_LDR diff, diffOnStack
+ CMP diff,#0
+ BLE End
+
+ RSB diff,diff,#0 @// to use VRSHL for right shift by a variable
+ VDUP dShift,diff
+
+scaleFFTData: @// N = subFFTSize ; dataptr = pDst ; scale = diff
+ VLD1 {dX0},[pSrc] @// pSrc contains pDst pointer
+ SUBS subFFTSize,subFFTSize,#1
+ VRSHL dX0,dShift
+ VST1 {dX0},[pSrc]!
+
+ BGT scaleFFTData
+
+
+End:
+ @// Set return value
+ MOV result, #OMX_Sts_NoErr
+
+ @// Write function tail
+ M_END
+
+ .end
diff --git a/dl/omxtypes.h b/dl/omxtypes.h
new file mode 100644
index 0000000..0732e40
--- /dev/null
+++ b/dl/omxtypes.h
@@ -0,0 +1,297 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ *
+ * This file was originally licensed as follows. It has been
+ * relicensed with permission from the copyright holders.
+ */
+
+/**
+ * File: omxtypes.h
+ * Brief: Defines basic Data types used in OpenMAX v1.0.2 header files.
+ *
+ * Copyright © 2005-2008 The Khronos Group Inc. All Rights Reserved.
+ *
+ * These materials are protected by copyright laws and contain material
+ * proprietary to the Khronos Group, Inc. You may use these materials
+ * for implementing Khronos specifications, without altering or removing
+ * any trademark, copyright or other notice from the specification.
+ *
+ * Khronos Group makes no, and expressly disclaims any, representations
+ * or warranties, express or implied, regarding these materials, including,
+ * without limitation, any implied warranties of merchantability or fitness
+ * for a particular purpose or non-infringement of any intellectual property.
+ * Khronos Group makes no, and expressly disclaims any, warranties, express
+ * or implied, regarding the correctness, accuracy, completeness, timeliness,
+ * and reliability of these materials.
+ *
+ * Under no circumstances will the Khronos Group, or any of its Promoters,
+ * Contributors or Members or their respective partners, officers, directors,
+ * employees, agents or representatives be liable for any damages, whether
+ * direct, indirect, special or consequential damages for lost revenues,
+ * lost profits, or otherwise, arising from or in connection with these
+ * materials.
+ *
+ * Khronos and OpenMAX are trademarks of the Khronos Group Inc.
+ *
+ */
+
+#ifndef _OMXTYPES_H_
+#define _OMXTYPES_H_
+
+#include <limits.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * Maximum FFT order supported by the twiddle table. Only used by the
+ * float FFT routines. Must be consistent with the table in
+ * armSP_FFT_F32TwiddleTable.c.
+ */
+#ifdef BIG_FFT_TABLE
+#define TWIDDLE_TABLE_ORDER 15
+#else
+#define TWIDDLE_TABLE_ORDER 12
+#endif
+
+#define OMX_IN
+#define OMX_OUT
+#define OMX_INOUT
+
+
+typedef enum {
+
+ /* Mandatory return codes - use cases are explicitly described for each function */
+ OMX_Sts_NoErr = 0, /* No error, the function completed successfully */
+ OMX_Sts_Err = -2, /* Unknown/unspecified error */
+ OMX_Sts_InvalidBitstreamValErr = -182, /* Invalid value detected during bitstream processing */
+ OMX_Sts_MemAllocErr = -9, /* Not enough memory allocated for the operation */
+ OMX_StsACAAC_GainCtrErr = -159, /* AAC: Unsupported gain control data detected */
+ OMX_StsACAAC_PrgNumErr = -167, /* AAC: Invalid number of elements for one program */
+ OMX_StsACAAC_CoefValErr = -163, /* AAC: Invalid quantized coefficient value */
+ OMX_StsACAAC_MaxSfbErr = -162, /* AAC: Invalid maxSfb value in relation to numSwb */
+ OMX_StsACAAC_PlsDataErr = -160, /* AAC: pulse escape sequence data error */
+
+ /* Optional return codes - use cases are explicitly described for each function*/
+ OMX_Sts_BadArgErr = -5, /* Bad Arguments */
+
+ OMX_StsACAAC_TnsNumFiltErr = -157, /* AAC: Invalid number of TNS filters */
+ OMX_StsACAAC_TnsLenErr = -156, /* AAC: Invalid TNS region length */
+ OMX_StsACAAC_TnsOrderErr = -155, /* AAC: Invalid order of TNS filter */
+ OMX_StsACAAC_TnsCoefResErr = -154, /* AAC: Invalid bit-resolution for TNS filter coefficients */
+ OMX_StsACAAC_TnsCoefErr = -153, /* AAC: Invalid TNS filter coefficients */
+ OMX_StsACAAC_TnsDirectErr = -152, /* AAC: Invalid TNS filter direction */
+
+ OMX_StsICJP_JPEGMarkerErr = -183, /* JPEG marker encountered within an entropy-coded block; */
+ /* Huffman decoding operation terminated early. */
+ OMX_StsICJP_JPEGMarker = -181, /* JPEG marker encountered; Huffman decoding */
+ /* operation terminated early. */
+ OMX_StsIPPP_ContextMatchErr = -17, /* Context parameter doesn't match to the operation */
+
+ OMX_StsSP_EvenMedianMaskSizeErr = -180, /* Even size of the Median Filter mask was replaced by the odd one */
+
+ OMX_Sts_MaximumEnumeration = INT_MAX /*Placeholder, forces enum of size OMX_INT*/
+
+ } OMXResult; /** Return value or error value returned from a function. Identical to OMX_INT */
+
+
+/* OMX_U8 */
+#if UCHAR_MAX == 0xff
+typedef unsigned char OMX_U8;
+#elif USHRT_MAX == 0xff
+typedef unsigned short int OMX_U8;
+#else
+#error OMX_U8 undefined
+#endif
+
+
+/* OMX_S8 */
+#if SCHAR_MAX == 0x7f
+typedef signed char OMX_S8;
+#elif SHRT_MAX == 0x7f
+typedef signed short int OMX_S8;
+#else
+#error OMX_S8 undefined
+#endif
+
+
+/* OMX_U16 */
+#if USHRT_MAX == 0xffff
+typedef unsigned short int OMX_U16;
+#elif UINT_MAX == 0xffff
+typedef unsigned int OMX_U16;
+#else
+#error OMX_U16 undefined
+#endif
+
+
+/* OMX_S16 */
+#if SHRT_MAX == 0x7fff
+typedef signed short int OMX_S16;
+#elif INT_MAX == 0x7fff
+typedef signed int OMX_S16;
+#else
+#error OMX_S16 undefined
+#endif
+
+
+/* OMX_U32 */
+#if UINT_MAX == 0xffffffff
+typedef unsigned int OMX_U32;
+#elif LONG_MAX == 0xffffffff
+typedef unsigned long int OMX_U32;
+#else
+#error OMX_U32 undefined
+#endif
+
+
+/* OMX_S32 */
+#if INT_MAX == 0x7fffffff
+typedef signed int OMX_S32;
+#elif LONG_MAX == 0x7fffffff
+typedef long signed int OMX_S32;
+#else
+#error OMX_S32 undefined
+#endif
+
+
+/* OMX_U64 & OMX_S64 */
+#if defined( _WIN32 ) || defined ( _WIN64 )
+ typedef __int64 OMX_S64; /** Signed 64-bit integer */
+ typedef unsigned __int64 OMX_U64; /** Unsigned 64-bit integer */
+ #define OMX_MIN_S64 (0x8000000000000000i64)
+ #define OMX_MIN_U64 (0x0000000000000000i64)
+ #define OMX_MAX_S64 (0x7FFFFFFFFFFFFFFFi64)
+ #define OMX_MAX_U64 (0xFFFFFFFFFFFFFFFFi64)
+#else
+ typedef long long OMX_S64; /** Signed 64-bit integer */
+ typedef unsigned long long OMX_U64; /** Unsigned 64-bit integer */
+ #define OMX_MIN_S64 (0x8000000000000000LL)
+ #define OMX_MIN_U64 (0x0000000000000000LL)
+ #define OMX_MAX_S64 (0x7FFFFFFFFFFFFFFFLL)
+ #define OMX_MAX_U64 (0xFFFFFFFFFFFFFFFFLL)
+#endif
+
+
+/* OMX_SC8 */
+typedef struct
+{
+ OMX_S8 Re; /** Real part */
+ OMX_S8 Im; /** Imaginary part */
+
+} OMX_SC8; /** Signed 8-bit complex number */
+
+
+/* OMX_SC16 */
+typedef struct
+{
+ OMX_S16 Re; /** Real part */
+ OMX_S16 Im; /** Imaginary part */
+
+} OMX_SC16; /** Signed 16-bit complex number */
+
+
+/* OMX_SC32 */
+typedef struct
+{
+ OMX_S32 Re; /** Real part */
+ OMX_S32 Im; /** Imaginary part */
+
+} OMX_SC32; /** Signed 32-bit complex number */
+
+
+/* OMX_SC64 */
+typedef struct
+{
+ OMX_S64 Re; /** Real part */
+ OMX_S64 Im; /** Imaginary part */
+
+} OMX_SC64; /** Signed 64-bit complex number */
+
+
+/* OMX_F32 */
+typedef float OMX_F32; /** Single precision floating point,IEEE 754 */
+
+/* OMX_F64 */
+typedef double OMX_F64; /** Double precision floating point,IEEE 754 */
+
+/* OMX_FC32 */
+typedef struct
+{
+ OMX_F32 Re; /** Real part */
+ OMX_F32 Im; /** Imaginary part */
+
+} OMX_FC32; /** single precision floating point complex number */
+
+/* OMX_FC64 */
+typedef struct
+{
+ OMX_F64 Re; /** Real part */
+ OMX_F64 Im; /** Imaginary part */
+
+} OMX_FC64; /** double precision floating point complex number */
+
+/* OMX_INT */
+typedef int OMX_INT; /** signed integer corresponding to machine word length, has maximum signed value INT_MAX*/
+
+
+#define OMX_MIN_S8 (-128)
+#define OMX_MIN_U8 0
+#define OMX_MIN_S16 (-32768)
+#define OMX_MIN_U16 0
+#define OMX_MIN_S32 (-2147483647-1)
+#define OMX_MIN_U32 0
+
+#define OMX_MAX_S8 (127)
+#define OMX_MAX_U8 (255)
+#define OMX_MAX_S16 (32767)
+#define OMX_MAX_U16 (0xFFFF)
+#define OMX_MAX_S32 (2147483647)
+#define OMX_MAX_U32 (0xFFFFFFFF)
+
+typedef void OMXVoid;
+
+#ifndef NULL
+#define NULL ((void*)0)
+#endif
+
+/** Defines the geometric position and size of a rectangle,
+ * where x,y defines the coordinates of the top left corner
+ * of the rectangle, with dimensions width in the x-direction
+ * and height in the y-direction */
+typedef struct {
+ OMX_INT x; /** x-coordinate of top left corner of rectangle */
+ OMX_INT y; /** y-coordinate of top left corner of rectangle */
+ OMX_INT width; /** Width in the x-direction. */
+ OMX_INT height; /** Height in the y-direction. */
+}OMXRect;
+
+
+/** Defines the geometric position of a point, */
+typedef struct
+{
+ OMX_INT x; /** x-coordinate */
+ OMX_INT y; /** y-coordinate */
+
+} OMXPoint;
+
+
+/** Defines the dimensions of a rectangle, or region of interest in an image */
+typedef struct
+{
+ OMX_INT width; /** Width of the rectangle, in the x-direction */
+ OMX_INT height; /** Height of the rectangle, in the y-direction */
+
+} OMXSize;
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _OMXTYPES_H_ */
diff --git a/dl/omxtypes_s.h b/dl/omxtypes_s.h
new file mode 100644
index 0000000..d880d35
--- /dev/null
+++ b/dl/omxtypes_s.h
@@ -0,0 +1,76 @@
+@//
+@// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+@//
+@// Use of this source code is governed by a BSD-style license
+@// that can be found in the LICENSE file in the root of the source
+@// tree. An additional intellectual property rights grant can be found
+@// in the file PATENTS. All contributing project authors may
+@// be found in the AUTHORS file in the root of the source tree.
+@//
+@// This file was originally licensed as follows. It has been
+@// relicensed with permission from the copyright holders.
+@//
+
+@//
+@// File Name: omxtypes_s.h
+@// OpenMAX DL: v1.0.2
+@// Last Modified Revision: 9622
+@// Last Modified Date: Wed, 06 Feb 2008
+@//
+@// (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
+@//
+@//
+
+@// Mandatory return codes - use cases are explicitly described for each function
+ .equ OMX_Sts_NoErr, 0 @// No error the function completed successfully
+ .equ OMX_Sts_Err, -2 @// Unknown/unspecified error
+ .equ OMX_Sts_InvalidBitstreamValErr, -182 @// Invalid value detected during bitstream processing
+ .equ OMX_Sts_MemAllocErr, -9 @// Not enough memory allocated for the operation
+ .equ OMX_StsACAAC_GainCtrErr, -159 @// AAC: Unsupported gain control data detected
+ .equ OMX_StsACAAC_PrgNumErr, -167 @// AAC: Invalid number of elements for one program
+ .equ OMX_StsACAAC_CoefValErr, -163 @// AAC: Invalid quantized coefficient value
+ .equ OMX_StsACAAC_MaxSfbErr, -162 @// AAC: Invalid maxSfb value in relation to numSwb
+ .equ OMX_StsACAAC_PlsDataErr, -160 @// AAC: pulse escape sequence data error
+
+@// Optional return codes - use cases are explicitly described for each function
+ .equ OMX_Sts_BadArgErr, -5 @// Bad Arguments
+
+ .equ OMX_StsACAAC_TnsNumFiltErr, -157 @// AAC: Invalid number of TNS filters
+ .equ OMX_StsACAAC_TnsLenErr, -156 @// AAC: Invalid TNS region length
+ .equ OMX_StsACAAC_TnsOrderErr, -155 @// AAC: Invalid order of TNS filter
+ .equ OMX_StsACAAC_TnsCoefResErr, -154 @// AAC: Invalid bit-resolution for TNS filter coefficients
+ .equ OMX_StsACAAC_TnsCoefErr, -153 @// AAC: Invalid TNS filter coefficients
+ .equ OMX_StsACAAC_TnsDirectErr, -152 @// AAC: Invalid TNS filter direction
+ .equ OMX_StsICJP_JPEGMarkerErr, -183 @// JPEG marker encountered within an entropy-coded block;
+ @// Huffman decoding operation terminated early.
+ .equ OMX_StsICJP_JPEGMarker, -181 @// JPEG marker encountered; Huffman decoding
+ @// operation terminated early.
+ .equ OMX_StsIPPP_ContextMatchErr, -17 @// Context parameter doesn't match to the operation
+
+ .equ OMX_StsSP_EvenMedianMaskSizeErr, -180 @// Even size of the Median Filter mask was replaced by the odd one
+
+ .equ OMX_Sts_MaximumEnumeration, 0x7FFFFFFF
+
+
+
+ .equ OMX_MIN_S8, (-128)
+ .equ OMX_MIN_U8, 0
+ .equ OMX_MIN_S16, (-32768)
+ .equ OMX_MIN_U16, 0
+
+
+ .equ OMX_MIN_S32, (-2147483647-1)
+ .equ OMX_MIN_U32, 0
+
+ .equ OMX_MAX_S8, (127)
+ .equ OMX_MAX_U8, (255)
+ .equ OMX_MAX_S16, (32767)
+ .equ OMX_MAX_U16, (0xFFFF)
+ .equ OMX_MAX_S32, (2147483647)
+ .equ OMX_MAX_U32, (0xFFFFFFFF)
+
+ .equ OMX_VC_UPPER, 0x1 @// Used by the PredictIntra functions
+ .equ OMX_VC_LEFT, 0x2 @// Used by the PredictIntra functions
+ .equ OMX_VC_UPPER_RIGHT, 0x40 @// Used by the PredictIntra functions
+
+ .equ NULL, 0
diff --git a/dl/test/aligned_ptr.c b/dl/test/aligned_ptr.c
new file mode 100644
index 0000000..2bb3e7a
--- /dev/null
+++ b/dl/test/aligned_ptr.c
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ */
+
+#include "aligned_ptr.h"
+
+#include <stdlib.h>
+
+/* |alignment| is the byte alignment and MUST be a power of two. */
+struct AlignedPtr* AllocAlignedPointer(int alignment, int bytes) {
+ struct AlignedPtr* aligned_ptr;
+ unsigned long raw_address;
+
+ aligned_ptr = (struct AlignedPtr*) malloc(sizeof(*aligned_ptr));
+ aligned_ptr->raw_pointer_ = malloc(bytes + alignment);
+ raw_address = (unsigned long) aligned_ptr->raw_pointer_;
+ raw_address = (raw_address + alignment - 1) & ~(alignment - 1);
+ aligned_ptr->aligned_pointer_ = (void*) raw_address;
+
+ return aligned_ptr;
+}
+
+void FreeAlignedPointer(struct AlignedPtr* pointer) {
+ free(pointer->raw_pointer_);
+ free(pointer);
+}
diff --git a/dl/test/aligned_ptr.h b/dl/test/aligned_ptr.h
new file mode 100644
index 0000000..c6da752
--- /dev/null
+++ b/dl/test/aligned_ptr.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ */
+
+#ifndef WEBRTC_ARM_FFT_TEST_ALIGNED_PTR_H_
+#define WEBRTC_ARM_FFT_TEST_ALIGNED_PTR_H_
+
+/*
+ * Simple aligned pointer structure to get provide aligned pointers
+ * that can be freed.
+ */
+struct AlignedPtr {
+ void* raw_pointer_;
+ void* aligned_pointer_;
+};
+
+/*
+ * Allocate an aligned pointer to an area of size |bytes| bytes. The
+ * pointer is aligned to |alignment| bytes, which MUST be a power of
+ * two. The aligned pointer itself is in the aligned_pointer_ slot of
+ * the structure.
+ */
+struct AlignedPtr* AllocAlignedPointer(int alignment, int bytes);
+
+/*
+ * Free the memory allocated for the aligned pointer, including the
+ * object itself.
+ */
+void FreeAlignedPointer(struct AlignedPtr* pointer);
+
+#endif
diff --git a/dl/test/compare.c b/dl/test/compare.c
new file mode 100644
index 0000000..56a4baf
--- /dev/null
+++ b/dl/test/compare.c
@@ -0,0 +1,183 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ */
+
+#include <stdio.h>
+#include <math.h>
+#include "armSP.h"
+#include "compare.h"
+
+extern int verbose;
+
+// Convert to dB
+static double Db(double x) {
+ return (x <= 0) ? -1000.0 : 10 * log(x) / log(10);
+}
+
+static double CalculateSNR(double signal_power, double noise_power) {
+ return (noise_power == 0) ? 1000 : Db(signal_power / noise_power);
+}
+
+/*
+ * Compute the SNR of the actual signal, returning the SNR of the real
+ * and imaginary parts separately, and also the overall (complex SNR)
+ */
+
+void CompareComplex32(struct SnrResult* snr, OMX_SC32* actual,
+ OMX_SC32* expected, int size) {
+ double real_signal_power = 0;
+ double imag_signal_power = 0;
+ double complex_signal_power = 0;
+ double real_noise_power = 0;
+ double imag_noise_power = 0;
+ double complex_noise_power = 0;
+ int k;
+
+ for (k = 0; k < size; ++k) {
+ double x2;
+ double y2;
+ double z2;
+
+ if (verbose > 255) {
+ printf("%4d: (%10d, %10d) (%10d, %10d)\n", k,
+ actual[k].Re, actual[k].Im,
+ expected[k].Re, expected[k].Im);
+ }
+
+ x2 = pow((double) expected[k].Re, 2);
+ y2 = pow((double) expected[k].Im, 2);
+ real_signal_power += x2;
+ imag_signal_power += y2;
+ complex_signal_power += x2 + y2;
+
+ x2 = pow((double) actual[k].Re - expected[k].Re, 2);
+ y2 = pow((double) actual[k].Im - expected[k].Im, 2);
+
+ real_noise_power += x2;
+ imag_noise_power += y2;
+ complex_noise_power += x2 + y2;
+ }
+
+ snr->real_snr_ = CalculateSNR(real_signal_power, real_noise_power);
+ snr->imag_snr_ = CalculateSNR(imag_signal_power, imag_noise_power);
+ snr->complex_snr_ = CalculateSNR(complex_signal_power, complex_noise_power);
+}
+
+/*
+ * Compute the SNR of the actual real signal, returning the SNR.
+ */
+
+void CompareReal32(struct SnrResult* snr, OMX_S32* actual,
+ OMX_S32* expected, int size) {
+ double real_signal_power = 0;
+ double real_noise_power = 0;
+
+ int k;
+ for (k = 0; k < size; ++k) {
+ double x2;
+
+ x2 = pow((double) expected[k], 2);
+
+ real_signal_power += x2;
+
+ x2 = pow((double) actual[k] - expected[k], 2);
+
+ real_noise_power += x2;
+ }
+
+ snr->real_snr_ = CalculateSNR(real_signal_power, real_noise_power);
+ snr->imag_snr_ = -10000;
+ snr->complex_snr_ = -10000;
+}
+
+void CompareReal16(struct SnrResult* snr, OMX_S16* actual,
+ OMX_S16* expected, int size) {
+ double real_signal_power = 0;
+ double real_noise_power = 0;
+
+ int k;
+ for (k = 0; k < size; ++k) {
+ double x2;
+
+ x2 = pow((double) expected[k], 2);
+
+ real_signal_power += x2;
+
+ x2 = pow((double) actual[k] - expected[k], 2);
+
+ real_noise_power += x2;
+ }
+
+ snr->real_snr_ = CalculateSNR(real_signal_power, real_noise_power);
+ snr->imag_snr_ = -10000;
+ snr->complex_snr_ = -10000;
+}
+
+void CompareComplexFloat(struct SnrResult* snr, OMX_FC32* actual,
+ OMX_FC32* expected, int size) {
+ double real_signal_power = 0;
+ double imag_signal_power = 0;
+ double complex_signal_power = 0;
+ double real_noise_power = 0;
+ double imag_noise_power = 0;
+ double complex_noise_power = 0;
+ int k;
+
+ for (k = 0; k < size; ++k) {
+ double x2;
+ double y2;
+ double z2;
+
+ if (verbose > 255) {
+ printf("%4d: (%10g, %10g) (%10g, %10g)\n", k,
+ actual[k].Re, actual[k].Im,
+ expected[k].Re, expected[k].Im);
+ }
+
+ x2 = pow((double) expected[k].Re, 2);
+ y2 = pow((double) expected[k].Im, 2);
+ real_signal_power += x2;
+ imag_signal_power += y2;
+ complex_signal_power += x2 + y2;
+
+ x2 = pow((double) actual[k].Re - expected[k].Re, 2);
+ y2 = pow((double) actual[k].Im - expected[k].Im, 2);
+
+ real_noise_power += x2;
+ imag_noise_power += y2;
+ complex_noise_power += x2 + y2;
+ }
+
+ snr->real_snr_ = CalculateSNR(real_signal_power, real_noise_power);
+ snr->imag_snr_ = CalculateSNR(imag_signal_power, imag_noise_power);
+ snr->complex_snr_ = CalculateSNR(complex_signal_power, complex_noise_power);
+}
+
+void CompareFloat(struct SnrResult* snr, OMX_F32* actual,
+ OMX_F32* expected, int size) {
+ double signal_power = 0;
+ double noise_power = 0;
+
+ int k;
+ for (k = 0; k < size; ++k) {
+ double x2;
+
+ x2 = pow((double) expected[k], 2);
+
+ signal_power += x2;
+
+ x2 = pow((double) actual[k] - expected[k], 2);
+
+ noise_power += x2;
+ }
+
+ snr->real_snr_ = CalculateSNR(signal_power, noise_power);
+ snr->imag_snr_ = -10000;
+ snr->complex_snr_ = snr->real_snr_;
+}
diff --git a/dl/test/compare.h b/dl/test/compare.h
new file mode 100644
index 0000000..5b5d182
--- /dev/null
+++ b/dl/test/compare.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ */
+
+#ifndef WEBRTC_ARM_FFT_TEST_COMPARE_H_
+#define WEBRTC_ARM_FFT_TEST_COMPARE_H_
+
+struct SnrResult {
+ /* SNR (in dB) for real component (for complex signals) */
+ float real_snr_;
+
+ /* SNR (in dB) for imaginary component (for complex signals) */
+ float imag_snr_;
+
+ /* SNR (in dB) for real and complex component (for complex signals) */
+ float complex_snr_;
+};
+
+/*
+ * Compute the SNR between the |actual| and |expected| signals of
+ * length |size|. Three SNRs are computed. An SNR is computed for
+ * just the real component, just the imaginary component, and the
+ * complex component. The computed SNR is in dBs.
+ */
+void CompareComplex32(struct SnrResult* snr, OMX_SC32* actual,
+ OMX_SC32* expected, int size);
+void CompareReal32(struct SnrResult* snr, OMX_S32* actual,
+ OMX_S32* expected, int size);
+void CompareReal16(struct SnrResult* snr, OMX_S16* actual,
+ OMX_S16* expected, int size);
+void CompareComplexFloat(struct SnrResult* snr, OMX_FC32* actual,
+ OMX_FC32* expected, int size);
+void CompareFloat(struct SnrResult* snr, OMX_F32* actual,
+ OMX_F32* expected, int size);
+
+#endif
diff --git a/dl/test/gensig.c b/dl/test/gensig.c
new file mode 100644
index 0000000..7dbf0a7
--- /dev/null
+++ b/dl/test/gensig.c
@@ -0,0 +1,132 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ */
+
+#include "gensig.h"
+
+#include <stdio.h>
+#include <math.h>
+#include <stdlib.h>
+
+#define MAX_REAL_SIGNAL_TYPE 3
+#define MAX_SIGNAL_TYPE 4
+
+int MaxSignalType(int real_only) {
+ return real_only ? MAX_REAL_SIGNAL_TYPE : MAX_SIGNAL_TYPE;
+}
+
+/*
+ * Generate a test signal and compute the theoretical FFT.
+ *
+ * The test signal is specified by |signal_type|, and the test signal
+ * is saved in |x| with the corresponding FFT in |fft|. The size of
+ * the test signal is |size|. |signalValue| is desired the amplitude
+ * of the test signal.
+ *
+ * If |real_only| is true, then the test signal is assumed to be real
+ * instead of complex, which is the default. This is only applicable
+ * for a |signal_type| of 0 or 3; the other signals are already real-valued.
+ */
+void GenerateTestSignalAndFFT(struct ComplexFloat* x,
+ struct ComplexFloat* fft,
+ int size,
+ int signal_type,
+ float signal_value,
+ int real_only) {
+ int k;
+
+ switch (signal_type) {
+ case 0:
+ /*
+ * Signal is a constant signal_value + i*signal_value (or just
+ * signal_value if real_only is true.)
+ */
+ for (k = 0; k < size; ++k) {
+ x[k].Re = signal_value;
+ x[k].Im = real_only ? 0 : signal_value;
+ }
+
+ fft[0].Re = signal_value * size;
+ fft[0].Im = real_only ? 0 : signal_value * size;
+
+ for (k = 1; k < size; ++k) {
+ fft[k].Re = fft[k].Im = 0;
+ }
+ break;
+ case 1:
+ /*
+ * A real-valued ramp
+ */
+ {
+ double factor = signal_value / (float) size;
+ double omega = 2 * M_PI / size;
+
+ for (k = 0; k < size; ++k) {
+ x[k].Re = ((k + 1)*factor);
+ x[k].Im = 0;
+ }
+
+ fft[0].Re = factor * size * (size + 1) / 2;
+ fft[0].Im = 0;
+ for (k = 1; k < size; ++k) {
+ double phase;
+ phase = omega * k;
+ fft[k].Re = factor * -size / 2;
+ fft[k].Im = factor * size / 2 * (sin(phase) / (1 - cos(phase)));
+ }
+ }
+ break;
+ case 2:
+ /*
+ * Pure real-valued sine wave, one cycle.
+ */
+ {
+ double omega = 2 * M_PI / size;
+
+ for (k = 0; k < size; ++k) {
+ x[k].Re = signal_value * sin(omega * k);
+ x[k].Im = 0;
+ }
+
+ for (k = 0; k < size; ++k) {
+ fft[k].Re = 0;
+ fft[k].Im = 0;
+ }
+ fft[1].Im = -signal_value * (size / 2);
+ fft[size - 1].Im = signal_value * (size / 2);
+ }
+ break;
+ case 3:
+ /*
+ * The source signal is x[k] = 0 except x[1] = x[size-1] =
+ * -i*signal_value. The transform is one period of a pure real
+ * (negative) sine wave. Only defined when real_only is false.
+ */
+ if (!real_only) {
+ double omega = 2 * M_PI / size;
+ for (k = 0; k < size; ++k) {
+ x[k].Re = 0;
+ x[k].Im = 0;
+ }
+ x[1].Im = -signal_value;
+ x[size-1].Im = signal_value;
+
+ for (k = 0; k < size; ++k) {
+ fft[k].Re = -2 * signal_value * sin(omega * k);
+ fft[k].Im = 0;
+ }
+ break;
+ }
+ /* Fall through if real_only */
+ case MAX_SIGNAL_TYPE:
+ default:
+ fprintf(stderr, "invalid signal type: %d\n", signal_type);
+ exit(1);
+ }
+}
diff --git a/dl/test/gensig.h b/dl/test/gensig.h
new file mode 100644
index 0000000..f650f41
--- /dev/null
+++ b/dl/test/gensig.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ */
+
+#ifndef WEBRTC_ARM_FFT_TEST_GENSIG_H_
+#define WEBRTC_ARM_FFT_TEST_GENSIG_H_
+
+struct ComplexFloat {
+ float Re;
+ float Im;
+};
+
+/*
+ * Returns the max allowed signal type, depending on whether the test
+ * signal is real or not
+ */
+int MaxSignalType(int real_only);
+
+/*
+ * Generate a test signal and corresponding FFT.
+ */
+void GenerateTestSignalAndFFT(struct ComplexFloat* x,
+ struct ComplexFloat* fft,
+ int size,
+ int signal_type,
+ float signal_value,
+ int real_only);
+
+#endif
diff --git a/dl/test/test_fft.gyp b/dl/test/test_fft.gyp
new file mode 100644
index 0000000..cb7cd47
--- /dev/null
+++ b/dl/test/test_fft.gyp
@@ -0,0 +1,152 @@
+# Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+#
+# Use of this source code is governed by a BSD-style license
+# that can be found in the LICENSE file in the root of the source
+# tree. An additional intellectual property rights grant can be found
+# in the file PATENTS. All contributing project authors may
+# be found in the AUTHORS file in the root of the source tree.
+
+{
+ 'variables' : {
+ # Override this value to build with small float FFT tables
+ 'big_float_fft%' : 1,
+ },
+ 'targets': [
+ {
+ # Test utilities
+ 'target_name': 'test_utilities',
+ 'type' : '<(component)',
+ 'include_dirs': [
+ '..',
+ ],
+ 'dependencies' : [
+ '../arm_fft.gyp:arm_fft',
+ ],
+ 'sources' : [
+ 'aligned_ptr.c',
+ 'compare.c',
+ 'gensig.c',
+ 'test_util.c',
+ ],
+ },
+ {
+ # Test complex fixed-point 32-bit FFT
+ 'target_name': 'test_fft32',
+ 'type': 'executable',
+ 'include_dirs': [
+ '..',
+ ],
+ 'dependencies' : [
+ '../arm_fft.gyp:arm_fft',
+ 'test_utilities'
+ ],
+ 'sources': [
+ 'test_fft32.c',
+ ],
+ },
+ {
+ # Test real 32-bit fixed-point FFT
+ 'target_name': 'test_rfft32',
+ 'type': 'executable',
+ 'include_dirs': [
+ '..',
+ ],
+ 'dependencies' : [
+ 'test_utilities'
+ ],
+ 'sources': [
+ 'test_rfft32.c',
+ ],
+ },
+ {
+ # Test real 16-bit fixed-point FFT
+ 'target_name': 'test_rfft16',
+ 'type': 'executable',
+ 'include_dirs': [
+ '..',
+ ],
+ 'dependencies' : [
+ 'test_utilities'
+ ],
+ 'sources': [
+ 'test_rfft16.c',
+ ],
+ },
+ {
+ # Test complex floating-point FFT
+ 'target_name': 'test_float_fft',
+ 'type': 'executable',
+ 'include_dirs': [
+ '..',
+ ],
+ 'dependencies' : [
+ 'test_utilities'
+ ],
+ 'sources': [
+ 'test_float_fft.c',
+ ],
+ 'conditions': [
+ ['big_float_fft == 1', {
+ 'defines': [
+ 'BIG_FFT_TABLE',
+ ],
+ }],
+ ],
+ },
+ {
+ # Test real floating-point FFT
+ 'target_name': 'test_float_rfft',
+ 'type': 'executable',
+ 'include_dirs': [
+ '..',
+ ],
+ 'dependencies' : [
+ 'test_utilities'
+ ],
+ 'sources': [
+ 'test_float_rfft.c',
+ ],
+ 'conditions': [
+ ['big_float_fft == 1', {
+ 'defines': [
+ 'BIG_FFT_TABLE',
+ ],
+ }],
+ ],
+ },
+ {
+ # Simple timing test of FFTs
+ 'target_name': 'test_fft_time',
+ 'type': 'executable',
+ 'include_dirs': [
+ '..',
+ ],
+ 'dependencies' : [
+ 'test_utilities'
+ ],
+ 'sources': [
+ 'test_fft_time.c',
+ ],
+ 'conditions': [
+ ['big_float_fft == 1', {
+ 'defines': [
+ 'BIG_FFT_TABLE',
+ ],
+ }],
+ ],
+ },
+ {
+ # Build all test programs.
+ 'target_name': 'All',
+ 'type': 'none',
+ 'dependencies': [
+ 'test_fft32',
+ 'test_float_fft',
+ 'test_float_rfft',
+ 'test_rfft16',
+ 'test_rfft32',
+ 'test_fft_time',
+ ],
+ },
+ ],
+}
diff --git a/dl/test/test_fft32.c b/dl/test/test_fft32.c
new file mode 100644
index 0000000..2963deb
--- /dev/null
+++ b/dl/test/test_fft32.c
@@ -0,0 +1,266 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <time.h>
+#include <math.h>
+#include <unistd.h>
+
+#include "aligned_ptr.h"
+#include "armSP.h"
+#include "compare.h"
+#include "gensig.h"
+#include "omxSP.h"
+#include "test_util.h"
+
+#define MAX_FFT_ORDER 12
+
+int verbose;
+int signal_value;
+
+void TestFFT(int fft_log_size, int sigtype, int scale_factor);
+
+void main(int argc, char* argv[]) {
+ struct Options options;
+
+ SetDefaultOptions(&options, 0, MAX_FFT_ORDER);
+
+ ProcessCommandLine(&options, argc, argv,
+ "Test forward and inverse 32-bit fixed-point FFT\n");
+
+ verbose = options.verbose_;
+ signal_value = options.signal_value_;
+
+ if (verbose > 255)
+ DumpOptions(stderr, &options);
+
+ if (options.test_mode_) {
+ struct TestInfo info;
+
+ info.real_only_ = options.real_only_;
+ info.max_fft_order_ = options.max_fft_order_;
+ info.min_fft_order_ = options.min_fft_order_;
+ info.do_forward_tests_ = options.do_forward_tests_;
+ info.do_inverse_tests_ = options.do_inverse_tests_;
+ info.known_failures_ = 0;
+ /*
+ * These threshold values assume that we're using the default
+ * signal_value set below.
+ */
+ info.forward_threshold_ = 107.33;
+ info.inverse_threshold_ = 79.02;
+
+ if (!options.signal_value_given_) {
+ signal_value = 262144; /* 18 bits */
+ }
+ RunAllTests(&info);
+ } else {
+ TestFFT(options.fft_log_size_,
+ options.signal_type_,
+ options.scale_factor_);
+ }
+}
+
+void GenerateSignal(OMX_SC32* x, OMX_SC32* fft, int size, int signal_type) {
+ int k;
+ struct ComplexFloat *test_signal;
+ struct ComplexFloat *true_fft;
+
+ test_signal = (struct ComplexFloat*) malloc(sizeof(*test_signal) * size);
+ true_fft = (struct ComplexFloat*) malloc(sizeof(*true_fft) * size);
+ GenerateTestSignalAndFFT(test_signal, true_fft, size, signal_type,
+ signal_value, 0);
+
+ /*
+ * Convert the complex float result to SC32 format. Just round.
+ * No error-checking here!
+ */
+
+ for (k = 0; k < size; ++k) {
+ x[k].Re = 0.5 + test_signal[k].Re;
+ x[k].Im = 0.5 + test_signal[k].Im;
+ fft[k].Re = 0.5 + true_fft[k].Re;
+ fft[k].Im = 0.5 + true_fft[k].Im;
+ }
+
+ free(test_signal);
+ free(true_fft);
+}
+
+void DumpFFTSpec(OMXFFTSpec_C_SC32* pSpec) {
+ ARMsFFTSpec_SC32* p = (ARMsFFTSpec_SC32*) pSpec;
+ printf(" N = %d\n", p->N);
+ printf(" pBitRev = %p\n", p->pBitRev);
+ printf(" pTwiddle = %p\n", p->pTwiddle);
+ printf(" pBuf = %p\n", p->pBuf);
+}
+
+/*
+ * Compute forward and inverse FFT for one test case and compare the
+ * result with the expected result.
+ */
+void TestFFT(int fft_log_size, int signal_type, int scale_factor) {
+ struct SnrResult snr;
+
+ RunOneForwardTest(fft_log_size, signal_type, signal_value, &snr);
+ printf("Forward float FFT\n");
+ printf("SNR: real part %f dB\n", snr.real_snr_);
+ printf(" imag part %f dB\n", snr.imag_snr_);
+ printf(" complex part %f dB\n", snr.complex_snr_);
+
+ RunOneInverseTest(fft_log_size, signal_type, signal_value, &snr);
+ printf("Inverse float FFT\n");
+ printf("SNR: real part %f dB\n", snr.real_snr_);
+ printf(" imag part %f dB\n", snr.imag_snr_);
+ printf(" complex part %f dB\n", snr.complex_snr_);
+}
+
+/*
+ * Like TestFFT, but do just the forward FFT.
+ */
+float RunOneForwardTest(int fft_log_size, int signal_type, float signal_value,
+ struct SnrResult* snr) {
+ OMX_SC32* x;
+ OMX_SC32* y;
+
+ struct AlignedPtr* x_aligned;
+ struct AlignedPtr* y_aligned;
+
+ OMX_SC32* y_true;
+
+ OMX_INT n, fft_spec_buffer_size;
+ OMXResult status;
+ OMXFFTSpec_C_SC32 * fft_fwd_spec = NULL;
+ int fft_size;
+
+ fft_size = 1 << fft_log_size;
+
+ status = omxSP_FFTGetBufSize_C_SC32(fft_log_size, &fft_spec_buffer_size);
+ if (verbose > 63) {
+ printf("fft_spec_buffer_size = %d\n", fft_spec_buffer_size);
+ }
+
+ fft_fwd_spec = (OMXFFTSpec_C_SC32*) malloc(fft_spec_buffer_size);
+ status = omxSP_FFTInit_C_SC32(fft_fwd_spec, fft_log_size);
+ if (status) {
+ fprintf(stderr, "Failed to init forward FFT: status = %d\n", status);
+ exit(1);
+ }
+
+ x_aligned = AllocAlignedPointer(32, sizeof(*x) * fft_size);
+ y_aligned = AllocAlignedPointer(32, sizeof(*y) * (fft_size + 2));
+ y_true = (OMX_SC32*) malloc(sizeof(*y_true) * fft_size);
+
+ x = x_aligned->aligned_pointer_;
+ y = y_aligned->aligned_pointer_;
+
+ GenerateSignal(x, y_true, fft_size, signal_type);
+
+ if (verbose > 63) {
+ printf("Signal\n");
+ DumpArrayComplex32("x", fft_size, x);
+
+ printf("Expected FFT output\n");
+ DumpArrayComplex32("y", fft_size, y_true);
+ }
+
+ status = omxSP_FFTFwd_CToC_SC32_Sfs(x, y, fft_fwd_spec, 0);
+ if (status) {
+ fprintf(stderr, "Forward FFT failed: status = %d\n", status);
+ exit(1);
+ }
+
+ if (verbose > 63) {
+ printf("FFT Output\n");
+ DumpArrayComplex32("y", fft_size, y);
+ }
+
+ CompareComplex32(snr, y, y_true, fft_size);
+
+ FreeAlignedPointer(x_aligned);
+ FreeAlignedPointer(y_aligned);
+ free(fft_fwd_spec);
+
+ return snr->complex_snr_;
+}
+
+/*
+ * Like TestFFT, but do just the inverse FFT
+ */
+float RunOneInverseTest(int fft_log_size, int signal_type, float signal_value,
+ struct SnrResult* snr) {
+ OMX_SC32* x;
+ OMX_SC32* y;
+ OMX_SC32* z;
+
+ struct AlignedPtr* x_aligned;
+ struct AlignedPtr* y_aligned;
+ struct AlignedPtr* z_aligned;
+
+ OMX_INT n, fft_spec_buffer_size;
+ OMXResult status;
+ OMXFFTSpec_C_SC32 * fft_fwd_spec = NULL;
+ OMXFFTSpec_C_SC32 * fft_inv_spec = NULL;
+ int fft_size;
+
+ fft_size = 1 << fft_log_size;
+
+ status = omxSP_FFTGetBufSize_C_SC32(fft_log_size, &fft_spec_buffer_size);
+ if (verbose > 3) {
+ printf("fft_spec_buffer_size = %d\n", fft_spec_buffer_size);
+ }
+
+ fft_inv_spec = (OMXFFTSpec_C_SC32*)malloc(fft_spec_buffer_size);
+ status = omxSP_FFTInit_C_SC32(fft_inv_spec, fft_log_size);
+ if (status) {
+ fprintf(stderr, "Failed to init backward FFT: status = %d\n", status);
+ exit(1);
+ }
+
+ x_aligned = AllocAlignedPointer(32, sizeof(*x) * fft_size);
+ y_aligned = AllocAlignedPointer(32, sizeof(*y) * (fft_size + 2));
+ z_aligned = AllocAlignedPointer(32, sizeof(*z) * fft_size);
+
+ x = x_aligned->aligned_pointer_;
+ y = y_aligned->aligned_pointer_;
+ z = z_aligned->aligned_pointer_;
+
+ GenerateSignal(x, y, fft_size, signal_type);
+
+ if (verbose > 63) {
+ printf("Inverse FFT Input Signal\n");
+ printf("n\tx[n]\n");
+ DumpArrayComplex32("x", fft_size, y);
+
+ printf("Expected Inverse FFT output\n");
+ DumpArrayComplex32("y", fft_size, x);
+ }
+
+ status = omxSP_FFTInv_CToC_SC32_Sfs(y, z, fft_inv_spec, 0);
+ if (status) {
+ fprintf(stderr, "Inverse FFT failed: status = %d\n", status);
+ exit(1);
+ }
+
+ if (verbose > 63) {
+ printf("Actual Inverse FFT Output\n");
+ DumpArrayComplex32("y", fft_size, z);
+ }
+
+ CompareComplex32(snr, z, x, fft_size);
+
+ FreeAlignedPointer(x_aligned);
+ FreeAlignedPointer(y_aligned);
+ FreeAlignedPointer(z_aligned);
+ free(fft_inv_spec);
+
+ return snr->complex_snr_;
+}
diff --git a/dl/test/test_fft_time.c b/dl/test/test_fft_time.c
new file mode 100644
index 0000000..33ede2a
--- /dev/null
+++ b/dl/test/test_fft_time.c
@@ -0,0 +1,1076 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ */
+
+#include <math.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <sys/resource.h>
+#include <sys/time.h>
+#include <unistd.h>
+
+#include "aligned_ptr.h"
+#include "armCOMM.h"
+#include "armSP.h"
+#include "gensig.h"
+#include "omxSP.h"
+
+#define MAX_FFT_ORDER TWIDDLE_TABLE_ORDER
+#define MAX_FFT_ORDER_FIXED_POINT 12
+
+void TimeOneFloatFFT(int count, int fft_log_size, float signal_value,
+ int signal_type);
+void TimeFloatFFT(int count, float signal_value, int signal_type);
+void TimeOneFloatRFFT(int count, int fft_log_size, float signal_value,
+ int signal_type);
+void TimeFloatRFFT(int count, float signal_value, int signal_type);
+void TimeOneSC32FFT(int count, int fft_log_size, float signal_value,
+ int signal_type);
+void TimeSC32FFT(int count, float signal_value, int signal_type);
+void TimeOneRFFT16(int count, int fft_log_size, float signal_value,
+ int signal_type);
+void TimeRFFT16(int count, float signal_value, int signal_type);
+void TimeOneRFFT32(int count, int fft_log_size, float signal_value,
+ int signal_type);
+void TimeRFFT32(int count, float signal_value, int signal_type);
+
+static int verbose = 1;
+static int include_conversion = 0;
+static int adapt_count = 1;
+static int do_forward_test = 1;
+static int do_inverse_test = 1;
+static int min_fft_order = 2;
+static int max_fft_order = MAX_FFT_ORDER;
+
+void TimeFFTUsage(const char* prog) {
+ fprintf(stderr,
+ "%s: [-hTFICA] [-f fft] [-c count] [-n logsize] [-s scale]\n"
+ " [-g signal-type] [-S signal value]\n"
+ " [-m minFFTsize] [-M maxFFTsize]\n",
+ ProgramName(prog));
+ fprintf(stderr,
+ "Simple FFT timing tests\n"
+ " -h This help\n"
+ " -v level Verbose output level (default = 1)\n"
+ " -F Skip forward FFT tests\n"
+ " -I Skip inverse FFT tests\n"
+ " -C Include float-to-fixed and fixed-to-float cost for"
+ " real\n"
+ " 16-bit FFT (forward and inverse)\n"
+ " -c count Number of FFTs to compute for timing. This is a"
+ " lower\n"
+ " lower limit; shorter FFTs will do more FFTs such"
+ " that the\n"
+ " elapsed time is very roughly constant, if -A is"
+ " not given.\n"
+ " -A Don't adapt the count given by -c; use specified"
+ " value\n"
+ " -m min Mininum FFT order to test\n"
+ " -M max Maximum FFT order to test\n"
+ " -T Run just one FFT timing test\n"
+ " -f FFT type:\n"
+ " 0 - Complex Float\n"
+ " 1 - Real Float\n"
+ " 2 - Complex 32-bit\n"
+ " 3 - Real 16-bit\n"
+ " 4 - Real 32-bit\n"
+ " -n logsize Log2 of FFT size\n"
+ " -s scale Scale factor for forward FFT (default = 0)\n"
+ " -S signal Base value for the test signal (default = 1024)\n"
+ " -g type Input signal type:\n"
+ " 0 - Constant signal S + i*S. (Default value.)\n"
+ " 1 - Real ramp starting at S/N, N = FFT size\n"
+ " 2 - Sine wave of amplitude S\n"
+ " 3 - Complex signal whose transform is a sine wave.\n"
+ "\n"
+ "Use -v 0 in combination with -F or -I to get output that can\n"
+ "be pasted into a spreadsheet.\n"
+ "\n"
+ "Most of the options listed after -T above are only applicable\n"
+ "when -T is given to test just one FFT size and FFT type.\n"
+ "\n");
+ exit(0);
+}
+
+void main(int argc, char* argv[]) {
+ int fft_log_size = 4;
+ float signal_value = 1024;
+ int signal_type = 0;
+ int test_mode = 1;
+ int count = 100;
+ int fft_type = 0;
+ int fft_type_given = 0;
+
+ int opt;
+
+ while ((opt = getopt(argc, argv, "hTFICAc:n:s:S:g:v:f:m:M:")) != -1) {
+ switch (opt) {
+ case 'h':
+ TimeFFTUsage(argv[0]);
+ break;
+ case 'T':
+ test_mode = 0;
+ break;
+ case 'C':
+ include_conversion = 1;
+ break;
+ case 'F':
+ do_forward_test = 0;
+ break;
+ case 'I':
+ do_inverse_test = 0;
+ break;
+ case 'A':
+ adapt_count = 0;
+ break;
+ case 'c':
+ count = atoi(optarg);
+ break;
+ case 'n':
+ fft_log_size = atoi(optarg);
+ break;
+ case 'S':
+ signal_value = atof(optarg);
+ break;
+ case 'g':
+ signal_type = atoi(optarg);
+ break;
+ case 'v':
+ verbose = atoi(optarg);
+ break;
+ case 'f':
+ fft_type = atoi(optarg);
+ fft_type_given = 1;
+ break;
+ case 'm':
+ min_fft_order = atoi(optarg);
+ if (min_fft_order <= 2) {
+ fprintf(stderr, "Setting min FFT order to 2 (from %d)\n",
+ min_fft_order);
+ min_fft_order = 2;
+ }
+ break;
+ case 'M':
+ max_fft_order = atoi(optarg);
+ if (max_fft_order > MAX_FFT_ORDER) {
+ fprintf(stderr, "Setting max FFT order to %d (from %d)\n",
+ MAX_FFT_ORDER, max_fft_order);
+ max_fft_order = MAX_FFT_ORDER;
+ }
+ break;
+ default:
+ TimeFFTUsage(argv[0]);
+ break;
+ }
+ }
+
+ if (test_mode && fft_type_given)
+ printf("Warning: -f ignored when -T not specified\n");
+
+ if (test_mode) {
+ TimeFloatFFT(count, signal_value, signal_type);
+ TimeFloatRFFT(count, signal_value, signal_type);
+ TimeSC32FFT(count, signal_value, signal_type);
+ TimeRFFT16(count, signal_value, signal_type);
+ TimeRFFT32(count, signal_value, signal_type);
+ } else {
+ switch (fft_type) {
+ case 0:
+ TimeOneFloatFFT(count, fft_log_size, signal_value, signal_type);
+ break;
+ case 1:
+ TimeOneFloatRFFT(count, fft_log_size, signal_value, signal_type);
+ break;
+ case 2:
+ TimeOneSC32FFT(count, fft_log_size, signal_value, signal_type);
+ break;
+ case 3:
+ TimeOneRFFT16(count, fft_log_size, signal_value, signal_type);
+ break;
+ case 4:
+ TimeOneRFFT32(count, fft_log_size, signal_value, signal_type);
+ break;
+ default:
+ fprintf(stderr, "Unknown FFT type: %d\n", fft_type);
+ break;
+ }
+ }
+}
+
+void GetUserTime(struct timeval* time) {
+ struct rusage usage;
+ getrusage(RUSAGE_SELF, &usage);
+ memcpy(time, &usage.ru_utime, sizeof(*time));
+}
+
+double TimeDifference(const struct timeval * start,
+ const struct timeval * end) {
+ double start_time;
+ double end_time;
+ start_time = start->tv_sec + start->tv_usec * 1e-6;
+ end_time = end->tv_sec + end->tv_usec * 1e-6;
+
+ return end_time - start_time;
+}
+
+void PrintResult(const char* prefix, int fft_log_size, double elapsed_time,
+ int count) {
+ if (verbose == 0) {
+ printf("%2d\t%8.4f\t%8d\t%.4e\n",
+ fft_log_size, elapsed_time, count, 1000 * elapsed_time / count);
+ } else {
+ printf("%-18s: order %2d: %8.4f sec for %8d FFTs: %.4e msec/FFT\n",
+ prefix, fft_log_size, elapsed_time, count,
+ 1000 * elapsed_time / count);
+ }
+}
+
+int ComputeCount(int nominal_count, int fft_log_size) {
+ /*
+ * Try to figure out how many repetitions to do for a given FFT
+ * order (fft_log_size) given that we want a repetition of
+ * nominal_count for order 15 FFTs to be the approsimate amount of
+ * time we want to for all tests.
+ */
+
+ int count;
+ if (adapt_count) {
+ double maxTime = ((double) nominal_count) * (1 << MAX_FFT_ORDER)
+ * MAX_FFT_ORDER;
+ double c = maxTime / ((1 << fft_log_size) * fft_log_size);
+ const int max_count = 10000000;
+
+ count = (c > max_count) ? max_count : c;
+ } else {
+ count = nominal_count;
+ }
+
+ return count;
+}
+
+void TimeOneFloatFFT(int count, int fft_log_size, float signal_value,
+ int signal_type) {
+ struct AlignedPtr* x_aligned;
+ struct AlignedPtr* y_aligned;
+ struct AlignedPtr* z_aligned;
+
+ struct ComplexFloat* x;
+ struct ComplexFloat* y;
+ OMX_FC32* z;
+
+ struct ComplexFloat* y_true;
+
+ OMX_INT n, fft_spec_buffer_size;
+ OMXFFTSpec_C_FC32 * fft_fwd_spec = NULL;
+ OMXFFTSpec_C_FC32 * fft_inv_spec = NULL;
+ int fft_size;
+ struct timeval start_time;
+ struct timeval end_time;
+ double elapsed_time;
+
+ fft_size = 1 << fft_log_size;
+
+ x_aligned = AllocAlignedPointer(32, sizeof(*x) * fft_size);
+ y_aligned = AllocAlignedPointer(32, sizeof(*y) * (fft_size + 2));
+ z_aligned = AllocAlignedPointer(32, sizeof(*z) * fft_size);
+
+ y_true = (struct ComplexFloat*) malloc(sizeof(*y_true) * fft_size);
+
+ x = x_aligned->aligned_pointer_;
+ y = y_aligned->aligned_pointer_;
+ z = z_aligned->aligned_pointer_;
+
+ GenerateTestSignalAndFFT(x, y_true, fft_size, signal_type, signal_value, 0);
+
+ omxSP_FFTGetBufSize_C_FC32(fft_log_size, &fft_spec_buffer_size);
+
+ fft_fwd_spec = (OMXFFTSpec_C_FC32*) malloc(fft_spec_buffer_size);
+ fft_inv_spec = (OMXFFTSpec_C_FC32*) malloc(fft_spec_buffer_size);
+ omxSP_FFTInit_C_FC32(fft_fwd_spec, fft_log_size);
+ omxSP_FFTInit_C_FC32(fft_inv_spec, fft_log_size);
+
+ if (do_forward_test) {
+ GetUserTime(&start_time);
+ for (n = 0; n < count; ++n) {
+ omxSP_FFTFwd_CToC_FC32_Sfs(x, y, fft_fwd_spec);
+ }
+ GetUserTime(&end_time);
+
+ elapsed_time = TimeDifference(&start_time, &end_time);
+
+ PrintResult("Forward Float FFT", fft_log_size, elapsed_time, count);
+ }
+
+ if (do_inverse_test) {
+ GetUserTime(&start_time);
+ for (n = 0; n < count; ++n) {
+ omxSP_FFTInv_CToC_FC32_Sfs(y, z, fft_inv_spec);
+ }
+ GetUserTime(&end_time);
+
+ elapsed_time = TimeDifference(&start_time, &end_time);
+
+ PrintResult("Inverse Float FFT", fft_log_size, elapsed_time, count);
+ }
+
+ FreeAlignedPointer(x_aligned);
+ FreeAlignedPointer(y_aligned);
+ FreeAlignedPointer(z_aligned);
+ free(y_true);
+ free(fft_fwd_spec);
+ free(fft_inv_spec);
+}
+
+void TimeFloatFFT(int count, float signal_value, int signal_type) {
+ int k;
+
+ if (verbose == 0)
+ printf("Float FFT\n");
+
+ for (k = min_fft_order; k <= max_fft_order; ++k) {
+ int testCount = ComputeCount(count, k);
+ TimeOneFloatFFT(testCount, k, signal_value, signal_type);
+ }
+}
+
+void GenerateRealFloatSignal(OMX_F32* x, OMX_FC32* fft, int size,
+ int signal_type, float signal_value)
+{
+ int k;
+ struct ComplexFloat *test_signal;
+ struct ComplexFloat *true_fft;
+
+ test_signal = (struct ComplexFloat*) malloc(sizeof(*test_signal) * size);
+ true_fft = (struct ComplexFloat*) malloc(sizeof(*true_fft) * size);
+ GenerateTestSignalAndFFT(test_signal, true_fft, size, signal_type,
+ signal_value, 1);
+
+ /*
+ * Convert the complex result to what we want
+ */
+
+ for (k = 0; k < size; ++k) {
+ x[k] = test_signal[k].Re;
+ }
+
+ for (k = 0; k < size / 2 + 1; ++k) {
+ fft[k].Re = true_fft[k].Re;
+ fft[k].Im = true_fft[k].Im;
+ }
+
+ free(test_signal);
+ free(true_fft);
+}
+
+void TimeOneFloatRFFT(int count, int fft_log_size, float signal_value,
+ int signal_type) {
+ OMX_F32* x; /* Source */
+ OMX_F32* y; /* Transform */
+ OMX_F32* z; /* Inverse transform */
+
+ OMX_F32* y_true; /* True FFT */
+
+ struct AlignedPtr* x_aligned;
+ struct AlignedPtr* y_aligned;
+ struct AlignedPtr* z_aligned;
+
+
+ OMX_INT n, fft_spec_buffer_size;
+ OMXResult status;
+ OMXFFTSpec_R_F32 * fft_fwd_spec = NULL;
+ OMXFFTSpec_R_F32 * fft_inv_spec = NULL;
+ int fft_size;
+ struct timeval start_time;
+ struct timeval end_time;
+ double elapsed_time;
+
+ fft_size = 1 << fft_log_size;
+
+ x_aligned = AllocAlignedPointer(32, sizeof(*x) * fft_size);
+ /* The transformed value is in CCS format and is has fft_size + 2 values */
+ y_aligned = AllocAlignedPointer(32, sizeof(*y) * (fft_size + 2));
+ z_aligned = AllocAlignedPointer(32, sizeof(*z) * fft_size);
+
+ x = x_aligned->aligned_pointer_;
+ y = y_aligned->aligned_pointer_;
+ z = z_aligned->aligned_pointer_;
+
+ y_true = (OMX_F32*) malloc(sizeof(*y_true) * (fft_size + 2));
+
+ GenerateRealFloatSignal(x, (OMX_FC32*) y_true, fft_size, signal_type,
+ signal_value);
+
+ status = omxSP_FFTGetBufSize_R_F32(fft_log_size, &fft_spec_buffer_size);
+
+ fft_fwd_spec = (OMXFFTSpec_R_F32*) malloc(fft_spec_buffer_size);
+ fft_inv_spec = (OMXFFTSpec_R_F32*) malloc(fft_spec_buffer_size);
+ status = omxSP_FFTInit_R_F32(fft_fwd_spec, fft_log_size);
+
+ status = omxSP_FFTInit_R_F32(fft_inv_spec, fft_log_size);
+
+ if (do_forward_test) {
+ GetUserTime(&start_time);
+ for (n = 0; n < count; ++n) {
+ omxSP_FFTFwd_RToCCS_F32_Sfs(x, y, fft_fwd_spec);
+ }
+ GetUserTime(&end_time);
+
+ elapsed_time = TimeDifference(&start_time, &end_time);
+
+ PrintResult("Forward Float RFFT", fft_log_size, elapsed_time, count);
+ }
+
+ if (do_inverse_test) {
+ GetUserTime(&start_time);
+ for (n = 0; n < count; ++n) {
+ omxSP_FFTInv_CCSToR_F32_Sfs(y, z, fft_inv_spec);
+ }
+ GetUserTime(&end_time);
+
+ elapsed_time = TimeDifference(&start_time, &end_time);
+
+ PrintResult("Inverse Float RFFT", fft_log_size, elapsed_time, count);
+ }
+
+ FreeAlignedPointer(x_aligned);
+ FreeAlignedPointer(y_aligned);
+ FreeAlignedPointer(z_aligned);
+ free(fft_fwd_spec);
+ free(fft_inv_spec);
+}
+
+void TimeFloatRFFT(int count, float signal_value, int signal_type) {
+ int k;
+
+ if (verbose == 0)
+ printf("Float RFFT\n");
+
+ for (k = min_fft_order; k <= max_fft_order; ++k) {
+ int testCount = ComputeCount(count, k);
+ TimeOneFloatRFFT(testCount, k, signal_value, signal_type);
+ }
+}
+
+void generateSC32Signal(OMX_SC32* x, OMX_SC32* fft, int size, int signal_type,
+ float signal_value) {
+ int k;
+ struct ComplexFloat *test_signal;
+ struct ComplexFloat *true_fft;
+
+ test_signal = (struct ComplexFloat*) malloc(sizeof(*test_signal) * size);
+ true_fft = (struct ComplexFloat*) malloc(sizeof(*true_fft) * size);
+ GenerateTestSignalAndFFT(test_signal, true_fft, size, signal_type,
+ signal_value, 0);
+
+ /*
+ * Convert the complex result to what we want
+ */
+
+ for (k = 0; k < size; ++k) {
+ x[k].Re = 0.5 + test_signal[k].Re;
+ x[k].Im = 0.5 + test_signal[k].Im;
+ fft[k].Re = 0.5 + true_fft[k].Re;
+ fft[k].Im = 0.5 + true_fft[k].Im;
+ }
+
+ free(test_signal);
+ free(true_fft);
+}
+
+void TimeOneSC32FFT(int count, int fft_log_size, float signal_value,
+ int signal_type) {
+ OMX_SC32* x;
+ OMX_SC32* y;
+ OMX_SC32* z;
+
+ struct AlignedPtr* x_aligned;
+ struct AlignedPtr* y_aligned;
+ struct AlignedPtr* z_aligned;
+
+ OMX_SC32* y_true;
+ OMX_SC32* temp32a;
+ OMX_SC32* temp32b;
+
+ OMX_INT n, fft_spec_buffer_size;
+ OMXResult status;
+ OMXFFTSpec_C_SC32 * fft_fwd_spec = NULL;
+ OMXFFTSpec_C_SC32 * fft_inv_spec = NULL;
+ int fft_size;
+ struct timeval start_time;
+ struct timeval end_time;
+ double elapsed_time;
+
+ fft_size = 1 << fft_log_size;
+
+ x_aligned = AllocAlignedPointer(32, sizeof(*x) * fft_size);
+ y_aligned = AllocAlignedPointer(32, sizeof(*y) * fft_size);
+ z_aligned = AllocAlignedPointer(32, sizeof(*z) * fft_size);
+ y_true = (OMX_SC32*) malloc(sizeof(*y_true) * fft_size);
+ temp32a = (OMX_SC32*) malloc(sizeof(*temp32a) * fft_size);
+ temp32b = (OMX_SC32*) malloc(sizeof(*temp32b) * fft_size);
+
+ x = x_aligned->aligned_pointer_;
+ y = y_aligned->aligned_pointer_;
+ z = z_aligned->aligned_pointer_;
+
+ generateSC32Signal(x, y_true, fft_size, signal_type, signal_value);
+
+ status = omxSP_FFTGetBufSize_C_SC32(fft_log_size, &fft_spec_buffer_size);
+
+ fft_fwd_spec = (OMXFFTSpec_C_SC32*) malloc(fft_spec_buffer_size);
+ fft_inv_spec = (OMXFFTSpec_C_SC32*) malloc(fft_spec_buffer_size);
+ status = omxSP_FFTInit_C_SC32(fft_fwd_spec, fft_log_size);
+
+ status = omxSP_FFTInit_C_SC32(fft_inv_spec, fft_log_size);
+
+ if (do_forward_test) {
+ if (include_conversion) {
+ int k;
+ float factor = -1;
+
+ GetUserTime(&start_time);
+ for (k = 0; k < count; ++k) {
+ for (n = 0; n < fft_size; ++n) {
+ if (fabs(x[n].Re) > factor) {
+ factor = fabs(x[n].Re);
+ }
+ if (fabs(x[n].Im) > factor) {
+ factor = fabs(x[n].Im);
+ }
+ }
+
+ factor = ((1 << 18) - 1) / factor;
+ for (n = 0; n < fft_size; ++n) {
+ temp32a[n].Re = factor * x[n].Re;
+ temp32a[n].Im = factor * x[n].Im;
+ }
+
+ omxSP_FFTFwd_CToC_SC32_Sfs(x, y, fft_fwd_spec, 0);
+
+ factor = 1 / factor;
+ for (n = 0; n < fft_size; ++n) {
+ temp32b[n].Re = y[n].Re * factor;
+ temp32b[n].Im = y[n].Im * factor;
+ }
+ }
+ GetUserTime(&end_time);
+ } else {
+ GetUserTime(&start_time);
+ for (n = 0; n < count; ++n) {
+ omxSP_FFTFwd_CToC_SC32_Sfs(x, y, fft_fwd_spec, 0);
+ }
+ GetUserTime(&end_time);
+ }
+
+ elapsed_time = TimeDifference(&start_time, &end_time);
+
+ PrintResult("Forward SC32 FFT", fft_log_size, elapsed_time, count);
+ }
+
+ if (do_inverse_test) {
+ if (include_conversion) {
+ int k;
+ float factor = -1;
+
+ GetUserTime(&start_time);
+ for (k = 0; k < count; ++k) {
+ for (n = 0; n < fft_size; ++n) {
+ if (fabs(x[n].Re) > factor) {
+ factor = fabs(x[n].Re);
+ }
+ if (fabs(x[n].Im) > factor) {
+ factor = fabs(x[n].Im);
+ }
+ }
+ factor = ((1 << 18) - 1) / factor;
+ for (n = 0; n < fft_size; ++n) {
+ temp32a[n].Re = factor * x[n].Re;
+ temp32a[n].Im = factor * x[n].Im;
+ }
+
+ status = omxSP_FFTInv_CToC_SC32_Sfs(y, z, fft_inv_spec, 0);
+
+ factor = 1 / factor;
+ for (n = 0; n < fft_size; ++n) {
+ temp32b[n].Re = y[n].Re * factor;
+ temp32b[n].Im = y[n].Im * factor;
+ }
+ }
+ GetUserTime(&end_time);
+ } else {
+ GetUserTime(&start_time);
+ for (n = 0; n < count; ++n) {
+ status = omxSP_FFTInv_CToC_SC32_Sfs(y, z, fft_inv_spec, 0);
+ }
+ GetUserTime(&end_time);
+ }
+
+ elapsed_time = TimeDifference(&start_time, &end_time);
+
+ PrintResult("Inverse SC32 FFT", fft_log_size, elapsed_time, count);
+ }
+
+ FreeAlignedPointer(x_aligned);
+ FreeAlignedPointer(y_aligned);
+ FreeAlignedPointer(z_aligned);
+ free(temp32a);
+ free(temp32b);
+ free(fft_fwd_spec);
+ free(fft_inv_spec);
+}
+
+void TimeSC32FFT(int count, float signal_value, int signal_type) {
+ int k;
+ int max_order = (max_fft_order > MAX_FFT_ORDER_FIXED_POINT)
+ ? MAX_FFT_ORDER_FIXED_POINT : max_fft_order;
+
+ if (verbose == 0)
+ printf("SC32 FFT\n");
+
+ for (k = min_fft_order; k <= max_order; ++k) {
+ int testCount = ComputeCount(count, k);
+ TimeOneSC32FFT(testCount, k, signal_value, signal_type);
+ }
+}
+
+void GenerateRFFT16Signal(OMX_S16* x, OMX_SC32* fft, int size, int signal_type,
+ float signal_value) {
+ int k;
+ struct ComplexFloat *test_signal;
+ struct ComplexFloat *true_fft;
+
+ test_signal = (struct ComplexFloat*) malloc(sizeof(*test_signal) * size);
+ true_fft = (struct ComplexFloat*) malloc(sizeof(*true_fft) * size);
+ GenerateTestSignalAndFFT(test_signal, true_fft, size, signal_type,
+ signal_value, 1);
+
+ /*
+ * Convert the complex result to what we want
+ */
+
+ for (k = 0; k < size; ++k) {
+ x[k] = test_signal[k].Re;
+ }
+
+ for (k = 0; k < size / 2 + 1; ++k) {
+ fft[k].Re = true_fft[k].Re;
+ fft[k].Im = true_fft[k].Im;
+ }
+
+ free(test_signal);
+ free(true_fft);
+}
+
+void TimeOneRFFT16(int count, int fft_log_size, float signal_value,
+ int signal_type) {
+ OMX_S16* x;
+ OMX_S32* y;
+ OMX_S16* z;
+ OMX_S32* y_true;
+ OMX_F32* xr;
+ OMX_F32* yrTrue;
+
+ struct AlignedPtr* x_aligned;
+ struct AlignedPtr* y_aligned;
+ struct AlignedPtr* z_aligned;
+ struct AlignedPtr* y_trueAligned;
+ struct AlignedPtr* xr_aligned;
+ struct AlignedPtr* yr_true_aligned;
+
+
+ OMX_S16* temp16;
+ OMX_S32* temp32;
+
+
+ OMX_INT n, fft_spec_buffer_size;
+ OMXResult status;
+ OMXFFTSpec_R_S16S32 * fft_fwd_spec = NULL;
+ OMXFFTSpec_R_S16S32 * fft_inv_spec = NULL;
+ int fft_size;
+ struct timeval start_time;
+ struct timeval end_time;
+ double elapsed_time;
+ int scaleFactor;
+
+ fft_size = 1 << fft_log_size;
+ scaleFactor = fft_log_size;
+
+ x_aligned = AllocAlignedPointer(32, sizeof(*x) * fft_size);
+ y_aligned = AllocAlignedPointer(32, sizeof(*y) * (fft_size + 2));
+ z_aligned = AllocAlignedPointer(32, sizeof(*z) * fft_size);
+
+ y_trueAligned = AllocAlignedPointer(32, sizeof(*y_true) * (fft_size + 2));
+
+ xr_aligned = AllocAlignedPointer(32, sizeof(*xr) * fft_size);
+ yr_true_aligned = AllocAlignedPointer(32, sizeof(*yrTrue) * (fft_size + 2));
+
+ x = x_aligned->aligned_pointer_;
+ y = y_aligned->aligned_pointer_;
+ z = z_aligned->aligned_pointer_;
+ y_true = y_trueAligned->aligned_pointer_;
+ xr = xr_aligned->aligned_pointer_;
+ yrTrue = yr_true_aligned->aligned_pointer_;
+
+ temp16 = (OMX_S16*) malloc(sizeof(*temp16) * fft_size);
+ temp32 = (OMX_S32*) malloc(sizeof(*temp32) * fft_size);
+
+
+ GenerateRFFT16Signal(x, (OMX_SC32*) y_true, fft_size, signal_type,
+ signal_value);
+ /*
+ * Generate a real version so we can measure scaling costs
+ */
+ GenerateRealFloatSignal(xr, (OMX_FC32*) yrTrue, fft_size, signal_type,
+ signal_value);
+
+ status = omxSP_FFTGetBufSize_R_S16S32(fft_log_size, &fft_spec_buffer_size);
+
+ fft_fwd_spec = (OMXFFTSpec_R_S16S32*) malloc(fft_spec_buffer_size);
+ fft_inv_spec = (OMXFFTSpec_R_S16S32*) malloc(fft_spec_buffer_size);
+ status = omxSP_FFTInit_R_S16S32(fft_fwd_spec, fft_log_size);
+
+ status = omxSP_FFTInit_R_S16S32(fft_inv_spec, fft_log_size);
+
+ if (do_forward_test) {
+ if (include_conversion) {
+ int k;
+ float factor = -1;
+
+ GetUserTime(&start_time);
+ for (k = 0; k < count; ++k) {
+ /*
+ * Spend some time computing the max of the signal, and then scaling it.
+ */
+ for (n = 0; n < fft_size; ++n) {
+ if (fabs(xr[n]) > factor) {
+ factor = fabs(xr[n]);
+ }
+ }
+
+ factor = 32767 / factor;
+ for (n = 0; n < fft_size; ++n) {
+ temp16[n] = factor * xr[n];
+ }
+
+ status = omxSP_FFTFwd_RToCCS_S16S32_Sfs(x, y, fft_fwd_spec,
+ (OMX_INT) scaleFactor);
+
+ /*
+ * Now spend some time converting the fixed-point FFT back to float.
+ */
+ factor = 1 / factor;
+ for (n = 0; n < fft_size + 2; ++n) {
+ xr[n] = y[n] * factor;
+ }
+ }
+ GetUserTime(&end_time);
+ } else {
+ float factor = -1;
+
+ GetUserTime(&start_time);
+ for (n = 0; n < count; ++n) {
+ status = omxSP_FFTFwd_RToCCS_S16S32_Sfs(x, y, fft_fwd_spec,
+ (OMX_INT) scaleFactor);
+ }
+ GetUserTime(&end_time);
+ }
+
+ elapsed_time = TimeDifference(&start_time, &end_time);
+
+ PrintResult("Forward RFFT16", fft_log_size, elapsed_time, count);
+ }
+
+ if (do_inverse_test) {
+ if (include_conversion) {
+ int k;
+ float factor = -1;
+
+ GetUserTime(&start_time);
+ for (k = 0; k < count; ++k) {
+ /*
+ * Spend some time scaling the FFT signal to fixed point.
+ */
+ for (n = 0; n < fft_size; ++n) {
+ if (fabs(yrTrue[n]) > factor) {
+ factor = fabs(yrTrue[n]);
+ }
+ }
+ for (n = 0; n < fft_size; ++n) {
+ temp32[n] = factor * yrTrue[n];
+ }
+
+ status = omxSP_FFTFwd_RToCCS_S16S32_Sfs(x, y, fft_fwd_spec,
+ (OMX_INT) scaleFactor);
+
+ /*
+ * Spend some time converting the result back to float
+ */
+ factor = 1 / factor;
+ for (n = 0; n < fft_size; ++n) {
+ xr[n] = factor * z[n];
+ }
+ }
+ GetUserTime(&end_time);
+ } else {
+ GetUserTime(&start_time);
+ for (n = 0; n < count; ++n) {
+ status = omxSP_FFTInv_CCSToR_S32S16_Sfs(y, z, fft_inv_spec, 0);
+ }
+ GetUserTime(&end_time);
+ }
+
+ elapsed_time = TimeDifference(&start_time, &end_time);
+
+ PrintResult("Inverse RFFT16", fft_log_size, elapsed_time, count);
+ }
+
+ FreeAlignedPointer(x_aligned);
+ FreeAlignedPointer(y_aligned);
+ FreeAlignedPointer(z_aligned);
+ FreeAlignedPointer(y_trueAligned);
+ FreeAlignedPointer(xr_aligned);
+ FreeAlignedPointer(yr_true_aligned);
+ free(fft_fwd_spec);
+ free(fft_inv_spec);
+}
+
+void TimeRFFT16(int count, float signal_value, int signal_type) {
+ int k;
+ int max_order = (max_fft_order > MAX_FFT_ORDER_FIXED_POINT)
+ ? MAX_FFT_ORDER_FIXED_POINT : max_fft_order;
+
+ if (verbose == 0)
+ printf("RFFT16\n");
+
+ for (k = min_fft_order; k <= max_order; ++k) {
+ int testCount = ComputeCount(count, k);
+ TimeOneRFFT16(testCount, k, signal_value, signal_type);
+ }
+}
+
+void GenerateRFFT32Signal(OMX_S32* x, OMX_SC32* fft, int size, int signal_type,
+ float signal_value) {
+ int k;
+ struct ComplexFloat *test_signal;
+ struct ComplexFloat *true_fft;
+
+ test_signal = (struct ComplexFloat*) malloc(sizeof(*test_signal) * size);
+ true_fft = (struct ComplexFloat*) malloc(sizeof(*true_fft) * size);
+ GenerateTestSignalAndFFT(test_signal, true_fft, size, signal_type,
+ signal_value, 1);
+
+ /*
+ * Convert the complex result to what we want
+ */
+
+ for (k = 0; k < size; ++k) {
+ x[k] = test_signal[k].Re;
+ }
+
+ for (k = 0; k < size / 2 + 1; ++k) {
+ fft[k].Re = true_fft[k].Re;
+ fft[k].Im = true_fft[k].Im;
+ }
+
+ free(test_signal);
+ free(true_fft);
+}
+
+void TimeOneRFFT32(int count, int fft_log_size, float signal_value,
+ int signal_type) {
+ OMX_S32* x;
+ OMX_S32* y;
+ OMX_S32* z;
+ OMX_S32* y_true;
+ OMX_F32* xr;
+ OMX_F32* yrTrue;
+
+ struct AlignedPtr* x_aligned;
+ struct AlignedPtr* y_aligned;
+ struct AlignedPtr* z_aligned;
+ struct AlignedPtr* y_true_aligned;
+
+ OMX_S32* temp1;
+ OMX_S32* temp2;
+
+ OMX_INT n, fft_spec_buffer_size;
+ OMXResult status;
+ OMXFFTSpec_R_S16S32 * fft_fwd_spec = NULL;
+ OMXFFTSpec_R_S16S32 * fft_inv_spec = NULL;
+ int fft_size;
+ struct timeval start_time;
+ struct timeval end_time;
+ double elapsed_time;
+ int scaleFactor;
+
+ fft_size = 1 << fft_log_size;
+
+ x_aligned = AllocAlignedPointer(32, sizeof(*x) * fft_size);
+ y_aligned = AllocAlignedPointer(32, sizeof(*y) * (fft_size + 2));
+ z_aligned = AllocAlignedPointer(32, sizeof(*z) * fft_size);
+
+ y_true_aligned = AllocAlignedPointer(32, sizeof(*y_true) * (fft_size + 2));
+
+ x = x_aligned->aligned_pointer_;
+ y = y_aligned->aligned_pointer_;
+ z = z_aligned->aligned_pointer_;
+ y_true = y_true_aligned->aligned_pointer_;
+
+ if (verbose > 3) {
+ printf("x = %p\n", (void*)x);
+ printf("y = %p\n", (void*)y);
+ printf("z = %p\n", (void*)z);
+ }
+
+ xr = (OMX_F32*) malloc(sizeof(*x) * fft_size);
+ yrTrue = (OMX_F32*) malloc(sizeof(*y) * (fft_size + 2));
+ temp1 = (OMX_S32*) malloc(sizeof(*temp1) * fft_size);
+ temp2 = (OMX_S32*) malloc(sizeof(*temp2) * (fft_size + 2));
+
+ GenerateRFFT32Signal(x, (OMX_SC32*) y_true, fft_size, signal_type,
+ signal_value);
+
+ if (verbose > 63) {
+ printf("Signal\n");
+ printf("n\tx[n]\n");
+ for (n = 0; n < fft_size; ++n) {
+ printf("%4d\t%d\n", n, x[n]);
+ }
+ }
+
+ status = omxSP_FFTGetBufSize_R_S32(fft_log_size, &fft_spec_buffer_size);
+ if (verbose > 3) {
+ printf("fft_spec_buffer_size = %d\n", fft_spec_buffer_size);
+ }
+
+ fft_fwd_spec = (OMXFFTSpec_R_S32*) malloc(fft_spec_buffer_size);
+ fft_inv_spec = (OMXFFTSpec_R_S32*) malloc(fft_spec_buffer_size);
+ status = omxSP_FFTInit_R_S32(fft_fwd_spec, fft_log_size);
+ if (status) {
+ printf("Failed to init forward FFT: status = %d\n", status);
+ }
+
+ status = omxSP_FFTInit_R_S32(fft_inv_spec, fft_log_size);
+ if (status) {
+ printf("Failed to init backward FFT: status = %d\n", status);
+ }
+
+ if (do_forward_test) {
+ if (include_conversion) {
+ int k;
+ float factor = -1;
+
+ GetUserTime(&start_time);
+ for (k = 0; k < count; ++k) {
+ /*
+ * Spend some time computing the max of the signal, and then scaling it.
+ */
+ for (n = 0; n < fft_size; ++n) {
+ if (fabs(xr[n]) > factor) {
+ factor = fabs(xr[n]);
+ }
+ }
+
+ factor = (1 << 20) / factor;
+ for (n = 0; n < fft_size; ++n) {
+ temp1[n] = factor * xr[n];
+ }
+
+ status = omxSP_FFTFwd_RToCCS_S32_Sfs(x, y, fft_fwd_spec,
+ (OMX_INT) scaleFactor);
+
+ /*
+ * Now spend some time converting the fixed-point FFT back to float.
+ */
+ factor = 1 / factor;
+ for (n = 0; n < fft_size + 2; ++n) {
+ xr[n] = y[n] * factor;
+ }
+ }
+ GetUserTime(&end_time);
+ } else {
+ float factor = -1;
+
+ GetUserTime(&start_time);
+ for (n = 0; n < count; ++n) {
+ status = omxSP_FFTFwd_RToCCS_S32_Sfs(x, y, fft_fwd_spec,
+ (OMX_INT) scaleFactor);
+ }
+ GetUserTime(&end_time);
+ }
+
+ elapsed_time = TimeDifference(&start_time, &end_time);
+
+ PrintResult("Forward RFFT32", fft_log_size, elapsed_time, count);
+ }
+
+ if (do_inverse_test) {
+ if (include_conversion) {
+ int k;
+ float factor = -1;
+
+ GetUserTime(&start_time);
+ for (k = 0; k < count; ++k) {
+ /*
+ * Spend some time scaling the FFT signal to fixed point.
+ */
+ for (n = 0; n < fft_size + 2; ++n) {
+ if (fabs(yrTrue[n]) > factor) {
+ factor = fabs(yrTrue[n]);
+ }
+ }
+ for (n = 0; n < fft_size + 2; ++n) {
+ temp2[n] = factor * yrTrue[n];
+ }
+
+ status = omxSP_FFTInv_CCSToR_S32_Sfs(y, z, fft_inv_spec, 0);
+
+ /*
+ * Spend some time converting the result back to float
+ */
+ factor = 1 / factor;
+ for (n = 0; n < fft_size; ++n) {
+ xr[n] = factor * z[n];
+ }
+ }
+ GetUserTime(&end_time);
+ } else {
+ GetUserTime(&start_time);
+ for (n = 0; n < count; ++n) {
+ status = omxSP_FFTInv_CCSToR_S32_Sfs(y, z, fft_inv_spec, 0);
+ }
+ GetUserTime(&end_time);
+ }
+
+ elapsed_time = TimeDifference(&start_time, &end_time);
+
+ PrintResult("Inverse RFFT32", fft_log_size, elapsed_time, count);
+ }
+
+ FreeAlignedPointer(x_aligned);
+ FreeAlignedPointer(y_aligned);
+ FreeAlignedPointer(z_aligned);
+ FreeAlignedPointer(y_true_aligned);
+ free(fft_fwd_spec);
+ free(fft_inv_spec);
+}
+
+void TimeRFFT32(int count, float signal_value, int signal_type) {
+ int k;
+ int max_order = (max_fft_order > MAX_FFT_ORDER_FIXED_POINT)
+ ? MAX_FFT_ORDER_FIXED_POINT : max_fft_order;
+
+ if (verbose == 0)
+ printf("RFFT32\n");
+
+ for (k = min_fft_order; k <= max_order; ++k) {
+ int testCount = ComputeCount(count, k);
+ TimeOneRFFT32(testCount, k, signal_value, signal_type);
+ }
+}
diff --git a/dl/test/test_float_fft.c b/dl/test/test_float_fft.c
new file mode 100644
index 0000000..bee55d6
--- /dev/null
+++ b/dl/test/test_float_fft.c
@@ -0,0 +1,233 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ */
+
+#include <math.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <time.h>
+#include <unistd.h>
+
+#include "aligned_ptr.h"
+#include "armCOMM.h"
+#include "armSP.h"
+#include "compare.h"
+#include "gensig.h"
+#include "omxSP.h"
+#include "test_util.h"
+
+#define MAX_FFT_ORDER TWIDDLE_TABLE_ORDER
+
+int verbose;
+
+void TestFloatFFT(int fft_log_size, int sigtype, float signal_value);
+
+void main(int argc, char* argv[]) {
+ struct Options options;
+
+ SetDefaultOptions(&options, 0, MAX_FFT_ORDER);
+
+ ProcessCommandLine(&options, argc, argv,
+ "Test forward and inverse floating-point FFT\n");
+
+ verbose = options.verbose_;
+
+ if (verbose > 255)
+ DumpOptions(stderr, &options);
+
+ if (options.test_mode_) {
+ struct TestInfo info;
+
+ info.real_only_ = options.real_only_;
+ info.max_fft_order_ = options.max_fft_order_;
+ info.min_fft_order_ = options.min_fft_order_;
+ info.do_forward_tests_ = options.do_forward_tests_;
+ info.do_inverse_tests_ = options.do_inverse_tests_;
+ /* No known failures */
+ info.known_failures_ = 0;
+
+ info.forward_threshold_ = 138.81;
+ info.inverse_threshold_ = 138.81;
+ RunAllTests(&info);
+ } else {
+ TestFloatFFT(options.fft_log_size_,
+ options.signal_type_,
+ options.signal_value_);
+ }
+}
+
+void DumpFFTSpec(OMXFFTSpec_C_FC32* pSpec) {
+ ARMsFFTSpec_FC32* p = (ARMsFFTSpec_FC32*) pSpec;
+ printf(" N = %d\n", p->N);
+ printf(" pBitRev = %p\n", p->pBitRev);
+ printf(" pTwiddle = %p\n", p->pTwiddle);
+ printf(" pBuf = %p\n", p->pBuf);
+}
+
+void GenerateSignal(OMX_FC32* x, OMX_FC32* fft, int size, int signal_type,
+ float signal_value) {
+ GenerateTestSignalAndFFT((struct ComplexFloat *) x,
+ (struct ComplexFloat *) fft,
+ size,
+ signal_type,
+ signal_value,
+ 0);
+}
+
+void TestFloatFFT(int fft_log_size, int signal_type, float signal_value) {
+ struct SnrResult snr;
+
+ RunOneForwardTest(fft_log_size, signal_type, signal_value, &snr);
+ printf("Forward float FFT\n");
+ printf("SNR: real part %f dB\n", snr.real_snr_);
+ printf(" imag part %f dB\n", snr.imag_snr_);
+ printf(" complex part %f dB\n", snr.complex_snr_);
+
+ RunOneInverseTest(fft_log_size, signal_type, signal_value, &snr);
+ printf("Inverse float FFT\n");
+ printf("SNR: real part %f dB\n", snr.real_snr_);
+ printf(" imag part %f dB\n", snr.imag_snr_);
+ printf(" complex part %f dB\n", snr.complex_snr_);
+}
+
+float RunOneForwardTest(int fft_log_size, int signal_type, float signal_value,
+ struct SnrResult* snr) {
+ OMX_FC32* x;
+ OMX_FC32* y;
+ struct AlignedPtr* x_aligned;
+ struct AlignedPtr* y_aligned;
+
+ OMX_FC32* y_true;
+
+ OMX_INT n, fft_spec_buffer_size;
+ OMXResult status;
+ OMXFFTSpec_C_FC32 * fft_fwd_spec = NULL;
+ int fft_size;
+
+ fft_size = 1 << fft_log_size;
+
+ status = omxSP_FFTGetBufSize_C_FC32(fft_log_size, &fft_spec_buffer_size);
+ if (verbose > 63) {
+ printf("fft_spec_buffer_size = %d\n", fft_spec_buffer_size);
+ }
+
+ fft_fwd_spec = (OMXFFTSpec_C_FC32*) malloc(fft_spec_buffer_size);
+ status = omxSP_FFTInit_C_FC32(fft_fwd_spec, fft_log_size);
+ if (status) {
+ fprintf(stderr,
+ "Failed to init forward FFT: status = %d, order %d \n",
+ status, fft_log_size);
+ exit(1);
+ }
+
+ x_aligned = AllocAlignedPointer(32, sizeof(*x) * fft_size);
+ y_aligned = AllocAlignedPointer(32, sizeof(*y) * (fft_size + 2));
+ y_true = (OMX_FC32*) malloc(sizeof(*y_true) * fft_size);
+
+ x = x_aligned->aligned_pointer_;
+ y = y_aligned->aligned_pointer_;
+
+ GenerateSignal(x, y_true, fft_size, signal_type, signal_value);
+
+ if (verbose > 63) {
+ printf("Signal\n");
+ DumpArrayComplexFloat("x", fft_size, x);
+
+ printf("Expected FFT output\n");
+ DumpArrayComplexFloat("y", fft_size, y_true);
+ }
+
+ status = omxSP_FFTFwd_CToC_FC32_Sfs(x, y, fft_fwd_spec);
+ if (status) {
+ fprintf(stderr, "Forward FFT failed: status = %d\n", status);
+ exit(1);
+ }
+
+ if (verbose > 63) {
+ printf("FFT Output\n");
+ DumpArrayComplexFloat("y", fft_size, y);
+ }
+
+ CompareComplexFloat(snr, y, y_true, fft_size);
+
+ FreeAlignedPointer(x_aligned);
+ FreeAlignedPointer(y_aligned);
+ free(fft_fwd_spec);
+
+ return snr->complex_snr_;
+}
+
+float RunOneInverseTest(int fft_log_size, int signal_type, float signal_value,
+ struct SnrResult* snr) {
+ OMX_FC32* x;
+ OMX_FC32* y;
+ OMX_FC32* z;
+
+ struct AlignedPtr* x_aligned;
+ struct AlignedPtr* y_aligned;
+ struct AlignedPtr* z_aligned;
+
+ OMX_INT n, fft_spec_buffer_size;
+ OMXResult status;
+ OMXFFTSpec_C_FC32 * fft_fwd_spec = NULL;
+ OMXFFTSpec_C_FC32 * fft_inv_spec = NULL;
+ int fft_size;
+
+ fft_size = 1 << fft_log_size;
+
+ status = omxSP_FFTGetBufSize_C_FC32(fft_log_size, &fft_spec_buffer_size);
+ if (verbose > 3) {
+ printf("fft_spec_buffer_size = %d\n", fft_spec_buffer_size);
+ }
+
+ fft_inv_spec = (OMXFFTSpec_C_FC32*)malloc(fft_spec_buffer_size);
+ status = omxSP_FFTInit_C_FC32(fft_inv_spec, fft_log_size);
+ if (status) {
+ fprintf(stderr, "Failed to init backward FFT: status = %d, order %d\n",
+ status, fft_log_size);
+ exit(1);
+ }
+
+ x_aligned = AllocAlignedPointer(32, sizeof(*x) * fft_size);
+ y_aligned = AllocAlignedPointer(32, sizeof(*y) * (fft_size + 2));
+ z_aligned = AllocAlignedPointer(32, sizeof(*z) * fft_size);
+ x = x_aligned->aligned_pointer_;
+ y = y_aligned->aligned_pointer_;
+ z = z_aligned->aligned_pointer_;
+
+ GenerateSignal(x, y, fft_size, signal_type, signal_value);
+
+ if (verbose > 63) {
+ printf("Inverse FFT Input Signal\n");
+ DumpArrayComplexFloat("x", fft_size, y);
+
+ printf("Expected Inverse FFT output\n");
+ DumpArrayComplexFloat("x", fft_size, x);
+ }
+
+ status = omxSP_FFTInv_CToC_FC32_Sfs(y, z, fft_inv_spec);
+ if (status) {
+ fprintf(stderr, "Inverse FFT failed: status = %d\n", status);
+ exit(1);
+ }
+
+ if (verbose > 63) {
+ printf("Actual Inverse FFT Output\n");
+ DumpArrayComplexFloat("z", fft_size, z);
+ }
+
+ CompareComplexFloat(snr, z, x, fft_size);
+
+ FreeAlignedPointer(x_aligned);
+ FreeAlignedPointer(y_aligned);
+ FreeAlignedPointer(z_aligned);
+ free(fft_inv_spec);
+
+ return snr->complex_snr_;
+}
diff --git a/dl/test/test_float_rfft.c b/dl/test/test_float_rfft.c
new file mode 100644
index 0000000..8850ef4
--- /dev/null
+++ b/dl/test/test_float_rfft.c
@@ -0,0 +1,273 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ */
+
+#include <math.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <time.h>
+#include <unistd.h>
+
+#include "aligned_ptr.h"
+#include "armCOMM.h"
+#include "armSP.h"
+#include "compare.h"
+#include "gensig.h"
+#include "omxSP.h"
+#include "test_util.h"
+
+#define MAX_FFT_ORDER TWIDDLE_TABLE_ORDER
+
+/*
+ * Verbosity of output. Higher values means more verbose output for
+ * debugging.
+ */
+int verbose;
+
+void TestFloatFFT(int fft_log_size, int sigtype, float signal_value);
+
+void main(int argc, char* argv[]) {
+ struct Options options;
+
+ SetDefaultOptions(&options, 1, MAX_FFT_ORDER);
+
+ options.signal_value_ = 1024;
+
+ ProcessCommandLine(&options, argc, argv,
+ "Test forward and inverse real floating-point FFT\n");
+
+ verbose = options.verbose_;
+
+ if (verbose > 255)
+ DumpOptions(stderr, &options);
+
+ if (options.test_mode_) {
+ struct TestInfo info;
+
+ info.real_only_ = options.real_only_;
+ info.min_fft_order_ = options.min_fft_order_;
+ info.max_fft_order_ = options.max_fft_order_;
+ info.do_forward_tests_ = options.do_forward_tests_;
+ info.do_inverse_tests_ = options.do_inverse_tests_;
+ /* No known failures */
+ info.known_failures_ = 0;
+#ifdef BIG_FFT_TABLE
+ info.forward_threshold_ = 136.07;
+ info.inverse_threshold_ = 140.76;
+#else
+ info.forward_threshold_ = 136.07;
+ info.inverse_threshold_ = 142.41;
+#endif
+ RunAllTests(&info);
+ } else {
+ TestFloatFFT(options.fft_log_size_,
+ options.signal_type_,
+ options.signal_value_);
+ }
+}
+
+/* Briefly print out the contents of the FFT spec */
+void DumpFFTSpec(OMXFFTSpec_R_F32* pSpec) {
+ ARMsFFTSpec_R_FC32* p = (ARMsFFTSpec_R_FC32*) pSpec;
+ printf(" N = %d\n", p->N);
+ printf(" pBitRev = %p\n", p->pBitRev);
+ printf(" pTwiddle = %p\n", p->pTwiddle);
+ printf(" pBuf = %p\n", p->pBuf);
+}
+
+/*
+ * Generate a signal and the corresponding theoretical FFT
+ */
+void GenerateSignal(OMX_F32* x, OMX_FC32* fft, int size, int signal_type,
+ float signal_value) {
+ int k;
+ struct ComplexFloat *test_signal;
+ struct ComplexFloat *true_fft;
+
+ test_signal = (struct ComplexFloat*) malloc(sizeof(*test_signal) * size);
+ true_fft = (struct ComplexFloat*) malloc(sizeof(*true_fft) * size);
+ GenerateTestSignalAndFFT(test_signal, true_fft, size, signal_type,
+ signal_value, 1);
+
+ /*
+ * Convert the complex result to what we want
+ */
+
+ for (k = 0; k < size; ++k) {
+ x[k] = test_signal[k].Re;
+ }
+
+ for (k = 0; k < size / 2 + 1; ++k) {
+ fft[k].Re = true_fft[k].Re;
+ fft[k].Im = true_fft[k].Im;
+ }
+
+ free(test_signal);
+ free(true_fft);
+}
+
+/*
+ * Run one test of the forward and inverse FFT for the specified FFT
+ * size, signal type and amplitude
+ */
+void TestFloatFFT(int fft_log_size, int signal_type, float signal_value) {
+ struct SnrResult snr;
+
+ RunOneForwardTest(fft_log_size, signal_type, signal_value, &snr);
+ printf("Forward float FFT\n");
+ printf("SNR: real part %f dB\n", snr.real_snr_);
+ printf(" imag part %f dB\n", snr.imag_snr_);
+ printf(" complex part %f dB\n", snr.complex_snr_);
+
+ RunOneInverseTest(fft_log_size, signal_type, signal_value, &snr);
+ printf("Inverse float FFT\n");
+ printf("SNR: %f dB\n", snr.real_snr_);
+}
+
+/* Run one forward FFT test in test mode */
+float RunOneForwardTest(int fft_log_size, int signal_type, float signal_value,
+ struct SnrResult* snr) {
+ OMX_F32* x;
+ OMX_FC32* y;
+ struct AlignedPtr* x_aligned;
+ struct AlignedPtr* y_aligned;
+
+ OMX_FC32* y_true;
+
+ OMX_INT n;
+ OMX_INT fft_spec_buffer_size;
+ OMXResult status;
+ OMXFFTSpec_R_F32 * fft_fwd_spec = NULL;
+ int fft_size;
+
+ fft_size = 1 << fft_log_size;
+
+ status = omxSP_FFTGetBufSize_R_F32(fft_log_size, &fft_spec_buffer_size);
+ if (verbose > 63) {
+ printf("fft_spec_buffer_size = %d\n", fft_spec_buffer_size);
+ }
+
+ fft_fwd_spec = (OMXFFTSpec_R_F32*) malloc(fft_spec_buffer_size);
+ status = omxSP_FFTInit_R_F32(fft_fwd_spec, fft_log_size);
+ if (status) {
+ fprintf(stderr, "Failed to init forward FFT: status = %d\n", status);
+ exit(1);
+ }
+
+ x_aligned = AllocAlignedPointer(32, sizeof(*x) * fft_size);
+ y_aligned = AllocAlignedPointer(32, sizeof(*y) * (fft_size + 2));
+ x = x_aligned->aligned_pointer_;
+ y = y_aligned->aligned_pointer_;
+ y_true = (OMX_FC32*) malloc(sizeof(*y_true) * (fft_size / 2 + 1));
+
+ GenerateSignal(x, y_true, fft_size, signal_type, signal_value);
+
+ if (verbose > 63) {
+ printf("Signal\n");
+ DumpArrayFloat("x", fft_size, x);
+
+ printf("Expected FFT output\n");
+ DumpArrayComplexFloat("y", fft_size / 2, y_true);
+ }
+
+ status = omxSP_FFTFwd_RToCCS_F32_Sfs(x, (OMX_F32*) y, fft_fwd_spec);
+ if (status) {
+ fprintf(stderr, "Forward FFT failed: status = %d\n", status);
+ exit(1);
+ }
+
+ if (verbose > 63) {
+ printf("FFT Output\n");
+ DumpArrayComplexFloat("y", fft_size / 2, y);
+ }
+
+ CompareComplexFloat(snr, y, y_true, fft_size / 2 + 1);
+
+ FreeAlignedPointer(x_aligned);
+ FreeAlignedPointer(y_aligned);
+ free(y_true);
+ free(fft_fwd_spec);
+
+ return snr->complex_snr_;
+}
+
+/* Run one inverse FFT test in test mode */
+float RunOneInverseTest(int fft_log_size, int signal_type, float signal_value,
+ struct SnrResult* snr) {
+ OMX_F32* x;
+ OMX_FC32* y;
+ OMX_F32* z;
+ struct AlignedPtr* x_aligned;
+ struct AlignedPtr* y_aligned;
+ struct AlignedPtr* z_aligned;
+
+ OMX_FC32* yTrue;
+ struct AlignedPtr* yTrueAligned;
+
+ OMX_INT n;
+ OMX_INT fft_spec_buffer_size;
+ OMXResult status;
+ OMXFFTSpec_R_F32 * fft_fwd_spec = NULL;
+ OMXFFTSpec_R_F32 * fft_inv_spec = NULL;
+ int fft_size;
+
+ fft_size = 1 << fft_log_size;
+
+ status = omxSP_FFTGetBufSize_R_F32(fft_log_size, &fft_spec_buffer_size);
+ if (verbose > 3) {
+ printf("fft_spec_buffer_size = %d\n", fft_spec_buffer_size);
+ }
+
+ fft_inv_spec = (OMXFFTSpec_R_F32*)malloc(fft_spec_buffer_size);
+ status = omxSP_FFTInit_R_F32(fft_inv_spec, fft_log_size);
+ if (status) {
+ fprintf(stderr, "Failed to init backward FFT: status = %d\n", status);
+ exit(1);
+ }
+
+ x_aligned = AllocAlignedPointer(32, sizeof(*x) * fft_size);
+ y_aligned = AllocAlignedPointer(32, sizeof(*y) * (fft_size / 2 + 1));
+ z_aligned = AllocAlignedPointer(32, sizeof(*z) * fft_size);
+ yTrueAligned = AllocAlignedPointer(32, sizeof(*y) * (fft_size / 2 + 1));
+ x = x_aligned->aligned_pointer_;
+ y = y_aligned->aligned_pointer_;
+ z = z_aligned->aligned_pointer_;
+ yTrue = yTrueAligned->aligned_pointer_;
+
+ GenerateSignal(x, yTrue, fft_size, signal_type, signal_value);
+
+ if (verbose > 63) {
+ printf("Inverse FFT Input Signal\n");
+ DumpArrayComplexFloat("y", fft_size / 2, yTrue);
+
+ printf("Expected Inverse FFT output\n");
+ DumpArrayFloat("x", fft_size, x);
+ }
+
+ status = omxSP_FFTInv_CCSToR_F32_Sfs((OMX_F32 *) yTrue, z, fft_inv_spec);
+ if (status) {
+ fprintf(stderr, "Inverse FFT failed: status = %d\n", status);
+ exit(1);
+ }
+
+ if (verbose > 63) {
+ printf("Actual Inverse FFT Output\n");
+ DumpArrayFloat("z", fft_size, z);
+ }
+
+ CompareFloat(snr, z, x, fft_size);
+
+ FreeAlignedPointer(x_aligned);
+ FreeAlignedPointer(y_aligned);
+ FreeAlignedPointer(z_aligned);
+ FreeAlignedPointer(yTrueAligned);
+ free(fft_inv_spec);
+
+ return snr->real_snr_;
+}
diff --git a/dl/test/test_rfft16.c b/dl/test/test_rfft16.c
new file mode 100644
index 0000000..0acf2e2
--- /dev/null
+++ b/dl/test/test_rfft16.c
@@ -0,0 +1,246 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <time.h>
+#include <math.h>
+#include <unistd.h>
+
+#include "aligned_ptr.h"
+#include "armSP.h"
+#include "compare.h"
+#include "gensig.h"
+#include "omxSP.h"
+#include "test_util.h"
+
+int verbose;
+int signal_value;
+
+#define MAX_FFT_ORDER 12
+
+void TestFFT(int fft_log_size, int signal_type, int scale_factor);
+
+void main(int argc, char* argv[]) {
+ struct Options options;
+
+ SetDefaultOptions(&options, 1, MAX_FFT_ORDER);
+
+ ProcessCommandLine(&options, argc, argv,
+ "Test forward and inverse real 16-bit fixed-point FFT\n");
+
+ verbose = options.verbose_;
+ signal_value = options.signal_value_;
+
+ if (verbose > 255)
+ DumpOptions(stderr, &options);
+
+ if (options.test_mode_) {
+ struct TestInfo info;
+
+ info.real_only_ = options.real_only_;
+ info.max_fft_order_ = options.max_fft_order_;
+ info.min_fft_order_ = options.min_fft_order_;
+ info.do_forward_tests_ = options.do_forward_tests_;
+ info.do_inverse_tests_ = options.do_inverse_tests_;
+ /* No known failures */
+ info.known_failures_ = 0;
+ info.forward_threshold_ = 90.12;
+ info.inverse_threshold_ = 89.28;
+ signal_value = 32767;
+ RunAllTests(&info);
+ } else {
+ TestFFT(options.fft_log_size_,
+ options.signal_type_,
+ options.scale_factor_);
+ }
+}
+
+void GenerateSignal(OMX_S16* x, OMX_SC32* fft, int size, int signal_type) {
+ int k;
+ struct ComplexFloat *test_signal;
+ struct ComplexFloat *true_fft;
+
+ test_signal = (struct ComplexFloat*) malloc(sizeof(*test_signal) * size);
+ true_fft = (struct ComplexFloat*) malloc(sizeof(*true_fft) * size);
+ GenerateTestSignalAndFFT(test_signal, true_fft, size, signal_type,
+ signal_value, 1);
+
+ /*
+ * Convert the complex result to what we want
+ */
+
+ for (k = 0; k < size; ++k) {
+ x[k] = test_signal[k].Re;
+ }
+
+ for (k = 0; k < size / 2 + 1; ++k) {
+ fft[k].Re = true_fft[k].Re;
+ fft[k].Im = true_fft[k].Im;
+ }
+
+ free(test_signal);
+ free(true_fft);
+}
+
+void TestFFT(int fft_log_size, int signal_type, int scale_factor) {
+ struct SnrResult snr;
+
+ RunOneForwardTest(fft_log_size, signal_type, signal_value, &snr);
+ printf("Forward float FFT\n");
+ printf("SNR: real part %f dB\n", snr.real_snr_);
+ printf(" imag part %f dB\n", snr.imag_snr_);
+ printf(" complex part %f dB\n", snr.complex_snr_);
+
+ RunOneInverseTest(fft_log_size, signal_type, signal_value, &snr);
+ printf("Inverse float FFT\n");
+ printf("SNR: %f dB\n", snr.real_snr_);
+}
+
+float RunOneForwardTest(int fft_log_size, int signal_type, float signal_value,
+ struct SnrResult* snr) {
+ OMX_S16* x;
+ OMX_SC32* y;
+
+ struct AlignedPtr* x_aligned;
+ struct AlignedPtr* y_aligned;
+
+ OMX_SC32* y_true;
+
+ OMX_INT n, fft_spec_buffer_size;
+ OMXResult status;
+ OMXFFTSpec_R_S16S32 * fft_fwd_spec = NULL;
+ int fft_size;
+
+ fft_size = 1 << fft_log_size;
+
+ status = omxSP_FFTGetBufSize_R_S16S32(fft_log_size, &fft_spec_buffer_size);
+ if (verbose > 63) {
+ printf("fft_spec_buffer_size = %d\n", fft_spec_buffer_size);
+ }
+
+ fft_fwd_spec = (OMXFFTSpec_R_S16S32*) malloc(fft_spec_buffer_size);
+ status = omxSP_FFTInit_R_S16S32(fft_fwd_spec, fft_log_size);
+ if (status) {
+ fprintf(stderr, "Failed to init forward FFT: status = %d\n", status);
+ exit(1);
+ }
+
+ x_aligned = AllocAlignedPointer(32, sizeof(*x) * fft_size);
+ y_aligned = AllocAlignedPointer(32, sizeof(*y) * (fft_size + 2));
+ y_true = (OMX_SC32*) malloc(sizeof(*y_true) * (fft_size / 2 + 1));
+
+ x = x_aligned->aligned_pointer_;
+ y = y_aligned->aligned_pointer_;
+
+ GenerateSignal(x, y_true, fft_size, signal_type);
+
+ if (verbose > 63) {
+ printf("Signal\n");
+ DumpArrayReal16("x", fft_size, x);
+
+ printf("Expected FFT output\n");
+ DumpArrayComplex32("y", fft_size / 2, y_true);
+ }
+
+ status = omxSP_FFTFwd_RToCCS_S16S32_Sfs(x, (OMX_S32*) y, fft_fwd_spec, 0);
+ if (status) {
+ fprintf(stderr, "Forward FFT failed: status = %d\n", status);
+ exit(1);
+ }
+
+ if (verbose > 63) {
+ printf("FFT Output\n");
+ DumpArrayComplex32("y", fft_size / 2, y);
+ }
+
+ CompareComplex32(snr, y, y_true, fft_size / 2 + 1);
+
+ FreeAlignedPointer(x_aligned);
+ FreeAlignedPointer(y_aligned);
+ free(fft_fwd_spec);
+
+ return snr->complex_snr_;
+}
+
+float RunOneInverseTest(int fft_log_size, int signal_type, float signal_value,
+ struct SnrResult* snr) {
+ OMX_S16* x;
+ OMX_SC32* y;
+ OMX_S16* z;
+ OMX_SC32* y_true;
+
+ struct AlignedPtr* x_aligned;
+ struct AlignedPtr* y_aligned;
+ struct AlignedPtr* z_aligned;
+ struct AlignedPtr* y_true_aligned;
+
+ OMX_INT n;
+ OMX_INT fft_spec_buffer_size;
+ OMXResult status;
+ OMXFFTSpec_R_S16S32 * fft_inv_spec = NULL;
+ int fft_size;
+
+ fft_size = 1 << fft_log_size;
+
+ status = omxSP_FFTGetBufSize_R_S16S32(fft_log_size, &fft_spec_buffer_size);
+ if (verbose > 3) {
+ printf("fft_spec_buffer_size = %d\n", fft_spec_buffer_size);
+ }
+
+ fft_inv_spec = (OMXFFTSpec_R_S16S32*)malloc(fft_spec_buffer_size);
+ status = omxSP_FFTInit_R_S16S32(fft_inv_spec, fft_log_size);
+ if (status) {
+ fprintf(stderr, "Failed to init backward FFT: status = %d\n", status);
+ exit(1);
+ }
+
+ x_aligned = AllocAlignedPointer(32, sizeof(*x) * fft_size);
+ y_aligned = AllocAlignedPointer(32, sizeof(*y) * (fft_size / 2 + 1));
+ z_aligned = AllocAlignedPointer(32, sizeof(*z) * fft_size);
+ y_true_aligned = AllocAlignedPointer(32, sizeof(*y) * (fft_size / 2 + 1));
+
+ x = x_aligned->aligned_pointer_;
+ y = y_aligned->aligned_pointer_;
+ z = z_aligned->aligned_pointer_;
+ y_true = y_true_aligned->aligned_pointer_;
+
+ GenerateSignal(x, y_true, fft_size, signal_type);
+
+ if (verbose > 63) {
+ printf("Inverse FFT Input Signal\n");
+ DumpArrayComplex32("y", fft_size / 2, y_true);
+
+ printf("Expected Inverse FFT output\n");
+ DumpArrayReal16("x", fft_size, x);
+ }
+
+ status = omxSP_FFTInv_CCSToR_S32S16_Sfs((OMX_S32*) y_true, z,
+ fft_inv_spec, 0);
+ if (status) {
+ fprintf(stderr, "Inverse FFT failed: status = %d\n", status);
+ exit(1);
+ }
+
+ if (verbose > 63) {
+ printf("Actual Inverse FFT Output\n");
+ DumpArrayReal16("x", fft_size, z);
+ }
+
+ CompareReal16(snr, z, x, fft_size);
+
+ FreeAlignedPointer(x_aligned);
+ FreeAlignedPointer(y_aligned);
+ FreeAlignedPointer(z_aligned);
+ FreeAlignedPointer(y_true_aligned);
+ free(fft_inv_spec);
+
+ return snr->real_snr_;
+}
diff --git a/dl/test/test_rfft32.c b/dl/test/test_rfft32.c
new file mode 100644
index 0000000..8d9beab
--- /dev/null
+++ b/dl/test/test_rfft32.c
@@ -0,0 +1,250 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <time.h>
+#include <math.h>
+#include <unistd.h>
+
+#include "aligned_ptr.h"
+#include "armSP.h"
+#include "compare.h"
+#include "gensig.h"
+#include "omxSP.h"
+#include "test_util.h"
+
+int verbose;
+int signal_value;
+
+#define MAX_FFT_ORDER 12
+
+void TestFFT(int fft_log_size, int signal_type, int scale_factor);
+
+void main(int argc, char* argv[]) {
+ struct Options options;
+
+ SetDefaultOptions(&options, 1, MAX_FFT_ORDER);
+
+ ProcessCommandLine(&options, argc, argv,
+ "Test forward and inverse real 32-bit fixed-point FFT\n");
+
+ verbose = options.verbose_;
+ signal_value = options.signal_value_;
+
+ if (verbose > 255)
+ DumpOptions(stderr, &options);
+
+ if (options.test_mode_) {
+ struct TestInfo info;
+
+ info.real_only_ = options.real_only_;
+ info.min_fft_order_ = options.min_fft_order_;
+ info.max_fft_order_ = options.max_fft_order_;
+ info.do_forward_tests_ = options.do_forward_tests_;
+ info.do_inverse_tests_ = options.do_inverse_tests_;
+ /* No known failures */
+ info.known_failures_ = 0;
+ /* These thresholds are set for the default signal_value below */
+ info.forward_threshold_ = 105.94;
+ info.inverse_threshold_ = 104.62;
+ if (!options.signal_value_given_) {
+ signal_value = 262144;
+ }
+ RunAllTests(&info);
+ } else {
+ TestFFT(options.fft_log_size_,
+ options.signal_type_,
+ options.scale_factor_);
+ }
+}
+
+void GenerateSignal(OMX_S32* x, OMX_SC32* fft, int size, int signal_type) {
+ int k;
+ struct ComplexFloat *test_signal;
+ struct ComplexFloat *true_fft;
+
+ test_signal = (struct ComplexFloat*) malloc(sizeof(*test_signal) * size);
+ true_fft = (struct ComplexFloat*) malloc(sizeof(*true_fft) * size);
+ GenerateTestSignalAndFFT(test_signal, true_fft, size,
+ signal_type, signal_value, 1);
+
+ /*
+ * Convert the complex result to what we want
+ */
+
+ for (k = 0; k < size; ++k) {
+ x[k] = 0.5 + test_signal[k].Re;
+ }
+
+ for (k = 0; k < size / 2 + 1; ++k) {
+ fft[k].Re = 0.5 + true_fft[k].Re;
+ fft[k].Im = 0.5 + true_fft[k].Im;
+ }
+
+ free(test_signal);
+ free(true_fft);
+}
+
+void TestFFT(int fft_log_size, int signal_type, int scale_factor) {
+ struct SnrResult snr;
+
+ RunOneForwardTest(fft_log_size, signal_type, signal_value, &snr);
+ printf("Forward float FFT\n");
+ printf("SNR: real part %f dB\n", snr.real_snr_);
+ printf(" imag part %f dB\n", snr.imag_snr_);
+ printf(" complex part %f dB\n", snr.complex_snr_);
+
+ RunOneInverseTest(fft_log_size, signal_type, signal_value, &snr);
+ printf("Inverse float FFT\n");
+ printf("SNR: %f dB\n", snr.real_snr_);
+}
+
+float RunOneForwardTest(int fft_log_size, int signal_type, float signal_value,
+ struct SnrResult* snr) {
+ OMX_S32* x;
+ OMX_SC32* y;
+
+ struct AlignedPtr* x_aligned;
+ struct AlignedPtr* y_aligned;
+
+ OMX_SC32* y_true;
+
+ OMX_INT n, fft_spec_buffer_size;
+ OMXResult status;
+ OMXFFTSpec_R_S32 * pFwdSpec = NULL;
+ int fft_size;
+
+ fft_size = 1 << fft_log_size;
+
+ status = omxSP_FFTGetBufSize_R_S32(fft_log_size, &fft_spec_buffer_size);
+ if (verbose > 63) {
+ printf("fft_spec_buffer_size = %d\n", fft_spec_buffer_size);
+ }
+
+ pFwdSpec = (OMXFFTSpec_R_S32*) malloc(fft_spec_buffer_size);
+ status = omxSP_FFTInit_R_S32(pFwdSpec, fft_log_size);
+ if (status) {
+ fprintf(stderr, "Failed to init forward FFT: status = %d\n", status);
+ exit(1);
+ }
+
+ x_aligned = AllocAlignedPointer(32, sizeof(*x) * fft_size);
+ y_aligned = AllocAlignedPointer(32, sizeof(*y) * (fft_size + 2));
+ y_true = (OMX_SC32*) malloc(sizeof(*y_true) * (fft_size / 2 + 1));
+
+ x = x_aligned->aligned_pointer_;
+ y = y_aligned->aligned_pointer_;
+
+ GenerateSignal(x, y_true, fft_size, signal_type);
+
+ if (verbose > 63) {
+ printf("Signal\n");
+ DumpArrayReal32("x", fft_size, x);
+
+ printf("Expected FFT output\n");
+ DumpArrayComplex32("y", fft_size / 2, y_true);
+ }
+
+ status = omxSP_FFTFwd_RToCCS_S32_Sfs(x, (OMX_S32*) y, pFwdSpec, 0);
+ if (status) {
+ fprintf(stderr, "Forward FFT failed: status = %d\n", status);
+ exit(1);
+ }
+
+ if (verbose > 63) {
+ printf("FFT Output\n");
+ DumpArrayComplex32("y", fft_size / 2, y);
+ }
+
+ CompareComplex32(snr, y, y_true, fft_size / 2 + 1);
+
+ FreeAlignedPointer(x_aligned);
+ FreeAlignedPointer(y_aligned);
+ free(y_true);
+ free(pFwdSpec);
+
+ return snr->complex_snr_;
+}
+
+float RunOneInverseTest(int fft_log_size, int signal_type, float signal_value,
+ struct SnrResult* snr) {
+ OMX_S32* x;
+ OMX_SC32* y;
+ OMX_S32* z;
+ OMX_SC32* y_true;
+
+ struct AlignedPtr* x_aligned;
+ struct AlignedPtr* y_aligned;
+ struct AlignedPtr* z_aligned;
+ struct AlignedPtr* y_true_aligned;
+
+ OMX_INT n, fft_spec_buffer_size;
+ OMXResult status;
+ OMXFFTSpec_R_S32 * pFwdSpec = NULL;
+ OMXFFTSpec_R_S32 * pInvSpec = NULL;
+ int fft_size;
+
+ fft_size = 1 << fft_log_size;
+
+ status = omxSP_FFTGetBufSize_R_S32(fft_log_size, &fft_spec_buffer_size);
+ if (verbose > 3) {
+ printf("fft_spec_buffer_size = %d\n", fft_spec_buffer_size);
+ }
+
+ pInvSpec = (OMXFFTSpec_R_S32*)malloc(fft_spec_buffer_size);
+ status = omxSP_FFTInit_R_S32(pInvSpec, fft_log_size);
+ if (status) {
+ fprintf(stderr, "Failed to init backward FFT: status = %d\n", status);
+ exit(1);
+ }
+
+ x_aligned = AllocAlignedPointer(32, sizeof(*x) * fft_size);
+ y_aligned = AllocAlignedPointer(32, sizeof(*y) * (fft_size / 2 + 1));
+ z_aligned = AllocAlignedPointer(32, sizeof(*z) * fft_size);
+ y_true_aligned = AllocAlignedPointer(32,
+ sizeof(*y_true) * (fft_size / 2 + 1));
+
+ x = x_aligned->aligned_pointer_;
+ y = y_aligned->aligned_pointer_;
+ z = z_aligned->aligned_pointer_;
+ y_true = y_true_aligned->aligned_pointer_;
+
+ GenerateSignal(x, y_true, fft_size, signal_type);
+
+ if (verbose > 63) {
+ printf("Inverse FFT Input Signal\n");
+ DumpArrayComplex32("y", fft_size / 2, y_true);
+
+ printf("Expected Inverse FFT output\n");
+ DumpArrayReal32("x", fft_size, x);
+ }
+
+ status = omxSP_FFTInv_CCSToR_S32_Sfs((OMX_S32*) y_true, z, pInvSpec, 0);
+ if (status) {
+ fprintf(stderr, "Inverse FFT failed: status = %d\n", status);
+ exit(1);
+ }
+
+ if (verbose > 63) {
+ printf("Actual Inverse FFT Output\n");
+ DumpArrayReal32("x", fft_size, z);
+ }
+
+ CompareReal32(snr, z, x, fft_size);
+
+ FreeAlignedPointer(x_aligned);
+ FreeAlignedPointer(y_aligned);
+ FreeAlignedPointer(z_aligned);
+ FreeAlignedPointer(y_true_aligned);
+ free(pInvSpec);
+
+ return snr->real_snr_;
+}
diff --git a/dl/test/test_util.c b/dl/test/test_util.c
new file mode 100644
index 0000000..b412754
--- /dev/null
+++ b/dl/test/test_util.c
@@ -0,0 +1,398 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+
+#include "armSP.h"
+#include "compare.h"
+#include "test_util.h"
+
+/*
+ * Test resuls from running either forward or inverse FFT tests
+ */
+struct TestResult {
+ /* Number of tests that failed */
+ int failed_count_;
+
+ /* Number of tests run */
+ int test_count_;
+
+ /* Number of tests that were expected to fail */
+ int expected_failure_count_;
+
+ /* The minimum SNR found for all of the tests */
+ float min_snr_;
+};
+
+/*
+ * Return the program name, fur usage messages and debugging
+ */
+char* ProgramName(char* argv0) {
+ char* slash = strrchr(argv0, '/');
+
+ return slash ? slash + 1 : argv0;
+}
+
+/*
+ * Print usage message for the command line options.
+ */
+void usage(char* prog, int real_only, int max_fft_order, const char *summary) {
+ fprintf(stderr, "\n%s: [-hTFI] [-n logsize] [-s scale] [-g signal-type] "
+ "[-S signal value]\n\t\t[-v verbose] [-m minFFT] [-M maxFFT]\n",
+ ProgramName(prog));
+ fprintf(stderr, summary);
+ fprintf(stderr, " -h\t\tThis help\n");
+ fprintf(stderr, " -T\t\tIndividual test mode, otherwise run all tests\n");
+ fprintf(stderr, " -F\t\tDo not run forward FFT tests\n");
+ fprintf(stderr, " -I\t\tDo not run inverse FFT tests\n");
+ fprintf(stderr, " -m min\tMinium FFT order to test (default 2)\n");
+ fprintf(stderr, " -M min\tMaximum FFT order to test (default %d)\n",
+ max_fft_order);
+ fprintf(stderr, " -n logsize\tLog2 of FFT size\n");
+ fprintf(stderr, " -s scale\tScale factor for forward FFT (default = 0)\n");
+ fprintf(stderr, " -S signal\tBase value for the test signal "
+ "(default = 1024)\n");
+ fprintf(stderr, " -v level\tVerbose output level (default = 1)\n");
+ fprintf(stderr, " -g type\tInput signal type:\n");
+ fprintf(stderr, "\t\t 0 - Constant signal S + i*S. (Default value.)\n");
+ fprintf(stderr, "\t\t 1 - Real ramp starting at S/N, N = FFT size\n");
+ fprintf(stderr, "\t\t 2 - Sine wave of amplitude S\n");
+ if (!real_only)
+ fprintf(stderr, "\t\t 3 - Complex signal whose transform is a sine "
+ "wave.\n");
+ exit(0);
+}
+
+/*
+ * Set default values for all command line options.
+ */
+void SetDefaultOptions(struct Options* options, int real_only,
+ int max_fft_order) {
+ options->real_only_ = real_only;
+
+ options->verbose_ = 1;
+
+ /*
+ * Test mode options, defaulting to non-test mode
+ */
+ options->test_mode_ = 1;
+ options->do_forward_tests_ = 1;
+ options->do_inverse_tests_ = 1;
+ options->min_fft_order_ = 2;
+ options->max_fft_order_ = max_fft_order;
+
+ /*
+ * Individual test options
+ */
+ options->fft_log_size_ = 4;
+ options->scale_factor_ = 0;
+ options->signal_type_ = 0;
+ options->signal_value_ = 1024;
+ options->signal_value_given_ = 0;
+}
+
+/*
+ * Print values of command line options, for debugging.
+ */
+void DumpOptions(FILE* f, const struct Options* options) {
+ fprintf(f, "real_only = %d\n", options->real_only_);
+ fprintf(f, "verbose = %d\n", options->verbose_);
+ fprintf(f, "test_mode = %d\n", options->test_mode_);
+ fprintf(f, "do_forward_tests = %d\n", options->do_forward_tests_);
+ fprintf(f, "do_inverse_tests = %d\n", options->do_inverse_tests_);
+ fprintf(f, "min_fft_order = %d\n", options->min_fft_order_);
+ fprintf(f, "max_fft_order = %d\n", options->max_fft_order_);
+ fprintf(f, "fft_log_size = %d\n", options->fft_log_size_);
+ fprintf(f, "scale_factor = %d\n", options->scale_factor_);
+ fprintf(f, "signal_type = %d\n", options->signal_type_);
+ fprintf(f, "signal_value = %g\n", options->signal_value_);
+ fprintf(f, "signal_value_given = %d\n", options->signal_value_given_);
+}
+
+/*
+ * Process command line options, returning the values in |options|.
+ */
+void ProcessCommandLine(struct Options *options, int argc, char* argv[],
+ const char* summary) {
+ int opt;
+ int max_fft_order = options->max_fft_order_;
+
+ options->signal_value_given_ = 0;
+
+ while ((opt = getopt(argc, argv, "hTFIn:s:S:g:v:m:M:")) != -1) {
+ switch (opt) {
+ case 'h':
+ usage(argv[0], options->real_only_, max_fft_order, summary);
+ break;
+ case 'T':
+ options->test_mode_ = 0;
+ break;
+ case 'F':
+ options->do_forward_tests_ = 0;
+ break;
+ case 'I':
+ options->do_inverse_tests_ = 0;
+ break;
+ case 'm':
+ options->min_fft_order_ = atoi(optarg);
+ break;
+ case 'M':
+ options->max_fft_order_ = atoi(optarg);
+ break;
+ case 'n':
+ options->fft_log_size_ = atoi(optarg);
+ break;
+ case 'S':
+ options->signal_value_ = atof(optarg);
+ options->signal_value_given_ = 1;
+ break;
+ case 's':
+ options->scale_factor_ = atoi(optarg);
+ break;
+ case 'g':
+ options->signal_type_ = atoi(optarg);
+ break;
+ case 'v':
+ options->verbose_ = atoi(optarg);
+ break;
+ default:
+ usage(argv[0], options->real_only_, max_fft_order, summary);
+ break;
+ }
+ }
+}
+
+/*
+ * Return true if the given test is known to fail. The array of known
+ * failures is in |knownFailures|. The FFT order is |fft_order|,
+ * |is_inverse_fft| is true, if the test fails for the inverse FFT
+ * (otherwise for forward FFT), and |signal_type| specifies the test
+ * signal used.
+ */
+int IsKnownFailure(int fft_order, int is_inverse_fft, int signal_type,
+ struct KnownTestFailures* known_failures) {
+ if (known_failures) {
+ /*
+ * Look through array of known failures and see if an FFT
+ * (forward or inverse) of the given order and signal type
+ * matches. Return true if so.
+ */
+ while (known_failures->fft_order_ > 0) {
+ if ((fft_order == known_failures->fft_order_)
+ && (is_inverse_fft == known_failures->is_inverse_fft_test_)
+ && (signal_type == known_failures->signal_type_)) {
+ return 1;
+ }
+ ++known_failures;
+ }
+ }
+ return 0;
+}
+
+/*
+ * Run a set of tests, printing out the result of each test.
+ */
+void RunTests(struct TestResult* result,
+ float (*test_function)(int, int, float, struct SnrResult*),
+ const char* id,
+ int is_inverse_test,
+ const struct TestInfo* info,
+ float snr_threshold) {
+ int fft_order;
+ int signal_type;
+ float snr;
+ int tests = 0;
+ int failures = 0;
+ int expected_failures = 0;
+ float min_snr = 1e10;
+ struct SnrResult snrResults;
+
+ for (fft_order = info->min_fft_order_; fft_order <= info->max_fft_order_;
+ ++fft_order) {
+ for (signal_type = 0; signal_type < MaxSignalType(info->real_only_);
+ ++signal_type) {
+ int known_failure = 0;
+ int test_failed = 0;
+ ++tests;
+ snr = test_function(fft_order, signal_type, 1024.0, &snrResults);
+ if (snr < min_snr)
+ min_snr = snr;
+ known_failure = IsKnownFailure(fft_order, is_inverse_test,
+ signal_type, info->known_failures_);
+ if (snr < snr_threshold) {
+ ++failures;
+ test_failed = 1;
+ if (known_failure) {
+ ++expected_failures;
+ printf(" *FAILED: %s ", id);
+ } else {
+ printf("**FAILED: %s ", id);
+ }
+ } else {
+ test_failed = 0;
+ printf(" PASSED: %s ", id);
+ }
+ printf("order %2d signal %d: SNR = %9.3f",
+ fft_order, signal_type, snr);
+ if (known_failure) {
+ if (test_failed) {
+ printf(" (expected failure)");
+ } else {
+ printf(" (**Expected to fail, but passed)");
+ }
+ }
+ printf("\n");
+ }
+ }
+
+ printf("%sSummary: %d %s tests failed out of %d tests. "
+ "(Success rate %.2f%%.)\n",
+ failures ? "**" : "",
+ failures,
+ id,
+ tests,
+ (100.0 * (tests - failures)) / tests);
+ if (expected_failures)
+ printf(" (%d expected failures)\n", expected_failures);
+ printf(" (Minimum SNR = %.3f dB)\n", min_snr);
+
+ result->failed_count_ = failures;
+ result->test_count_ = tests;
+ result->expected_failure_count_ = expected_failures;
+ result->min_snr_ = min_snr;
+}
+
+/*
+ * For all FFT orders and signal types, run the forward FFT.
+ * runOneForwardTest must be defined to compute the forward FFT and
+ * return the SNR beween the actual and expected FFT.
+ *
+ * Also finds the minium SNR from all of the tests and returns the
+ * minimum SNR value.
+ */
+void RunForwardTests(struct TestResult* result, const struct TestInfo* info,
+ float snr_threshold) {
+ RunTests(result, RunOneForwardTest, "FwdFFT", 0, info, snr_threshold);
+}
+
+/*
+ * For all FFT orders and signal types, run the inverse FFT.
+ * runOneInverseTest must be defined to compute the forward FFT and
+ * return the SNR beween the actual and expected FFT.
+ *
+ * Also finds the minium SNR from all of the tests and returns the
+ * minimum SNR value.
+ */
+void RunInverseTests(struct TestResult* result, const struct TestInfo* info,
+ float snr_threshold) {
+ RunTests(result, RunOneInverseTest, "InvFFT", 1, info, snr_threshold);
+}
+
+/*
+ * Run all forward and inverse FFT tests, printing a summary of the
+ * results.
+ */
+void RunAllTests(const struct TestInfo* info) {
+ int failed;
+ int total;
+ float min_forward_snr;
+ float min_inverse_snr;
+ struct TestResult forward_results;
+ struct TestResult inverse_results;
+
+ if (info->do_forward_tests_)
+ RunForwardTests(&forward_results, info, info->forward_threshold_);
+ if (info->do_inverse_tests_)
+ RunInverseTests(&inverse_results, info, info->inverse_threshold_);
+
+ failed = forward_results.failed_count_ + inverse_results.failed_count_;
+ total = forward_results.test_count_ + inverse_results.test_count_;
+ min_forward_snr = forward_results.min_snr_;
+ min_inverse_snr = inverse_results.min_snr_;
+
+ if (total) {
+ printf("%sTotal: %d tests failed out of %d tests. "
+ "(Success rate = %.2f%%.)\n",
+ failed ? "**" : "",
+ failed,
+ total,
+ (100.0 * (total - failed)) / total);
+ if (forward_results.expected_failure_count_
+ + inverse_results.expected_failure_count_) {
+ printf(" (%d expected failures)\n",
+ forward_results.expected_failure_count_
+ + inverse_results.expected_failure_count_);
+ }
+ printf(" Min forward SNR = %.3f dB, min inverse SNR = %.3f dB\n",
+ min_forward_snr,
+ min_inverse_snr);
+ } else {
+ printf("No tests run\n");
+ }
+}
+
+/*
+ * Print the contents of an array to stdout, one element per line.
+ * |array_name| is the name of the array to be used in the header
+ * line.
+ *
+ * Arrays with elements of type OMX_S16, OMX_S32, OMX_SC32, OMX_F32,
+ * and OMX_FC32 are supported.
+ */
+void DumpArrayReal16(const char* array_name, int count,
+ const OMX_S16* array) {
+ int n;
+
+ printf("%4s\t%5s[n]\n", "n", array_name);
+ for (n = 0; n < count; ++n) {
+ printf("%4d\t%8d\n", n, array[n]);
+ }
+}
+
+void DumpArrayReal32(const char* array_name, int count, const OMX_S32* array) {
+ int n;
+
+ printf("%4s\t%5s[n]\n", "n", array_name);
+ for (n = 0; n < count; ++n) {
+ printf("%4d\t%8d\n", n, array[n]);
+ }
+}
+
+void DumpArrayComplex32(const char* array_name, int count,
+ const OMX_SC32* array) {
+ int n;
+
+ printf("%4s\t%10s.re[n]\t%10s.im[n]\n", "n", array_name);
+ for (n = 0; n < count; ++n) {
+ printf("%4d\t%16d\t%16d\n", n, array[n].Re, array[n].Im);
+ }
+}
+
+void DumpArrayFloat(const char* array_name, int count, const OMX_F32* array) {
+ int n;
+
+ printf("%4s\t%13s[n]\n", "n", array_name);
+ for (n = 0; n < count; ++n) {
+ printf("%4d\t%16g\n", n, array[n]);
+ }
+}
+
+void DumpArrayComplexFloat(const char* array_name, int count,
+ const OMX_FC32* array) {
+ int n;
+
+ printf("%4s\t%10s.re[n]\t%10s.im[n]\n", "n", array_name, array_name);
+ for (n = 0; n < count; ++n) {
+ printf("%4d\t%16g\t%16g\n", n, array[n].Re, array[n].Im);
+ }
+}
diff --git a/dl/test/test_util.h b/dl/test/test_util.h
new file mode 100644
index 0000000..b64e518
--- /dev/null
+++ b/dl/test/test_util.h
@@ -0,0 +1,156 @@
+/*
+ * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
+ *
+ * Use of this source code is governed by a BSD-style license
+ * that can be found in the LICENSE file in the root of the source
+ * tree. An additional intellectual property rights grant can be found
+ * in the file PATENTS. All contributing project authors may
+ * be found in the AUTHORS file in the root of the source tree.
+ */
+
+#ifndef WEBRTC_ARM_FFT_TEST_UTIL_H_
+#define WEBRTC_ARM_FFT_TEST_UTIL_H_
+
+/* Command line options */
+struct Options {
+ /*
+ * Set to non-zero if test is only for real signals. This is just
+ * for printing out the correct usage message.
+ */
+ int real_only_;
+
+ /* Debugging output level, used in test and non-test mode */
+ int verbose_;
+
+ /* Test mode where all tests are run. */
+ int test_mode_;
+
+ /* Run forward FFT tests (in test mode) */
+ int do_forward_tests_;
+
+ /* Run inverse FFT tests (in test mode) */
+ int do_inverse_tests_;
+
+ /* Minimum FFT order for test mode */
+ int min_fft_order_;
+
+ /* Maximum FFT order for test mode */
+ int max_fft_order_;
+
+ /* FFT Order */
+ int fft_log_size_;
+
+ /* Forward FFT scale factor, only for for fixed-point routines */
+ int scale_factor_;
+
+ /* Signal type to use for testing */
+ int signal_type_;
+
+ /* Signal amplitude */
+ float signal_value_;
+
+ /* Set if the command line options set a value for signalValue */
+ int signal_value_given_;
+};
+
+/*
+ * Information about a test that is known to fail.
+ */
+struct KnownTestFailures {
+ /* FFT order of the test */
+ int fft_order_;
+
+ /* Set to non-zero for inverse FFT case. Otherwise, it's forward FFT */
+ int is_inverse_fft_test_;
+
+ /* The test signal used */
+ int signal_type_;
+};
+
+struct TestInfo {
+ /* True if test is for real signals */
+ int real_only_;
+
+ /* Max FFT order to be tested */
+ int max_fft_order_;
+
+ /* Min FFT order to be tested */
+ int min_fft_order_;
+
+ /* True if forward FFT tests should be run */
+ int do_forward_tests_;
+
+ /* True if inverse FFT tests should be run */
+ int do_inverse_tests_;
+
+ /* SNR threshold for forward FFT tests */
+ float forward_threshold_;
+
+ /* SNR threshold for inverse FFT tests */
+ float inverse_threshold_;
+
+ /*
+ * Array of known test failures. Should either be 0 or point to
+ * an array of known failures, terminated by a test case with
+ * negative fftOrder.
+ */
+ struct KnownTestFailures* known_failures_;
+};
+
+/*
+ * Set default options for the command line options. Must be called
+ * before call |processCommandLine|
+ */
+void SetDefaultOptions(struct Options* options, int real_only,
+ int max_fft_order);
+
+/*
+ * Process the command line options
+ */
+void ProcessCommandLine(struct Options* options, int argc, char* argv[],
+ const char* summary);
+
+/*
+ * Print command line options and their values, for debugging.
+ */
+void DumpOptions(FILE*, const struct Options* options);
+
+/*
+ * Run one forward FFT test of the given size, signal type, and amplitude
+ */
+float RunOneForwardTest(int fft_log_size, int signal_type,
+ float signal_value, struct SnrResult* snr);
+
+/*
+ * Run one inverse FFT test of the given size, signal type, and amplitude
+ */
+float RunOneInverseTest(int fft_log_size, int signal_type,
+ float signal_value, struct SnrResult* snr);
+
+/*
+ * Run all FFT tests, as specified by |info|
+ */
+void RunAllTests(const struct TestInfo* info);
+
+/*
+ * Returns the program name, for debugging.
+ */
+char* ProgramName(char*);
+
+/*
+ * Return true if the specified FFT test is a known failure.
+ */
+int IsKnownFailure(int fft_order, int is_forward_fft, int signal_type,
+ struct KnownTestFailures* known_failures);
+
+/*
+ * Neatly print the contents of an array to stdout.
+ */
+void DumpArrayReal16(const char* array_name, int count, const OMX_S16* array);
+void DumpArrayReal32(const char* array_name, int count, const OMX_S32* array);
+void DumpArrayComplex32(const char* array_name, int count,
+ const OMX_SC32* array);
+void DumpArrayFloat(const char* array_name, int count, const OMX_F32* array);
+void DumpArrayComplexFloat(const char* array_name, int count,
+ const OMX_FC32* array);
+#endif
