| andrew@webrtc.org | eed919d | 2013-05-30 16:38:36 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved. |
| 3 | * |
| 4 | * Use of this source code is governed by a BSD-style license |
| 5 | * that can be found in the LICENSE file in the root of the source |
| 6 | * tree. An additional intellectual property rights grant can be found |
| 7 | * in the file PATENTS. All contributing project authors may |
| 8 | * be found in the AUTHORS file in the root of the source tree. |
| 9 | */ |
| 10 | |
| 11 | |
| Mirko Bonadei | 92ea95e | 2017-09-15 04:47:31 | [diff] [blame] | 12 | #include "common_audio/signal_processing/include/signal_processing_library.h" |
| andrew@webrtc.org | eed919d | 2013-05-30 16:38:36 | [diff] [blame] | 13 | |
| 14 | static int16_t coefTable_7[] = { |
| 15 | 4, 256, 8, 128, 12, 384, 16, 64, |
| 16 | 20, 320, 24, 192, 28, 448, 36, 288, |
| 17 | 40, 160, 44, 416, 48, 96, 52, 352, |
| 18 | 56, 224, 60, 480, 68, 272, 72, 144, |
| 19 | 76, 400, 84, 336, 88, 208, 92, 464, |
| 20 | 100, 304, 104, 176, 108, 432, 116, 368, |
| 21 | 120, 240, 124, 496, 132, 264, 140, 392, |
| 22 | 148, 328, 152, 200, 156, 456, 164, 296, |
| 23 | 172, 424, 180, 360, 184, 232, 188, 488, |
| 24 | 196, 280, 204, 408, 212, 344, 220, 472, |
| 25 | 228, 312, 236, 440, 244, 376, 252, 504, |
| 26 | 268, 388, 276, 324, 284, 452, 300, 420, |
| 27 | 308, 356, 316, 484, 332, 404, 348, 468, |
| 28 | 364, 436, 380, 500, 412, 460, 444, 492 |
| 29 | }; |
| 30 | |
| 31 | static int16_t coefTable_8[] = { |
| 32 | 4, 512, 8, 256, 12, 768, 16, 128, |
| 33 | 20, 640, 24, 384, 28, 896, 32, 64, |
| 34 | 36, 576, 40, 320, 44, 832, 48, 192, |
| 35 | 52, 704, 56, 448, 60, 960, 68, 544, |
| 36 | 72, 288, 76, 800, 80, 160, 84, 672, |
| 37 | 88, 416, 92, 928, 100, 608, 104, 352, |
| 38 | 108, 864, 112, 224, 116, 736, 120, 480, |
| 39 | 124, 992, 132, 528, 136, 272, 140, 784, |
| 40 | 148, 656, 152, 400, 156, 912, 164, 592, |
| 41 | 168, 336, 172, 848, 176, 208, 180, 720, |
| 42 | 184, 464, 188, 976, 196, 560, 200, 304, |
| 43 | 204, 816, 212, 688, 216, 432, 220, 944, |
| 44 | 228, 624, 232, 368, 236, 880, 244, 752, |
| 45 | 248, 496, 252, 1008, 260, 520, 268, 776, |
| 46 | 276, 648, 280, 392, 284, 904, 292, 584, |
| 47 | 296, 328, 300, 840, 308, 712, 312, 456, |
| 48 | 316, 968, 324, 552, 332, 808, 340, 680, |
| 49 | 344, 424, 348, 936, 356, 616, 364, 872, |
| 50 | 372, 744, 376, 488, 380, 1000, 388, 536, |
| 51 | 396, 792, 404, 664, 412, 920, 420, 600, |
| 52 | 428, 856, 436, 728, 440, 472, 444, 984, |
| 53 | 452, 568, 460, 824, 468, 696, 476, 952, |
| 54 | 484, 632, 492, 888, 500, 760, 508, 1016, |
| 55 | 524, 772, 532, 644, 540, 900, 548, 580, |
| 56 | 556, 836, 564, 708, 572, 964, 588, 804, |
| 57 | 596, 676, 604, 932, 620, 868, 628, 740, |
| 58 | 636, 996, 652, 788, 668, 916, 684, 852, |
| 59 | 692, 724, 700, 980, 716, 820, 732, 948, |
| 60 | 748, 884, 764, 1012, 796, 908, 812, 844, |
| 61 | 828, 972, 860, 940, 892, 1004, 956, 988 |
| 62 | }; |
| 63 | |
| 64 | void WebRtcSpl_ComplexBitReverse(int16_t frfi[], int stages) { |
| 65 | int l; |
| 66 | int16_t tr, ti; |
| 67 | int32_t tmp1, tmp2, tmp3, tmp4; |
| 68 | int32_t* ptr_i; |
| 69 | int32_t* ptr_j; |
| 70 | |
| 71 | if (stages == 8) { |
| 72 | int16_t* pcoeftable_8 = coefTable_8; |
| 73 | |
| 74 | __asm __volatile ( |
| 75 | ".set push \n\t" |
| 76 | ".set noreorder \n\t" |
| 77 | "addiu %[l], $zero, 120 \n\t" |
| 78 | "1: \n\t" |
| 79 | "addiu %[l], %[l], -4 \n\t" |
| 80 | "lh %[tr], 0(%[pcoeftable_8]) \n\t" |
| 81 | "lh %[ti], 2(%[pcoeftable_8]) \n\t" |
| 82 | "lh %[tmp3], 4(%[pcoeftable_8]) \n\t" |
| 83 | "lh %[tmp4], 6(%[pcoeftable_8]) \n\t" |
| 84 | "addu %[ptr_i], %[frfi], %[tr] \n\t" |
| 85 | "addu %[ptr_j], %[frfi], %[ti] \n\t" |
| 86 | "addu %[tr], %[frfi], %[tmp3] \n\t" |
| 87 | "addu %[ti], %[frfi], %[tmp4] \n\t" |
| 88 | "ulw %[tmp1], 0(%[ptr_i]) \n\t" |
| 89 | "ulw %[tmp2], 0(%[ptr_j]) \n\t" |
| 90 | "ulw %[tmp3], 0(%[tr]) \n\t" |
| 91 | "ulw %[tmp4], 0(%[ti]) \n\t" |
| 92 | "usw %[tmp1], 0(%[ptr_j]) \n\t" |
| 93 | "usw %[tmp2], 0(%[ptr_i]) \n\t" |
| 94 | "usw %[tmp4], 0(%[tr]) \n\t" |
| 95 | "usw %[tmp3], 0(%[ti]) \n\t" |
| 96 | "lh %[tmp1], 8(%[pcoeftable_8]) \n\t" |
| 97 | "lh %[tmp2], 10(%[pcoeftable_8]) \n\t" |
| 98 | "lh %[tr], 12(%[pcoeftable_8]) \n\t" |
| 99 | "lh %[ti], 14(%[pcoeftable_8]) \n\t" |
| 100 | "addu %[ptr_i], %[frfi], %[tmp1] \n\t" |
| 101 | "addu %[ptr_j], %[frfi], %[tmp2] \n\t" |
| 102 | "addu %[tr], %[frfi], %[tr] \n\t" |
| 103 | "addu %[ti], %[frfi], %[ti] \n\t" |
| 104 | "ulw %[tmp1], 0(%[ptr_i]) \n\t" |
| 105 | "ulw %[tmp2], 0(%[ptr_j]) \n\t" |
| 106 | "ulw %[tmp3], 0(%[tr]) \n\t" |
| 107 | "ulw %[tmp4], 0(%[ti]) \n\t" |
| 108 | "usw %[tmp1], 0(%[ptr_j]) \n\t" |
| 109 | "usw %[tmp2], 0(%[ptr_i]) \n\t" |
| 110 | "usw %[tmp4], 0(%[tr]) \n\t" |
| 111 | "usw %[tmp3], 0(%[ti]) \n\t" |
| 112 | "bgtz %[l], 1b \n\t" |
| 113 | " addiu %[pcoeftable_8], %[pcoeftable_8], 16 \n\t" |
| 114 | ".set pop \n\t" |
| 115 | |
| 116 | : [tmp1] "=&r" (tmp1), [tmp2] "=&r" (tmp2), [ptr_i] "=&r" (ptr_i), |
| 117 | [ptr_j] "=&r" (ptr_j), [tr] "=&r" (tr), [l] "=&r" (l), |
| 118 | [tmp3] "=&r" (tmp3), [pcoeftable_8] "+r" (pcoeftable_8), |
| 119 | [ti] "=&r" (ti), [tmp4] "=&r" (tmp4) |
| 120 | : [frfi] "r" (frfi) |
| 121 | : "memory" |
| 122 | ); |
| 123 | } else if (stages == 7) { |
| 124 | int16_t* pcoeftable_7 = coefTable_7; |
| 125 | |
| 126 | __asm __volatile ( |
| 127 | ".set push \n\t" |
| 128 | ".set noreorder \n\t" |
| 129 | "addiu %[l], $zero, 56 \n\t" |
| 130 | "1: \n\t" |
| 131 | "addiu %[l], %[l], -4 \n\t" |
| 132 | "lh %[tr], 0(%[pcoeftable_7]) \n\t" |
| 133 | "lh %[ti], 2(%[pcoeftable_7]) \n\t" |
| 134 | "lh %[tmp3], 4(%[pcoeftable_7]) \n\t" |
| 135 | "lh %[tmp4], 6(%[pcoeftable_7]) \n\t" |
| 136 | "addu %[ptr_i], %[frfi], %[tr] \n\t" |
| 137 | "addu %[ptr_j], %[frfi], %[ti] \n\t" |
| 138 | "addu %[tr], %[frfi], %[tmp3] \n\t" |
| 139 | "addu %[ti], %[frfi], %[tmp4] \n\t" |
| 140 | "ulw %[tmp1], 0(%[ptr_i]) \n\t" |
| 141 | "ulw %[tmp2], 0(%[ptr_j]) \n\t" |
| 142 | "ulw %[tmp3], 0(%[tr]) \n\t" |
| 143 | "ulw %[tmp4], 0(%[ti]) \n\t" |
| 144 | "usw %[tmp1], 0(%[ptr_j]) \n\t" |
| 145 | "usw %[tmp2], 0(%[ptr_i]) \n\t" |
| 146 | "usw %[tmp4], 0(%[tr]) \n\t" |
| 147 | "usw %[tmp3], 0(%[ti]) \n\t" |
| 148 | "lh %[tmp1], 8(%[pcoeftable_7]) \n\t" |
| 149 | "lh %[tmp2], 10(%[pcoeftable_7]) \n\t" |
| 150 | "lh %[tr], 12(%[pcoeftable_7]) \n\t" |
| 151 | "lh %[ti], 14(%[pcoeftable_7]) \n\t" |
| 152 | "addu %[ptr_i], %[frfi], %[tmp1] \n\t" |
| 153 | "addu %[ptr_j], %[frfi], %[tmp2] \n\t" |
| 154 | "addu %[tr], %[frfi], %[tr] \n\t" |
| 155 | "addu %[ti], %[frfi], %[ti] \n\t" |
| 156 | "ulw %[tmp1], 0(%[ptr_i]) \n\t" |
| 157 | "ulw %[tmp2], 0(%[ptr_j]) \n\t" |
| 158 | "ulw %[tmp3], 0(%[tr]) \n\t" |
| 159 | "ulw %[tmp4], 0(%[ti]) \n\t" |
| 160 | "usw %[tmp1], 0(%[ptr_j]) \n\t" |
| 161 | "usw %[tmp2], 0(%[ptr_i]) \n\t" |
| 162 | "usw %[tmp4], 0(%[tr]) \n\t" |
| 163 | "usw %[tmp3], 0(%[ti]) \n\t" |
| 164 | "bgtz %[l], 1b \n\t" |
| 165 | " addiu %[pcoeftable_7], %[pcoeftable_7], 16 \n\t" |
| 166 | ".set pop \n\t" |
| 167 | |
| 168 | : [tmp1] "=&r" (tmp1), [tmp2] "=&r" (tmp2), [ptr_i] "=&r" (ptr_i), |
| 169 | [ptr_j] "=&r" (ptr_j), [ti] "=&r" (ti), [tr] "=&r" (tr), |
| 170 | [l] "=&r" (l), [pcoeftable_7] "+r" (pcoeftable_7), |
| 171 | [tmp3] "=&r" (tmp3), [tmp4] "=&r" (tmp4) |
| 172 | : [frfi] "r" (frfi) |
| 173 | : "memory" |
| 174 | ); |
| 175 | } |
| 176 | } |
